Abstract: A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Techniques for efficiently buffering graphics data between a producer and a consumer within a low-cost graphics systems such as a 3D home video game overcome the problem that a small-sized FIFO buffer in the graphics hardware may not adequately load balance a producer and consumer—causing the producer to stall when the consumer renders bit primitives. One aspect of the invention solves this invention by allocating part of main memory to provide a variable number of variable sized graphics commands buffers. Applications can specify the number of buffers and the size of each. All writes to the graphics FIFO can be routed a buffer in main memory. The producer and consumer independently maintain their own read and write pointers, decoupling the producer from the consumer.

Abstract: A method for rendering source content of a file for display in a destination figure is provided. The method may include receiving the source content of the file including a brush that defines a viewbox having a first coordinate system, composing a viewport having a second coordinate system to which a brush transform is applied, creating an empty destination bitmap sized according to a destination figure transform, and rendering the source content onto the empty destination bitmap such that the first coordinate system is transformed into the second coordinate system.

Abstract: A video graphics system, graphics processor, and method of reducing memory bandwidth consumption include logic that groups binary data of a block of pixels into bit-planes. Each bit-plane corresponds to a different bit position in the binary data of the block and includes a bit value from each pixel in the block at that corresponding bit position. An encoding, associated with the block of pixels, represents which ones of the bit-planes are constant-value bit-planes having binary data comprised of a same bit value from every pixel in the block and which of the bit-planes are mixed-value bit-planes. Logic accesses memory storing the block of pixels to process the binary data of each mixed-value bit-plane and accesses memory storing the encoding to process the binary data of each constant-value bit-plane when a processing operation is performed on the block of pixels.

Abstract: A method is provided for processing data in a mobile communication terminal including a first data memory for storing first data indicating user-stored information and a second data memory for storing second data indicating user-stored information. The method includes creating a first data list corresponding to the first data and a second data list corresponding to the second data and displaying items of the first data list and items of the second data list on a screen of the mobile communication terminal in response to a user's data movement request, selecting at least one item from one that is selected from the first data list and the second data list that are separately displayed based on user's selection information, and storing data of the selected item in the first data memory or the second data memory into the other memory if a predetermined key is input.

Abstract: A display color buffer in a unified memory architecture is decoupled from main memory by partitioning the address space for the color buffer into a frame-preparation memory accessed by a graphics subsystem at a frame rate to prepare color data and a refresh memory that is accessed by a display device at a refresh rate to display the color data. The color data is periodically transferred between the frame-preparation memory and the refresh memory, or when a frame of color data is ready for display.

Abstract: Methods are disclosed for selectively loading one control at a time based on the location of a selection component relative to a graphical representation of a user interface.

Abstract: A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.

Abstract: A method for generating a vertical section of an object surface under inspection by a digital optical-video inspection system movable along a vertical Z axis, comprising obtaining a video image of the object surface; overlaying over the video image on the object surface a sectioning band along a section vector to make a vertical section of the object, the band comprising a number of regions of pixels, the center of each region being a sampling point along the section vector; generating a series of video images of the object surface at several Z axis positions; computing a focus quality measurement Q(n) for each region at each Z axis position Z(n); computing a best focus quality measurement the series of Q(n); and generating a vertical cross-section of the object surface from a set of points x,y,z obtained at each best focus location.

Abstract: In response to a requirement of transferring a file from a personal computer PC to a projector 10 that is output by dragging and dropping a corresponding file icon onto a projector icon, a CPU 50 requires setting of a password. The CPU 50 maps the preset password to a file and transfers the file with the password to an external storage device of the projector 10. The projector 10 requires input of a password, which is expected to be assigned to the file, and allows reproduction of the file when the input password is coincident with the preset password.

Abstract: Techniques to allow multiple graphics processing units to operate in parallel, even with limited storage space, are described. An apparatus includes first and second processing units and a memory. The first processing unit performs pre-processing on a batch of graphics application data for an image (e.g., for vertices in the image) and generates command sub-lists for the batch. The second processing unit performs post-processing on the command sub-lists (e.g., for pixels of the image) and generates output data for the image. The first and second processing units may operate in parallel on different command sub-lists. The memory stores the command sub-lists and may also store a header for each command sub-list, a look-up table of memory addresses for the command sub-lists, a write counter indicating the most recently generated command sub-list, and a read counter indicating the most recently post-processed command sub-list.

Abstract: A 3-dimensional computer graphics rendering system receives object data for a scene to be rendered. This includes vertex data and index data. The scene is subdivided into priority of rectangular areas (202). Object 8 of each rectangular area in the scene is assembled (203) and subsequently compressed (207). This data can subsequently be retrieved and decompressed and used for producing a properly shaded and texted image for display.

Abstract: A computer graphics system is provided that includes a memory to store image data, a bin pointer list to store information regarding a plurality of image subscenes, and a pointer cache system to maintain data regarding the plurality of image subscenes. The pointer cache system may include a tag array section, a data array section and a decoupling section.

Abstract: Compressed graphic image data files, such as Compressed ARC (Arc-second Raster Chart/map) Digitized Raster Graphics (CADRG) map files for a region of interest, are stored in blocks of memory (nodes) preferably arranged as a linked list. Portions of files containing data for an area of interest including an image of interest are decompressed before the data are sent to a frame buffer for display. Nodes that do not contain requested data are flagged as unused, but not deallocated, making the data in such nodes available for use or replacement.

Abstract: A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Techniques for efficiently buffering graphics data between a producer and a consumer within a low-cost graphics systems such as a 3D home video game overcome the problem that a small-sized FIFO buffer in the graphics hardware may not adequately load balance a producer and consumer—causing the producer to stall when the consumer renders bit primitives. One aspect of the invention solves this invention by allocating part of main memory to provide a variable number of variable sized graphics commands buffers. Applications can specify the number of buffers and the size of each. All writes to the graphics FIFO can be routed a buffer in main memory. The producer and consumer independently maintain their own read and write pointers, decoupling the producer from the consumer.

Abstract: A computer-implemented method and system for performing graphics rendering on demand on a graphics subsystem, with only nominal host system operations being required. High-level specifications of graphics operations in a computer program are captured as I/O hardware programs in a memory. A graphics processor in the subsystem issues instructions in the captured programs to a graphics accelerator, which executes the instructions to perform graphics operations. The graphics accelerator has a status indicator containing status information relating to hardware events incident to the graphics operations. Under the control of instructions in the captured program, the graphics processor monitors the status indicator, and either issues, or delays issuing, the instructions in the captured programs, depending upon the status information in the indicator.

Abstract: In various embodiments, methods and systems for brush composition are described. In one particular application of brush composition, opacity issues are addressed by focusing on the composition of objects having opacity effects in terms of the brushes that are used to render the objects. By focusing on the brushes that are used in the rendering process, instead of the individual objects and their particular colors, processing economies and efficiencies can be experienced. Specifically, in some instances, because of the particular way that overlapping objects interact, focusing on the brushes that are used with the individual objects and creatively attempting to combine or compose the brushes for operating on the areas of overlap, some processing steps that might otherwise have been required at the object/color level can be eliminated, thus providing a streamlined and efficient process.

Abstract: In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.

Abstract: A modeling section and geometry processing section collectively generate draw data used for a series of draw processing, and a control section transfers the generated draw data to a multi-path buffer. The draw processing is executed, under control of the control section, when a multi-path controller serially reads out the draw data stored in the multi-path buffer and outputs them to a rendering engine. This successfully saves the band width necessary for transfer of the draw data from a main processor to a graphic processor, and relieve the main processor from the process load.

Abstract: The invention method and system provides rotation of an image on a display screen. A graphics library translates on-screen coordinates from a base viewing mode to a desired alternate viewing mode. The translated coordinated are rendered directly to the display screen.

Abstract: A command list controller for controlling hardware based on an instruction received from a central processing unit (CPU) is provided. Specifically, the controller of the present invention retrieves hardware and controller commands from memory based on one or more instructions received from the CPU. All hardware commands will be forwarded to the hardware for execution, while all controller commands will be executed by the controller. Controller commands that the controller of the present invention is capable of executing include, among others, event wait commands and sublist execution commands.

Abstract: A computer-implemented method and system for performing graphics rendering on demand on a graphics subsystem, with only nominal host system operations being required. An application program requiring graphics to be rendered is coded to bound a sequence of calls to basic rendering functions, defining a desired image to be rendered, between begin-program and end-program identifiers. When the application program is executed on a host operating system, a begin-program identifier invokes a function in a graphics device driver in the host system. The function captures the calls to the rendering functions within the application program in a memory as hardware instructions to the graphics subsystem. When the function encounters an end-program identifier, it registers the captured hardware instructions with the host system as an executable program.

Abstract: An off-screen buffer manager controls when the off-screen buffer is destroyed and re-created improving system performance. A screen request is received for a Java screen component and a determination is made whether there is already an off-screen buffer. If there is not an off-screen buffer, a new off-screen buffer is created and the component requesting the screen request is associated with the off-screen buffer. If an off-screen buffer already exists, a determination is made as to whether the off-screen buffer is large enough to handle the incoming request. If the off-screen buffer is large enough to handle the request, the existing off-screen buffer is used to handle the request, otherwise, the existing off-screen buffer is deleted and a new off-screen buffer is created and the component identifier of the deleted off-screen buffer is associated with the new off-screen buffer.

Abstract: The present invention is directed to a method and apparatus for reducing the frame buffer size in a 3D graphics system. According to an exemplary aspect of the present invention, sorting and limiting the polygons that get processed at a given time may reduce the size of the frame buffer requiered in a graphics system. This may allow the system to process only those polygons that fall in one section of the screen. As a result, the system may not need to double buffer the whole screen. In a preferred embodiment, the location of the screen that gets processed may be arbitrary but should be preferably chosen so it is easy to sort the polygons and time-manage the process as the system needs to know when to swap from one location to another.

Abstract: A method and system for more efficiently loading a plurality of primitives for a scene into processors of a computer graphics system is disclosed. Each primitive has a top and a bottom. The primitives are ordered based on the top of each primitive. The system and method include providing at least one input, a merge circuit, a distributor, a feedback circuit and a controller. The input(s) is for receiving data relating to each primitive. The merge circuit is coupled with the input(s) and adds the data for a primitive having a top not lower than a current line. The distributor is coupled with the feedback circuit, eliminates an expired primitive and outputs the data for remaining primitives after the expired primitive has been removed. The expired primitive has a bottom above the current line. The feedback circuit is coupled to the merge circuit and the distributor and re-inputs to the merge circuit the data for the remaining primitives.

Abstract: A method for antialiased imaging of graphical objects on a pixel oriented display by rasterizing input pixel data as virtual pixels into a memory with a virtual resolution that is a factor higher than the physically displayed pixel resolution. In accordance with the invention, the existing color value of the physical pixel that corresponds to a virtual pixel to be modified is retrieved from the memory, the input color value of said virtual pixel to be rasterized is derived from the pixel input data, and split in its basic red, green and blue color components. The existing and the input color value are linearly combined for each color component in accordance with: ((N−1)*existing color value+M*input color value)/N, in which M represents a value at least equal to one and N being R2, and the result thereof used to overwrite the existing color value of the physical pixel at the memory location of said physical pixel.

Abstract: A 3-dimensional computer generated image is generated by subdividing the image into a plurality of rectangular areas. Object data for each rectangular area is loaded into a display list memory (4) until that memory is substantially full. Image data and shading data for each picture element of each rectangular area is derived by an image synthesis processor (6) from the object data. Image data is then stored in a local memory (16) and further object data loaded into the display list memory (4) and replaces the existing contents. Once this has happened, the stored image data and shading data is retrieved and additional image data and shading data derived for each picture element by the image synthesis processor (6) using the new object data and the previously derived image and shading data. When there is no further object data to load to the display list memory the shading data is provided for display for the rectangular areas by a frame buffer 11.

Abstract: A high performance accelerator circuit for streamed and not-streamed vector graphics applications and multimedia contents, which provides increased performance for vector graphics applications and multimedia contents over current computer and handheld architectures. The Vector Graphics Unit circuit includes means for fast drawing of quadratic and cubic Bézier curves (i.e. fonts, curved object etc . . . ), hardware compositing of solid and transparent objects and fast antialiasing hardware unit. The Vector Graphics Unit is particularly suitable for commercial appliances having high quality graphics and low power consumption features.

Abstract: A 3-dimensional computer graphics rendering system receives object data for a scene to be rendered. This includes vertex data and index data. The scene is subdivided into priority of rectangular areas (202). Object 8 of each rectangular area in the scene is assembled (203) and subsequently compressed (207). This data can subsequently be retrieved and decompressed and used for producing a properly shaded and texted image for display.

Abstract: An enhanced performance OpenGL display list may be created automatically by parsing from back to front a specified list that contains n rendering commands. When the nth rendering command is encountered, an nth bounding volume is computed to include the geometry specified by the nth rendering command. When the n-1th rendering command is encountered, an n-1th bounding volume is computed to include both the nth bounding volume and the geometry specified by the n-1th rendering command, and so on. Should any intervening matrix commands appear between the n-1th and the nth rendering commands, then computation of the n-1th bounding volume may be based on a transformed version of the nth bounding volume rather than on the nth bounding volume itself. The transformed version of the nth bounding volume maybe computed by applying the inverse of the intervening matrix commands to the nth bounding volume.

Abstract: A modified display list contains a series of n nested bounding volumes. The first bounding volume in the series contains the remaining n-1 bounding volumes the series. The second bounding volume contains the remaining n-2 bounding volumes in the series, and so on. Upon invocation, the graphics display system processes the modified list sequentially and tests the bounding volumes as they are encountered. As soon as a bounding volume is encountered whose coordinates define a region that should not be rendered, further sequential processing of rendering commands in the list may be halted. If any state commands remain in the list, those commands or an equivalent set of state commands may be executed, and then processing of the list is complete. Alternatively, if push/pop state commands exist on either side of the list, then processing of the list may be halted without more.

Abstract: A computer-implemented method and system for performing graphics rendering on demand on a graphics subsystem, with only nominal host system operations being required. High-level specifications of graphics operations in a computer program are captured as I/O hardware programs in a memory. A graphics processor in the subsystem issues instructions in the captured programs to a graphics accelerator, which executes the instructions to perform graphics operations. The graphics accelerator has a status indicator containing status information relating to hardware events incident to the graphics operations. Under the control of instructions in the captured program, the graphics processor monitors the status indicator, and either issues, or delays issuing, the instructions in the captured programs, depending upon the status information in the indicator.

Abstract: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.

Abstract: An image forming apparatus, which reads an image of a document and forms the same image, including a display, a input means to be receive an input data, a ROM to store initial display data of the input means and compressed programs, a power source detecting circuit to detect that the power is ON and a CPU to read initial display data of the input means stored in a ROM and control the display of initial display data on the display of the control panel.

Abstract: The invention relates to a method for displaying screen elements on a reproduction screen. A predetermined number of pixels (Pa1 . . . Pej) of a reproduction line (L1 . . . Lm) are combined to form a cell (C11 . . . Cmn). A reproduction line (L1 . . . Lm) is formed from a fixedly predetermined number of cells (C11 . . . Cmn).

Abstract: In a device for controlling the displaying of characters for a video system, the memory for storing information relating to the displaying of the characters is partitioned into two areas. The first area (Z1, Z1′) is for storing, at fixed addresses, data and parameters for general control of the display. The second area (Z2) which is divisible into spaces (B1, B2, B3) of variable sizes stores, in each of the spaces, control parameters and data relating to the displaying of a row of characters, wherein the spaces are chained together by virtue of a parameter, the address of the next memory space, stored in each space. This memory architecture offers multiple possibilities for modifying the display parameters from one row to another within one and the same “screen” whilst optimizig the size of the memory used.

Abstract: A system and method for decoupling graphics operations from a host processor to improve the efficiency of graphics rendering and free the host processor for other essential tasks. A processing system includes a host processor, a memory, a display list processor (DLP), graphics accelerators and display hardware. The host processor builds display lists generated by graphics applications and stores the display lists in the memory. The display lists include hardware function directives and control directives. The DLP accesses the memory to process the display lists, issuing the hardware function directives to the accelerators to generate display data.

Abstract: Graphics call sequence optimizer in a graphics system that includes a display list memory to store graphics calls to be executed. The optimizer optimizes an original graphics call sequence that includes a plurality of graphics primitive data-sets generated by a graphics application program in. accordance with a graphics application program interface, generating an optimized graphics call sequence. The optimizer is configured to optimize the original graphics call sequence to produce the optimized graphics call sequence without storing the original graphics call sequence in the display list memory. The optimizer is configured to coalesce graphics primitive data sets within the original graphics call sequence to generate a corresponding single graphics primitive data set in the optimized graphics call sequence that causes a same rendering in the graphics system as the original graphics call sequence.

Abstract: Apparatus and methods for storing and retrieving images for transmission to an output device are disclosed. A cache comprising one or more bitmaps is examined to determine whether the image to be transmitted generates a match with a bitmap already stored on the cache. If a match is found, the bitmap matching the image to be transmitted is retrieved from the cache. If no match is found, a bitmap representing the image is stored in the cache.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: A method and apparatus for transferring commands to a graphics processor is provided. The method and apparatus are intended for use in a host computer system having a memory that is addressable by a host processor and a graphics processor. One or more queues of packet descriptors are maintained in the memory of the host computer system. Each packet descriptor includes a pointer to a region of memory known as a packet buffer. Each packet descriptor also includes a ready variable. To pass commands to the graphics processor, a graphics process selects a packet buffer. The packet buffer must have a ready variable that is set to the value false. After selection of the appropriate packet descriptor, the graphics process writes the desired commands into the packet descriptor associated with the selected packet descriptor. The graphics process then sets the ready variable included in the selected packet descriptor to true. The graphics processor traverses the queues of packet descriptors.

Abstract: A 3-dimensional computer generated image is generated by subdividing the image into a plurality of rectangular areas. Object data for each rectangular area is loaded into a display list memory (4) until that memory is substantially full. Image data and shading data for each picture element of each rectangular area is derived by an image synthesis processor (6) from the object data. Image data is then stored in a local memory (16) and further object data loaded into the display list memory (4) and replaces the existing contents. Once this has happened, the stored image data and shading data is retrieved and additional image data and shading data derived for each picture element by the image synthesis processor (6) using the new object data and the previously derived image and shading data. When there is no further object data to load to the display list memory the shading data is provided for display for the rectangular areas by a frame buffer 11.

Abstract: A display device is disclosed that includes a cache memory consisting of memory segments, each memory segment being capable of storing an image fragment. A video generator is driven by a video cache reader, which builds up a screen image from complete or partial image fragments stored in the memory segments. By means of hardware counters and registers the address of an image point in the cache memory is derived from the address of the image point read in last. As a result of this, the screen image can be built up very rapidly, so that no special screen memory is required and the amount of data to be transferred is reduced.

Abstract: Graphics call sequence optimizer for use in a graphics system that includes a display list memory to store graphics calls to be executed. The optimizer optimizes an original graphics call sequence that includes a plurality of graphics primitive data sets generated by a graphics application program in accordance with a graphics application program interface, such as OpenGL, generating an optimized graphics call sequence to be stored in the display list memory. The optimizer is configured to optimize the original graphics call sequence to produce the optimized graphics call sequence without storing the original graphics call sequence in the display list memory. In one embodiment, the optimizer is configured to coalesce graphics primitive data sets within the original graphics call sequence to generate a corresponding single graphics primitive data set in the optimized graphics call sequence that causes a same rendering in the graphics system as the original graphics call sequence.

Abstract: A graphics display command list handler and method requests allocation of memory, such as system memory, in the form of a circular FIFO which stores the display command list as a memory display list (MDL), such as a host memory display list. A processor, such as a graphics processor, communicates a host memory display list read pointer to the host processor to facilitate display list signaling by the graphics processor. The host processor (or other processor) maintains a write pointer which points to a last host memory entry in the display list. The read pointer is maintained by the graphics processor and written back to the host processor.

Abstract: A method and apparatus for transferring commands to a graphics processor is provided. The method and apparatus are intended for use in a host computer system having a memory that is addressable by a host processor and a graphics processor. One or more queues of packet descriptors are maintained in the memory of the host computer system. Each packet descriptor includes a pointer to a region of memory known as a packet buffer. Each packet descriptor also includes a ready variable. To pass commands to the graphics processor, a graphics process selects a packet buffer. The packet buffer must have a ready variable that is set to the value false. After selection of the appropriate packet descriptor, the graphics process writes the desired commands into the packet descriptor associated with the selected packet descriptor. The graphics process then sets the ready variable included in the selected packet descriptor to true. The graphics processor traverses the queues of packet descriptors.