Abstract: A method and apparatus for driving a plasma display panel in which discharge cells are formed by first, second, and third electrodes, has a frame divided into a plurality of subfields, each of which includes a reset period, an address period, and a sustain period. In the reset period, a voltage at the first electrode is modified from a first voltage to a second voltage, the first electrode is floated; and the voltage at the first electrode is gradually reduced to a third voltage.

Abstract: A technique for driving a PDP, which includes scan and sustain electrodes arranged in pairs, data electrodes arranged alternately with the scan electrodes, and sub-fields for one TV field to display a multi-gradation, includes applying a reset pulse voltage to the sustain electrodes, applying a first voltage alternately to the scan electrodes and the sustain electrodes to cause a sustain discharge, and after applying a second voltage to the sustain electrodes or removing part of the first voltage applied to the sustain electrodes, applying third and fourth voltages to the scan electrodes and the data electrodes, respectively, before applying the first voltage, to erase wall charges in cells defined by the sustain electrodes, the data electrodes, and the scan electrodes.

Abstract: A plasma display panel sustain-discharge circuit. First and second signal lines for supplying first and second voltages and at least one inductor coupled between one end of the panel capacitor and a third voltage are formed. Energy is stored in the inductor through a path formed between the third voltage and the first signal line in a state where a voltage of one end of the panel capacitor is substantially fixed to the first voltage. The voltage of one end of the panel capacitor substantially decreases to the second voltage using resonance current generated between the inductor and the panel capacitor and the stored energy. Energy is stored in the inductor through a path formed between the third voltage and the second line in a state where a voltage of one end of the panel capacitor is substantially fixed to the second voltage.

Abstract: Disclosed is a plasma display apparatus and a method of driving the same. The plasma display apparatus and method of driving the same, in which a plasma display panel displays images by constituting a plurality of sub-fields including a reset period in one frame, are characterized in that: gray levels are controlled by applying a sustain voltage supplied during the sustain period of a specific one of the sub-fields at a different time than the sustain voltage supplied during the sustain period of the other sub-fields.

Abstract: Provided is a PDP driving apparatus for reducing electromagnetic interference (EMI) generated during operation of a PDP. The PDP driving apparatus drives a PDP with X electrodes and Y electrodes arranged parallel to each other, and Address electrodes arranged to cross with the X electrodes and the Y electrodes to form discharge cells. The PDP driving apparatus includes a frequency lowering unit coupled between an X electrode and a ground terminal or between a Y electrode and a ground terminal. The frequency lowering unit includes a capacitor with capacitance between about 1 nF and about 2 nF, and lowers a resonance frequency caused by parasitic capacitance and inductance components of the PDP driving apparatus.

Abstract: A plasma display device, which is capable of improving a discharge efficiency of a plasma display panel by increasing a partial pressure of Xe. When the partial pressure of Xe is increased, a proportion of (Xe—Xe)* dimer emitting a 147 resonance line is higher than that of Xe* monomer emitting a 173 nm molecular beam. Particularly, when the partial pressure of Xe is above 10%, the discharge efficiency is improved by setting a frequency of a sustain discharge pulse applied to scan electrodes and sustain electrodes alternately during sustain period above 300 kHz.

Abstract: A method of switching a high-side switch of a plasma display panel (PDP) scan circuit in zero-voltage-switching mode. The scan circuit contains a high-side switch and a low-side switch. By controlling the voltage potential difference across the high-side switch, the high-side switch of the PDP scan circuit can operate using soft switching or in zero-voltage-switching (ZVS) mode. The switching loss of scan ICs and the switching noise from scan ICs will therefore be reduced.

Abstract: During each set-up period, wall charges of scan electrodes and sustain electrodes, between which sustain discharges were generated in the previous subfield, are adjusted, and parts toward the sustain electrodes of positive charges in the scan electrodes are replaced by negative charges and parts toward the scan electrodes of negative charges in the sustain electrodes are replaced by positive charges. During each address period, write pulses are applied to the scan electrodes to generate write discharges utilizing priming discharges between the scan electrodes and priming electrodes. During each sustain period, positive charges are accumulated in the entire surfaces of the scan electrodes and negative charges are accumulated in the entire surfaces of the sustain electrodes.

Abstract: A claimed multiple mode switch includes an input signal interface for receiving first and second input signals and producing a combined input signal; a driving circuit for receiving the combined input signal and producing driving signals accordingly; a resistor mode circuit electrically connected to a first output of the driving circuit, to a first node, and to a second node for enabling the multiple mode switch to operate in variable resistor mode or in large resistor mode; a fully-on mode circuit electrically connected to the second input signal, the first output of the driving circuit, and the second node for enabling the multiple mode switch to operate in fully-on mode; and a power switch electrically connected to the first node, the second node, and a third node for controlling switching of the multiple mode switch between off mode, fully-on mode, and variable resistor mode or large resistor mode.

Abstract: A plasma display panel is provided having a plurality of scan electrodes and sustain electrodes formed parallel to each other in pairs on a first substrate, and a plurality of address electrodes formed on a second substrate that cross the plurality of first and second electrode pairs. A reset waveform is applied to a scan electrode during a reset period, and a scan pulse that falls from a first voltage level to a second voltage level is applied to the can electrode during an address period. A pre-scan pulse of a third voltage level, which is higher than the first voltage level, is applied to a scan electrode between the reset and address periods, and either a magnitude of the third voltage level or a width of the pre-scan pulse is adjusted according to patterns of subfield data.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: The present method is to drive a plasma display panel which displays a frame composed of a plurality of sub-fields having different weights of luminance. The method comprises using plural kinds of application voltage waveforms different in light emission luminance, as pulse voltages for sustain discharges in display of each sub-field, and adjusting the number of waves in each of the plural kinds of application voltage waveforms according to the weight of luminance set for each sub-field, thereby performing gradation display.

Abstract: A driving apparatus of a plasma display panel. In a scan electrode driving circuit, a drain of a first transistor is coupled to a scan electrode, and a driver of the first transistor is coupled to the gate and a source of the first transistor. During a reset period, the driver turns on the first transistor and reduces a voltage at a scan electrode and then turns off the first transistor so as to gradually reduce the voltage of the scan electrode by floating the scan electrode. Further, a selecting voltage may be applied to the scan electrode by turning on the first and second transistors during an address period. Thus, the transistor used during the reset period may be used in the address period.

Abstract: A plasma display improved in variation of display brightness between unit cells. A control circuit sets, for every pulse, a charge-recovering time period for recovering a charge on a capacitance component of the plasma display panel and a clamp timing period for applying a predetermined sustain voltage to the sustain electrodes or the scan electrodes after the charge-recovering time period through clamp start timing, and sets a sustain-discharge emission intensity ratio, as a ratio of a maximal discharge intensity in the clamp timing period with reference to a discharge intensity in the clamp start timing to a maximum discharge intensity in the charge-recovering time period, at a value that a discharge in the clamp timing period is to spread up to an end of the unit cell. For example, the control circuit sets a sustain-discharge emission intensity ratio substantially at 0.5 or greater or 0.1 or smaller, thus eliminating the occurrence of image retention.

Abstract: A plasma display panel and an imaging device realize a high luminous efficiency, a long lifetime and stable driving. The plasma display panel uses a discharge-gas mixture containing at least Xe, Ne and He. A Xe proportion of the discharge-gas mixture is in a range of from 2% to 20%, a He proportion of the discharge-gas mixture is in a range of from 15% to 50%, the He proportion is greater than the Xe proportion, and a total pressure of the discharge-gas mixture is in a range of from 400 Torr to 550 Torr. A width of a voltage pulse to be applied to an electrode serving as an address electrode is 2 ?s or less.

Abstract: A PDP having a driving circuit that reduces the reset voltage of the PDP driving waveforms to make it possible to use low-voltage elements and to achieve high contrasts is disclosed. Since conventional PDP waveforms require very high reset voltages, it causes a problem of intense background light emissions, low contrasts, use of high-voltage components, and increased circuit costs. According to the driving waveforms of the present invention, relative voltage differences between the address electrode and the X electrode and between the X electrode and the Y electrode are considered to design waveforms of low reset voltages, thereby providing high contrasts and low-cost circuit.

Abstract: In a plasma display panel driving method, a final voltage of a falling ramp voltage is reduced to a voltage for firing a discharge at all the discharge cells in a reset period. A difference between a voltage at an address electrode of a discharge cell to be selected and a voltage applied to a scan electrode is established to be greater than a maximum discharge firing voltage in an address period. A voltage greater than a sustain voltage is applied to the scan electrode so as to convert positive wall charges which can be formed on the scan electrode of a discharge cell which is not selected in the address period into negative wall charges.

Abstract: In the initializing period of each of sub-fields comprising one field, one of all-cell initializing operation and selective initializing operation is performed. The all-cell initializing operation causes initializing discharge in all the discharge cells for displaying an image. The selective initializing operation selectively causes initializing discharge only in the discharge cells subjected to sustaining discharge in the preceding sub-field. During initializing discharge using scan electrodes as anodes, and using sustain electrodes and data electrodes as cathodes in the all-cell initializing period, applying, to the data electrodes, a voltage for delaying discharge using the data electrodes as the cathodes, after discharge using the sustain electrodes as the cathodes.

Abstract: A plasma display panel driving apparatus for applying a voltage to an electrode of the plasma display panel. The apparatus includes a first voltage applying unit to apply a first voltage and a third voltage to the electrode, and a second voltage applying unit to apply a second voltage to the electrode. The second voltage is higher than the first voltage. An energy recovery circuit includes an inductor and an over-voltage clamping preventing unit, which maintains a connection node in a voltage range from the first voltage to the third voltage. The over-voltage clamping preventing unit comprises a second diode coupled with the connection node, a third diode coupled with the connection node, and a fourth switching element coupled with the second diode and a first voltage source that supplies the first voltage.

Abstract: In a Plasma Display Panel (PDP) power control apparatus, an internal voltage of a power supply is detected, and a determination is made as to whether an Alternating Current (AC) power input to the power supply has been turned off on the basis of the detected internal voltage. The output of the power supply is controlled according to a predetermined sequence based on a result of the determination to turn off the PDP. The apparatus rapidly and accurately senses that the AC power has been turned off and performs a predetermined power off sequence to prevent damage to a driving circuit and to prevent the picture quality of the PDP from being degraded.

Abstract: A method of driving a plasma display panel having display electrode pairs each one of which pairs is formed of a scan electrode and a sustain electrode. A priming electrode is placed in every other spaces between the display electrode pairs and in parallel with the display electrode pairs. An addressing period includes an odd-line addressing period in which an address operation is conducted to primary discharge cells having odd-number scan electrodes, an even-line addressing period in which an address operation is conducted to primary discharge cells having even-number scan electrodes. During the respective addressing periods, scan pulse voltage Va is applied to odd-number scan electrodes or even-number scan electrodes while priming pulse voltage Vp is applied, prior to the application of the scan pulse voltage, to a priming electrode adjacent to the scan electrode to which scan pulse voltage Va is to be applied, in order to generate a priming discharge between the priming electrodes and the data electrodes.

Abstract: A plasma display panel, and a method for manufacturing the same. The plasma display panel includes a first electrode sheet between a first substrate and a second substrate facing the first substrate; and a second electrode sheet between the second substrate and the first electrode sheet. The first electrode sheet includes a plurality of first inner lines, each of the first inner lines including a first discharge electrode and a first dielectric layer enclosing the first discharge electrode and composed of an anodized material of the first discharge electrode, the second electrode sheet includes a plurality of second inner lines, each of the second inner lines including a second discharge electrode and a second dielectric layer enclosing the second discharge electrode and composed of an anodized material of the second discharge electrode.

Abstract: A plasma display device that enables a stable address operation even in a high-speed drive so as to display an image of high definition and high quality. A PDP having discharge cells each provided with a scanning electrode and a sustaining electrode is driven by a method for displaying a frame of an image by repeating an address period, a discharge sustaining period, and a discharge suspend period. At least one initialization period that succeeds a discharge suspend period and in which the state of the wall charge in each discharge cell is initialized is provided. In the discharge suspend period, a voltage is applied between the scanning electrode and the sustaining electrode so that a wall voltage may be generated at which the polarity at the scanning electrode with respect to the sustaining electrode is the same as that of the initializing pulse applied to the scanning electrode in the initialization period.

Abstract: The present invention relates to a plasma display panel, and more particularly, to an energy recovery apparatus of a plasma display panel and method thereof. The energy recovery apparatus includes a capacitive load equivalently formed between a scan electrode and a sustain electrode, an energy recovery unit for recovering energy charged in the capacitive load and again supplying the recovered energy to the capacitive load, an energy supply unit disposed between the energy recovery unit and the capacitive load, wherein the energy supply unit relays energy between the energy recovery unit and the capacitive load and supplying a reference voltage to the capacitive load so that stabilized discharging can be generated in the capacitive load, and an energy relay unit disposed between the energy recovery unit and the energy supply unit, for relaying energy between the energy recovery unit and the energy supply unit.

Abstract: A plasma display apparatus including: a plasma display panel; a non-conductive chassis disposed on a rear portion of the plasma display panel to support the plasma display panel; a circuit unit disposed on a rear portion of the chassis to drive the plasma display panel; and a conductive member disposed between the plasma display panel and the chassis, having at least a part that is slit and protruded toward the chassis. In addition, the circuit unit includes a grounding portion having a grounding voltage and the grounding portion is electrically connected to the protruding portion of the conductive member.

Abstract: Scan electrodes are provided separately in addition to sustain electrode pairs generating a sustain discharge. An Address-While-Display drive, in which a scan pulse and a sustain pulse are applied at the same timing, is conducted for each subfield. When scan pulses are applied to the scan electrodes, a wall voltage is generated by a wall charge formed on the dielectric layer located on the scan electrodes. This wall voltage is set higher in the negative voltage direction than the wall voltage generated by a wall charge formed on the dielectric layer located on the sustain electrode pairs. As a result, the display luminance level is increased, increase in the scale of power source circuit can be avoided, and a wide drive margin can be obtained.

Abstract: In a plasma display device, a transistor is coupled between a power source that supplies a Ve voltage and a sustain electrode, and a capacitor is coupled between a power source that supplies a Ve voltage and a ground terminal. During a sustain period, a Vs voltage and 0V are alternately applied. Since the Vs voltage is set to be less than the Ve voltage, the capacitor is charged with the Vs voltage through a body diode of the transistor when the Vs voltage is applied to the sustain electrode during the sustain period. Therefore, the Vs voltage charged during a period ranging from after the sustain period to before the transistor is turned on, is discharged to be less than the Ve voltage. Accordingly, only one transistor needs to be used between the power source that supplies the Ve voltage and the sustain electrode.

Abstract: A driving circuit for producing sustain waveforms of a plasma display panel (PDP) is mentioned. The driving circuit includes the functions of voltage clamping and energy recovery. By controlling switches contained in the driving circuit, the supplied voltage source can be made to be only half of the sustain voltage. The voltage stress of some components will therefore be lower. In addition, the numbers of components can be reduced in the driving circuit.

Abstract: A plasma display panel driving circuit includes a panel capacitor having first and second sides; a first switch electrically connected between a first voltage and the first side of the panel capacitor; a second switch electrically connected between a second voltage and a first node; a third switch electrically connected between a third voltage and the first side of the panel capacitor; a fourth switch electrically connected between a fourth voltage and the first node; an energy recovery circuit electrically connected between the first side of the panel capacitor and the first node; a fifth switch electrically connected between the first node and a second node; a sixth switch connected between a fifth voltage and the second node; a voltage source connected between the second node and a third node; and a scan IC. The driving circuit can produce driving waveforms that do not need to stay at ground potential.

Abstract: A plasma display panel driving circuit includes a panel capacitor having a first side and a second side, a diode electrically connected between the first side of the panel capacitor and a first voltage, a first switch electrically connected between the first voltage and a first node, a second switch electrically connected between the first node and the second side of the panel capacitor, an inductor and a third switch electrically connected in series between the first node and the first side of the panel capacitor, a fourth switch electrically connected between the second side of the panel capacitor and a second voltage, and a fifth switch electrically connected between the first side of the panel capacitor and the second voltage.

Abstract: A driver circuit for plasma display panels is provided. The claimed driver circuit includes four switches and an energy recovery circuit coupled to an equivalent capacitor of a plasma display panel. The present energy recovery circuit includes a first unit, coupled to ground and the X side of the equivalent capacitor, for passing current of charging/discharging the equivalent capacitor from the X side and/or Y side; and a second unit, coupled to the first unit and the Y side of the equivalent capacitor, for passing current of charging/discharging the equivalent capacitor from the Y side. With the aid of four voltage sources, it is not necessary for the present energy recovery circuit of the driver circuit to adopt capacitors for charging/discharging the equivalent capacitor of the plasma display panel.

Abstract: A method of driving a plasma display panel during an address period. In order to avoid address discharge failure at the temporal end of an address period, the voltages applied to the scanning electrodes and to the bias electrodes are decreased throughout the address period. By ramping these voltages down towards the end of the address period, mis addressing is less likely to occur. Other modifications to the driving waveforms include altering the amplitude and/or the temporal width of the address pulses and the scanning pulses. Such techniques allow the address period to remain short while preventing failure during the address period.

Abstract: A method for driving a plasma display device having a plurality of row electrodes and a plurality of discharge cells corresponding to the row electrodes, in which a field is divided into a plurality of subfields, the method including dividing the plurality of row electrodes into at least a first row group and a second row group, dividing the first row group into a plurality of first subgroups, dividing the second row group into a plurality of second subgroups, address-discharging one of the first subgroups while sustain-discharging a corresponding one of the second subgroups during a predetermined subfield of a first field, address-discharging the first subgroups in a first order during the predetermined subfield of the first field, and address-discharging the first subgroups in a second order during a corresponding subfield of a second field, wherein the second field is consecutive to the first field.

Abstract: Provided is a plasma display panel (PDP) including: a first substrate and a second substrate facing each other; barrier ribs that are arranged between the first and second substrates and that partition a plurality of discharge cells; sustain electrode pairs that are spaced apart from each other on the first substrate, each sustain electrode pair including an X electrode and a Y electrode; and a first dielectric layer that covers the sustain electrode pairs and includes grooves such that at least two grooves correspond to each of the discharge cells and exhaust passages that linearly connect the grooves of neighboring discharge cells, wherein a distance between the X electrodes and the Y electrodes is larger than a height of the barrier ribs.

Abstract: A driving circuit for producing sustain waveforms of a plasma display panel (PDP) is mentioned. The driving circuit includes the functions of voltage clamping and energy recovery. By controlling switches contained in the driving circuit, the supplied voltage source can be made to be only half of the sustain voltage. The voltage stress of some components will therefore be lower. In addition, the numbers of components can be reduced in the driving circuit.

Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.

Abstract: A plasma display panel in which a sustain discharge is generated as an opposed discharge, thereby reducing a discharge firing voltage and improving efficiency. The plasma display panel includes first and second substrates. Address electrodes are formed on the first substrate in a first direction and first electrodes and second electrodes are formed in a second direction crossing the first direction. Each of the first electrodes and the second electrodes has base portions that correspond to discharge spaces of discharge cells and a crossbar portion that connects the base portions along the second direction. The base portions of the first and the second electrodes face each other across a gap in each discharge cell. The length of the portions of the base portions near the first substrate is different from that of the portions of the base portions near the second substrate in the second direction.

Abstract: A plasma display panel (PDP) driving apparatus and a method for displaying pictures on the PDP increases the ability to express low gray scales without increasing the number of sub-fields. Input picture signal data are delayed by one frame and the number of high-order bits, from most significant bits not commonly used by all picture signal data within one frame, is detected. When the number of unused bits is detected, inverse gamma-corrected decimal point bits are shifted to an actual data position by the number of unused bits so as to increase power of expression of low gray scale. The decimal point bits are converted into sub-fields having low gray scale weights, in consideration of the shifting to the actual data position, for display on the PDP.

Abstract: A plasma display device that enables a stable address operation even in a high-speed drive so as to display an image of high definition and high quality. A PDP having discharge cells each provided with a scanning electrode and a sustaining electrode is driven by a method for displaying a frame of an image by repeating an address period, a discharge sustaining period, and a discharge suspend period. At least one initialization period that succeeds a discharge suspend period and in which the state of the wall charge in each discharge cell is initialized is provided. In the discharge suspend period, a voltage is applied between the scanning electrode and the sustaining electrode so that a wall voltage may be generated at which the polarity at the scanning electrode with respect to the sustaining electrode is the same as that of the initializing pulse applied to the scanning electrode in the initialization period.

Abstract: A display device having a display matrix (m+2x by n+2x) including an active, e.g., controllable, pixel border located around the edge locations of a frame buffer matrix for improved character viewability. The border can be several pixels wide, e.g., 1<x<5. In one embodiment, the border is two pixels wide and surrounds a liquid crystal display (LCD) matrix area having (m×n) pixels that are controlled by a frame buffer memory. In one embodiment, the pixels of the border are active pixels and each contain a red, a green and a blue subpixel. The pixel border is useful for increasing viewability, e.g., contrast, of characters that are displayed along the edge of the LCD matrix area in a frame buffer region. The invention includes a border attribute register for containing a color attribute and a brightness attribute, in one embodiment.

Abstract: A plasma display device is provided which is capable of expanding an ensured operating temperature range or operating life time even at time of changes of a driving margin induced by a panel temperature or cumulative operating time of the panel. Display is controlled in a scanning period during which writing discharge is made to occur in a cell, in a sustaining period during which a cell having undergone writing discharge is turned ON for displaying, and in an initializing period during which wall charges in a cell and space charges accumulated before the scanning period starts are initialized. A wall charge adjusting period during which a potential difference between scanning electrodes and data electrodes varies gradually is set and a change rate of a potential between scanning electrodes and data electrodes during the wall charge adjusting period is changed according to the panel temperature and/or cumulative operating time of the panel.

Abstract: A driving circuit of a plasma display panel utilizes only one energy recovery unit for both sides of the panel capacitor. The driving circuit includes a panel capacitor having an X-side and a Y-side, a voltage clamping circuit and an energy recovery unit. The voltage clamping circuit includes four switches and is provided in parallel with the panel capacitor of the plasma display panel. The energy recovery unit is coupled between the X-side of the panel capacitor and the Y-side of the panel capacitor for charging and discharging the panel capacitor.

Abstract: A length of an addressing period in a first sub-field is made shorter as time from an end of a second sub-field which provides light emission just previously to the first sub-field in a frame including the first and second sub-fields to a start of the first sub-field decreases, and as the number of sustain pulses in the second sub-field increases.

Abstract: A PDP driving method. A first sustain discharge pulse is applied to a Y electrode of the PDP during a sustain period, and a stabilization pulse is applied to the Y electrode before a second sustain discharge pulse is applied to the X electrode. Accordingly, amounts of wall charges and space charges after the first sustain discharge are controlled, and the second and subsequent sustain discharges are stably generated.

Abstract: A driving circuit of a plasma display panel utilizes only one energy recovery unit for both sides of the panel capacitor. The driving circuit includes a panel capacitor having an X-side and a Y-side, a voltage clamping circuit and an energy recovery unit. The voltage clamping circuit includes four switches and is provided in parallel with the panel capacitor of the plasma display panel. The energy recovery unit is coupled between the X-side of the panel capacitor and the Y-side of the panel capacitor for charging and discharging the panel capacitor.

Abstract: A driver circuit for plasma display panels is provided. The driver circuit includes four switches and an energy recovery circuit coupled to an equivalent capacitor of a plasma display panel. The present energy recovery circuit includes a first unit, coupled to the X side of the equivalent capacitor, for passing current of charging and/or discharging the equivalent capacitor from the X side; a second unit, coupled to the Y side of the equivalent capacitor, for passing current of charging and/or discharging the equivalent capacitor from the Y side; and a third unit coupled to the first unit, the second unit and ground, the third unit comprising a capacitor, capable of charging and/or discharging the equivalent capacitor from the X side and/or the Y side.

Abstract: It is an object of the present invention to provide a plasma display apparatus in which reliable erase discharge is performed and an erroneous discharge is suppressed, even when a discharge sustain period is shortened so as to realize a PDP having high definition. The above object is achieved in the following manner. In the discharge sustain period, a pulse applied in the later part of the discharge sustain period has a larger pulse width than a pulse applied in the earlier part of the discharge period, except for an initial pulse in the discharge sustain period. In addition, a called narrow pulse is applied in an erase period to perform an erase discharge. According to this method, wall voltages in discharge cells at the end of the discharge sustain period are raised to a higher level than in the related art. As a result, reliable erase discharge is performed, and an erroneous discharge is suppressed.

Abstract: An energy recovery driving circuit of the present invention has a resonant inductor, a primary coil and at least one secondary coil of a transformer, and an energy recovery unit. The resonant inductor is connected to the load for allowing a charge and/or discharge current to be applied to the load to flow through the resonant inductor. The primary coil is connected to the resonant inductor, and is connected to both the resonant inductor and the load so as to allow the charge and/or discharge current to flow through the primary coil when the charging and/or discharge current flows through the load. The secondary coil is coupled to the primary coil. The energy recovery unit generates a current according to the predetermined number of turns of the secondary coil to allow the current flowing through the secondary coil to be recovered to a supply voltage source.

Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells and priming discharge cells, and the top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered sustain electrode SUp+1 to cause priming discharge between even-numbered sustain electrode SUp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered sustain electrode SUp to cause priming discharge between odd-numbered sustain electrode SUp and even-numbered scan electrode SCp+1.

Abstract: A driving circuit for creating sustain waveforms of plasma display panel (PDP) is provided. The driving circuit includes the functions of voltage clamping and energy recovery. The main structure of this driving circuit is composed of 5 switches, two diodes, and an inductor which couple to the panel capacitor of the PDP. The use of more voltage potentials can also be implemented very easily if they are required.