Abstract: An image sensor includes a two-dimensional array of active pixels, where each active pixel in the two-dimensional array of active pixels includes a respective photodiode. The image sensor also includes a plurality of lock-in pixels at two or more regions of the two-dimensional array. Each of the plurality of lock-in pixels includes two pixel elements that share a common photodiode. Each pixel element of the two pixel elements in a lock-in pixel includes a charge storage node and a switch configured to receive a respective control signal to selectively connect the respective charge storage node to the common photodiode.

Abstract: A pixel architecture comprises: an absorption layer, which is configured to generate charges in response to incident light; a semiconductor charge-transport layer, which is configured to transport the generated charges through the charge-transport layer, wherein one or more doped regions are arranged in the charge-transport layer, wherein the charge-transport layer comprises a bias region and a charge-dispatch region being associated with the bias region; an electric connection connecting to and providing a selectable bias voltage to the bias region; and at least one transfer gate, wherein the doped regions and the bias region are differently biased for driving transport of the generated charges towards the charge-dispatch region, and for controlling, together with the at least one transfer gate, transfer of charges from the charge-dispatch region to a charge node.

Abstract: An imaging array and method for using the same that are adapted for backside illuminated imaging arrays utilizing a global shutter are disclosed. The imaging array includes a plurality of pixel sensors having an ordered array of pixel sensors. Each pixel sensor includes a main photodiode and a correction photodiode. A controller resets all of the main photodiodes at a first time that is the same for all of the pixel sensors, resets all of the correction photodiodes at a second time that is the same for all of the pixel sensors after the first time, and sequentially reads out the pixel sensors. The pixel sensor is read out at a third time that is different for different ones of the pixel sensors. A correction charge is measured that corrects for the different readout times.

Abstract: In an image processing apparatus that performs interval moving image capturing, interval image capturing and lighten compositing are sequentially performed, whereby an effective interval moving image can be obtained without advance techniques and cumbersome procedure that have been required for providing special effects to moving images.

Abstract: A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.

Abstract: A solid-state imaging apparatus allows precise observation and analysis of ultra-high-speed phenomena at a frame rate more than 100 Mega frames per second, which has been targeted in advanced science and engineering. The solid-state imaging apparatus comprises pixels arranged in M columns and N rows. Each pixel includes a first layer for photoelectric conversion and a second layer having m charge collection devices, where m is equal to or greater than 3, for collecting and storing charges generated light incident on a substantially whole area of the pixel, and a readout device for reading out the charges, where m charge collection devices are locally placed in an area around a center of the pixel. The second layer further includes a second storage device for storing the charges collected and stored by each of the collection devices.

Abstract: In a signal processing device of an embodiment, an integration circuit accumulates a charge from a photodiode in an integrating capacitor element, and outputs a voltage value according to the amount of charge. A comparator circuit, when the voltage value from the integration circuit has reached a reference value, outputs a saturation signal. A charge injection circuit, in response to the saturation signal, injects an opposite polarity of charge into the integrating capacitor element. A counter circuit performs counting based on the saturation signal. A holding circuit holds the voltage value from the integration circuit. An amplifier circuit outputs a voltage value that is K times (where K>1) larger than the voltage value held by the holding circuit. An A/D converter circuit sets a voltage value that is K times larger than the reference value as the maximum input voltage value, that is, a full-scale value, and outputs a digital value corresponding to the voltage value from the amplifier circuit.

Abstract: Methods, apparatus and systems may operate to copy pixel charge, compensating for image subject shift within in an imaging array during exposure time of an imaging device. Activities may include transferring charge from one or more source pixels to one or more buffer pixels within the same pixel array, and copying the charge to destination pixels within the same pixel array prior to an end of the image integration time. Charge transfer may include transfer of charge from more than one array on a single die. Additional activities may include transferring charge from one or more source pixels to one or more destination pixels multiple times prior to the end of the image integration time.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: An object of the present invention is to provide a solid-state imaging apparatus capable of providing a high S/N ratio in a plurality of operation modes, and a method for driving the same. Provided is a solid-state imaging apparatus including: a plurality of pixels (1), each of the pixels including a photoelectric conversion unit for generating a charge by photoelectric conversion and accumulating the charge; and an amplifier 2 connected to a plurality of the pixels, to amplify the charge generated by the pixels, wherein the amplifier 2 includes an offset voltage setting unit (SW1) for setting at least two offset voltages.

Abstract: This disclosure relates to an active pixel cell including a shallow trench isolation (STI) structure. The active pixel cell further includes a photodiode neighboring the STI structure, where a first stress resulted from substrate processing prior to deposition of a pre-metal dielectric layer increases dark current and white cell counts of a photodiode of the active pixel cell. The active pixel cell further includes a transistor, where the transistor controls the operation of the active pixel cell. The active pixel cell further includes a stress layer over the photodiode, the STI structure, and the transistor, and the stress layer has a second stress that counters the first stress exerted on the substrate, and the second stress reduces the dark current and the white cell counts caused by the first stress.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: A solid state imaging device with an electron multiplying function includes an imaging region VR formed of a plurality of vertical shift registers, a horizontal shift register HR that transfers electrons from the imaging region VR, a multiplication register EM that multiplies the electrons from the horizontal shift register HR, and an electron injecting electrode 11A provided at an end portion of a starting side of the imaging region VR in an electron transfer direction. A specific vertical shift register (channel CH1) into which the electrons are injected by the electron injecting electrode 11A is disposed in a thick part of a semiconductor substrate, and is set in such a way as to be blocked from incident light.

Abstract: In certain embodiments, a system is provided for image capture that includes a unit cell that includes a Capacitor TransImpedance Amplifier (CTIA) subcircuit, a Source Follower per Detector (SFD) subcircuit, and a Direct Injection (DI) subcircuit. The unit cell may operate using one of the subcircuits selected in response to a control signal. A column amplifier may be coupled to the unit cell. The column amplifier may be operable to receive an intermediate signal from the unit cell and couple components of the column amplifier corresponding to the selected subcircuit in response to the control signal. The column amplifier may generate an output signal from the intermediate signal using the coupled components of the column amplifier.

Abstract: Disclosed herein is a solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.

Abstract: A solid-state imaging device which includes a pixel unit, a plurality of pixels in the pixel unit which are two dimensionally arranged in rows and columns and each include a photoelectric conversion element and a reset element, a driver unit which sequentially applies selective scanning to each respective row of the pixel unit, a mode switching circuit, where the mode switching circuit is configured to charge a portion of the pixels in the pixel unit and to apply an intermediate voltage to a gate of each reset element in the non-charged pixels.

Abstract: This invention improves linearity of a solid-state image pickup device beyond that of the prior art source follower to improve image quality. The image pickup device has plural pixels disposed in an array. Each pixel includes: a photodiode (PD); a transfer transistor (Tr1); a floating diffusion (FD); and an amplification transistor (Tr4). A compensating circuit has an amplifier (AP) receiving the output of the amplification transistor (Tr4), and a compensating transistor (M2) matched to the pixel amplification transistor (Tr4). Compensation is provided using negative feedback in the amplifier (AP).

Abstract: The present invention provides a high-speed charge-transfer photodiode encompassing a first conductivity type semiconductor layer (20) serving as a charge-generation region; and a second conductivity type surface-buried region (21a) serving as a charge-transfer region of charges generated by the charge-generation region, wherein a specified direction in the surface-buried region (21a) provided along a plane parallel to a surface of the semiconductor layer (20) is assigned as a charge-transfer direction of the charges, and at least one of a variation of widths of the surface-buried region (21a) measured in an orthogonal direction to the charge-transfer direction and a variation of impurity concentration distributions of the surface-buried region (21a), which are measured along the charge-transfer direction, is determined such that an electric field distribution in the charge-transfer direction is constant.

Abstract: A solid-state image sensor includes a pixel section that outputs a signal charge subjected to photoelectric conversion by each of a plurality of photoelectric transducers, a conversion circuit that converts an output signal from the pixel section into a digital signal by using a triangular wave, and a saturation signal level calculation circuit that calculates a saturation signal level of each photoelectric transducer based on the digital signal from the conversion circuit. The solid-state image sensor further includes a setting circuit which sets a maximum signal level of the triangular wave in accordance with the saturation signal level from the saturation signal level calculation circuit.

Abstract: A focus apparatus comprises a first illuminator for emitting light onto an object, an optical apparatus, an image capture apparatus for receiving an image of the object through the optical apparatus, and converting the image into electronic signals, a spectroscope, a coaxial light apparatus and a patterned light apparatus. The coaxial light apparatus and the patterned light apparatus are perpendicularly mounted to a spectroscope. The coaxial light apparatus is perpendicular to the patterned light apparatus. The spectroscope refracts patterned light from the patterned light apparatus and coaxial light from the coaxial light apparatus to the optical apparatus.

Abstract: An analog/digital converter device associated with a detector of an image sensor, including: a comparator capable of receiving the analog signal and delivering a two-states output signal, able to adopt, depending on the analog signal, a first stable state or a second state, a charge injector capable of changing the analog signal by injection of at least one quantity of charges into the capacitor, and a mechanism for commanding the charge injector, capable of receiving the two-state signals and capable of triggering, depending on the two-state signals, plural injections of charges between at least two successive changes in state of the signal, from the first state to the second state and from the second state to the first state.

Abstract: An image sensor according to the present invention includes a charge forming portion forming charges by photoelectric conversion and a charge transfer region including a charge increasing region for increasing the amount of charges. The image sensor is so formed as to increase dark current generated in at least part of the charge forming portion and the charge transfer region in the charge increasing region for calculating an increasing ratio for the charges on the basis of an output value resulting from a charge signal of the increased dark current.

Abstract: An imaging apparatus has a plurality of pixel sections. Each of the pixel sections contains a photoelectric conversion section, a floating diffusion layer FD for storing a charge and a transistor MT containing a gate electrode CG and a floating gate FG. The imaging apparatus includes a transistor LT being on-off controlled as a load transistor of the transistor MT and a control section for switching according to an image capturing mode, drive for injecting a charge responsive to a voltage supplied to the CG into the FG with the transistor LT turned off and reading a change in a threshold voltage of the transistor MT caused by the injected charge as an image capturing signal and drive for reading the voltage output from the transistor MT as an image capturing signal in response to the voltage supplied to the CG with the transistor LT turned on.

Abstract: A solid-state imaging device includes: a plurality of pixel portions each comprising a photoelectric conversion portion disposed in a semiconductor substrate; and a light shield layer disposed over the semiconductor substrate and having openings which are located over parts of the photoelectric conversion portions, respectively, each of the pixel portions further includes: a transistor comprising a gate electrode, a channel region, and a charge storage portion which is located between the semiconductor substrate and the gate electrode and stores charge generated in the photoelectric conversion portion, the channel region and the charge storage portion are covered with the light shield layer, and the photoelectric conversion portion extends to under the channel region of the transistor.

Abstract: An analog/digital converter device associated with a detector of an image sensor, including: a comparator capable of receiving the analog signal and delivering a two-states output signal, able to adopt, depending on the analog signal, a first stable state or a second state, a charge injector capable of changing the analog signal by injection of at least one quantity of charges into the capacitor, and a mechanism for commanding the charge injector, capable of receiving the two-state signals and capable of triggering, depending on the two-state signals, plural injections of charges between at least two successive changes in state of the signal, from the first state to the second state and from the second state to the first state.

Abstract: In an image pickup apparatus including an image pickup device configured by a plurality of pixels having different photoelectric conversion characteristics on each side of the inflection point of the photoelectric conversion characteristic, prior to the image picking-up for recording, resetting the image pickup device twice by using different voltages with the image pickup device being light shielded, generating inflection point data showing an infection point by using imaged data obtained after reset operation, and afterward correcting the inflection points variation by using the inflection point data can correct the variation of the photoelectric conversion characteristic in a substantially real time. And it can provide a less expensive and high image quality image pickup apparatus and a method for taking a high quality image.

Abstract: Disclosed herein is a solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.

Abstract: An imaging apparatus includes an imaging device, an imaging device deriving unit and a signal processing unit. Pixels of the imaging device include a first pixel group and a second pixel group. The imaging device driving unit exposes the first pixel group during a first exposure period, exposes the second pixel group during a second exposure period, and reads first image data captured by the first pixel group and second image data captured by the second pixel group separately. The signal processing unit performs image processing for the first and second image data. A first shooting mode and a second shooting mode are provided. In the first shooting mode, the signal processing unit performs the image processing for the first and second image data separately to generate two pieces of subject image data. In the second shooting mode, the signal processing unit combines the first and second image data.

Abstract: An image sensor including a plurality of photoelectric conversion elements arranged in a main scanning direction, a plurality of switching elements connected to respective ones of the photoelectric conversion elements, individually, and a controller for generating a clock signal to control the switching elements. The photoelectric conversion elements are divided into plural groups, each including a predetermined number (N) of the photoelectric conversion elements. The outputs from the photoelectric conversion elements in one group are read out simultaneously in response to the clock signal generated from the controller, thereby attaining a high speed reading of a document.

Abstract: A camera system at least including: a MOS imaging device at least having a pixel section having a plurality of pixels two-dimensionally arrayed in row and column directions, each having a photoelectric conversion section for generating electrical signal corresponding to a quantity of incident light, an accumulation section for accumulating signal generated at the photoelectric conversion section, a transfer switch means for controlling transfer of signal from the photoelectric conversion section to the accumulation section, a reset switch means for resetting signal of the photoelectric conversion section, an amplification section for outputting a voltage value corresponding to signal of the accumulation section, and a select switch for selecting output of the amplification section, wherein an exposure period is determined by simultaneously resetting signals of the photoelectric conversion section for all pixels and effecting signal transfer from the photoelectric conversion section to the accumulation section

Abstract: A memory and a switchable digital filter supply different numbers of digital distortion correction values. The supplied distortion correction values are converted to an analog distortion correction signal. A passive, analog low pass filter for the analog distortion correction signal generates an analog deflection signal. The low pass filter is optimized only for those of the analog deflection signals having a given sample rate. A controller varies the different numbers of the supplied distortion correction values to maintain the given sample rate of the analog deflection signal for different horizontal scanning rates. The controller selectively implements respective operating modes for different horizontal scanning frequencies in which no interpolated distortion correction values are supplied or different numbers of interpolated distortion correction values are supplied.

Abstract: A solid-state imaging apparatus produces a sequentially-scanned video signal without using an expensive scanning converter. In the apparatus, an imaging device produces an image signal of each line based on the summation of signal charges of two adjacent lines. With the first mode being selected by the operation on the key panel, a timing generator is controlled to generate vertical shift pulses (field readout pattern) such that the two adjacent lines of the alternately-consecutive first and second fields are equal, causing the imaging device to produce an image signal for obtaining a sequentially-scanned video signal. An image signal processor implements the gamma modification process, etc. for the image signal to obtain the sequentially-scanned video signal. Sync signals VD and HD for sequential scanning or skip scanning generated by a sync signal generator are added to the video signal, and the output video signal is obtained.

Abstract: The noise in the photo information output from a CMOS-based active pixel sensor cell is reduced by setting the voltage on the output of the cell to a predetermined voltage, such as ground or the power supply voltage, each time the cell is read prior to the cell being read.

Abstract: An optical detector includes a charge-coupled device (CCD). The CCD comprises an active cell for receiving a narrow beam of incident illumination and generating photoelectrons in response thereto, and a first stage readout register comprising a row of N transfer cells, where N>1. A first stage gate structure transfers charge packets consecutively from the active cell into the first stage readout register, whereby N successive charge packets are read into the N cells respectively of the first stage readout register. N second stage readout registers each comprise M transfer cells, where M>1, and a second stage gate structure transfers N charge packets from the N cells of the first stage readout register into respective first cells of the second stage readout registers and subsequently shifts the N charge packets from the respective first cells of the second stage readout registers to respective Mth cells thereof.

Abstract: Random access charge transfer devices are provided in which it is possible to simultaneously read electric charge that is stored within each detection element (pixel) that is in one of any desired combination of columns and that is also in one of any desired combination of rows. It is also possible to simultaneously read electric charge stored within each detection element or pixel in at least one selected column or row. In addition, it is possible to simultaneously cause injection of some or all of the electric charge stored in each detection element in one of any desired combination of columns and also in one of any desired combination of rows, or to simultaneously cause injection of some or all of the electric charge stored in each detection element in at least one selected column or row.

Abstract: In an array of charge injection device (CID) detectors, integer amplification is incorporated into each respective detector of the array. The amplifier for each CID detector in the array performs multiple nondestructive readouts. This provides a gain of N amplification of the signal charge in that detector wherein the signal charge is accurately replicated in a separate charge storage well defined by a magnitude capacitor coupled to the detector. Thus, at the end of the readout process, this separate well contains charge equal to N times the signal charge, N being the number of nondestructive readout cycles in the readout process.

Abstract: An analog line store comprises a bank of storage capacitors n in number, an n:1 read multiplexer for sequentially sampling from the n storage capacitors as part of a read-then-write operation, a 1:n write multiplexer for sequentially sampling to the n storage capacitors as a further part of the read-then-write operation, and a scanning register for generating control signals for the write multiplexer and the read multiplexer. The storage capacitors have similar capacitances that are substantially invariant with change in stored charge. Such an analog line store is integrated together with a solid-state imager array to provide for the cancellation of fixed pattern noise from the imager video output signal.