Abstract: A MIMO radar system. The system includes a transmitter array, a receiver array, the antenna distances in one of the transmitter and receiver arrays being below the Nyquist limit for unambiguous angle measurements, but the antenna distances in the combination of the transmitter and receiver arrays being above this Nyquist limit. The system further includes a control and evaluation unit, which is designed to transmit via the transmitter array a sequence of transmit signals, which are subdivided into multiple measuring blocks, in each of multiple repeatedly implemented measuring cycles, a uniform multiplex scheme being applied within each measuring block and the multiplex schemes varying from measuring block to measuring block, carry out a Doppler estimation and an angle estimation based on the receiver array, carry out a Doppler correction of the received signals based on the Doppler estimations, demultiplex the Doppler-corrected signals, and refine the Doppler estimations and angle estimations.

Abstract: An image sensor includes: first pixels, each of which receives a pair of light fluxes and outputs a pair of first analog signals; an A/D conversion unit that converts each of pairs of first analog signals to a pair of first digital signals; a digital adder unit that generates digital sum signals each by adding together the pair of first digital signals among pairs of first digital signals; a first output unit that outputs pairs of first digital signals to an external recipient; and a second output unit that outputs the digital sum signals to an external recipient.

Abstract: Disclosed examples include integrated circuits, merge circuits and methods of processing multiple-exposure image data, in which a single pre-processing circuit is used for pre-processing first input exposure data associated with a first exposure of the image, and then for pre-processing second input exposure data associated with a second exposure of the image, and the first and second pre-processed exposure data are merged to generate merged image data for tone mapping and other post-processing. An example merge circuit includes a configurable gain circuit to apply a gain to the first and/or second exposure data, as well as a configurable weighting circuit with a weight calculation circuit and a motion adaptive filter circuit to compute a first and second weight values for merging the pre-processed first and second exposure data.

Abstract: A bond-per-pixel-block image sensor has a pixel array including multiple pixel blocks with selection circuitry to couple signals to an ADC. The image sensor has an image RAM of DRAM superblocks, each superblock with multiple DRAM blocks each having tristate output driving an image RAM output bus, and data input from several of the ADCs. Each DRAM block has an address multiplexor coupled to read and write addresses. DRAM blocks of each superblock are written simultaneously with data wider than a width of the image RAM output bus. A method of capturing and processing images includes reading a first image frame from pixels of a pixel block through ADCs; writing digital pixel data for the first image frame in a first DRAM superblock; and reading pixel data into an alignment buffer. The method includes overlapping reading the first image frame with writing a second image frame into a second superblock.

Abstract: Aspects of the embodiments include an optical fiber formed in a low gravity environment. The optical fiber can be used in airframe applications for missile defense, oil-field applications for down-well laser applications, optical communications, and other applications. The optical fiber can include a fluoride composition, such ZrF4-BaF2-LaF3-AlF3-NaF (ZBLAN), and can be characterized by an insertion loss in a range from 13 dB/1000 km to 120 dB/1000 km. The optical fiber can deliver optical energy with low insertion loss at the desired power and wavelength for the various applications.

Abstract: Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and a photodetector in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate, and the dielectric layer has a recess aligned with the photodetector. The image sensor device further includes a filter in the recess of the dielectric layer. In addition, the image sensor device includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the filter.

Abstract: An image capturing apparatus comprises an image capturing unit configured to repeatedly perform cyclic shooting operation including shooting with a first exposure condition and a second exposure condition different from the first exposure condition; and a correction unit configured to detect a first flicker among frames shot with the first exposure condition and perform flicker correction for a frame shot with the first exposure condition based on the first flicker and to detect a second flicker among frames shot with the second exposure condition and perform flicker correction for a frame shot with the second exposure condition based on the second flicker.

Abstract: Each of pixels in a pixel array includes a photoelectric converter and a readout circuit which outputs a signal in accordance with charges generated in the photoelectric converter. The readout circuit includes a group of transistors which are disposed so as to form a current path fed by a current source. The readout circuit of a pixel in a first line in the array and the readout circuit of a pixel in a second line in the array are disposed between the photoelectric converter of the pixel in the first line and the photoelectric converter of the pixel in the second line. Directions of currents respectively flowing through the group of transistors in the readout circuit of the pixel in the first line and the plurality of transistors in the readout circuit of the pixel in the second line are the same.

Abstract: A method for creating a distance dependent display that comprises providing an image separating mask having a plurality precision slits arranged in a pattern, generating an interlaced image from a plurality of images according to the pattern, and combining the interlaced image and the image separating mask to allow an observer to view substantially separately each the image from a respective of a plurality of different distances from the image separating mask.

Abstract: According to one embodiment, a method includes generating a first clock signal and a second clock signal with non-overlapping clock phases. The method may further include latching, by a plurality of master latches of a shift register, a plurality of values at a plurality of inputs of the master latches in response to a particular type of logical transition of the first clock signal. The method also includes latching, by a plurality of slave latches of the shift register, a plurality of output values of the plurality of master latches at a plurality of inputs of the slave latches in response to a particular type of logical transition of the second clock signal.

Abstract: A column circuit for an image sensor includes a first column read circuit configured to read data of a first column line, and a second column read circuit configured to read data of a second column line, wherein, during a binning mode, data from two or more pixels are outputted through the first column line and stored in the first column read circuit in a first phase, data from two or more pixels are outputted through the second column line and stored in the second column read circuit in a second phase, and charges are shared between the first column read circuit and the second column read circuit in a third phase.

Abstract: A solid-state image sensing device includes an image sensing region having pixels arranged in a two-dimensional array. A vertical shift register circuit selects a desired pixel row of the pixels by changing the number of one or more clock signals supplied and timing thereof in one horizontal period. A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.

Abstract: An imaging apparatus comprises: a plurality of memory capacitors for holding signals output from pixels; and a plurality of first switches for respectively connecting the memory capacitors to a common signal line, wherein each of the plurality of memory capacitors includes a terminal connected to the corresponding first switch and supplied with the corresponding signal output from the corresponding pixel, and another terminal supplied with a reference potential, a reference potential supplying unit supplies a first reference potential during a period in which the plurality of memory capacitors hold the signals, and supplies a second reference potential having a potential difference from a potential of the common signal line before turning-on of the first switch, the potential difference being larger than that of the first reference potential, during a period in which the first switches are turned on.

Abstract: A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits.

Abstract: An image capture apparatus includes an image sensor, a determination unit which determines one image capturing mode, a driving unit which drives the image sensor by different driving methods in the respective image capturing modes, and a control unit which controls the operation of the driving unit. The image sensor includes a plurality of two-dimensionally arrayed pixels, a predetermined number of vertical output lines arranged for each array of pixels, and a holding memory which holds pixel signals from pixels on rows. The control unit drives the image sensor in the first power save mode when a horizontal transfer period is not less than twice a vertical transfer period, and drives the image sensor in the second power save mode when the vertical transfer period is not less than twice the horizontal transfer period.

Abstract: A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits.

Abstract: An image sensing apparatus comprising on a single semiconductor substrate: a pixel array; a vertical scanning unit; a horizontal scanning unit; a counter which starts a counting operation to count the number of the clocks before a start of the first period, and stops the counting operation before a start of the second period during the first period; and a generation unit which generates a first control signal for causing the vertical scanning unit to drive a pixel, the generation unit including a signal generation unit which generates a second control signal in accordance with the counted value output from the counter, and a delay unit which delays the second control signal to generate the first control signal and output the first control signal to the vertical scanning unit.

Abstract: A solid-state imaging apparatus includes: a pixel region including a plurality of pixels, each including a photoelectric conversion element, arranged in matrix, and a reset switch for discharging electric charge of the photoelectric conversion element; and a first scanning circuit for supplying a reset control signal for controlling an operation of the reset switch, the pixel region and the first scanning circuit being formed on a semiconductor substrate, in which the pixel region includes a first pixel region and a second pixel region, and the first scanning circuit includes a first decoder for controlling the operation of the reset switch arranged in the first pixel region, and a second decoder for controlling the operation of the reset switch arranged in the second pixel region.

Abstract: A solid-state imaging apparatus including: a pixel section having two-dimensionally arranged pixels each containing a photoelectric conversion device for converting a light signal into a signal electric charge and accumulating the signal electric charge, an amplification means for amplifying and outputting as a pixel signal the signal electric charges accumulated at the photoelectric conversion device, a transfer means for transferring the accumulated signal electric charges to the amplification means, and a reset means for resetting the signal electric charges; a vertical scanning section for outputting a vertical scanning signal to drive/control the pixel section row by row; and a vertical selecting section for generating a row transfer signal in accordance with the vertical scanning signal to drive the transfer means and for generating a row reset signal having a falling edge delayed by a predetermined amount from the row transfer signal to drive the reset means.

Abstract: Multiple images are captured where the exposure times for some of the images overlap and the images are spatially overlapped. Charge packets are transferred from one or more portions of pixels after particular integration periods, thereby enabling the portion or portions of pixels to begin another integration period while one or more other portions of pixels continue to integrate charge. Charge packets may be binned during readout of the images from the image sensor. Comparison of two or more images having different lengths of overlapping or non-overlapping exposure periods provides motion information. The multiple images can then be aligned to compensate for motion between the images and assembled into a combined image with an improved signal to noise ratio and reduced motion blur.

Abstract: When still images are captured, signals read from all pixel cells of a pixel cell array having a Bayer array of color filters are selected, as a first output to be recorded and displayed, by an output selector. When moving images are captured, a 9-pixel binned signal is selected as the first output by the output selector, and a differential component between an output signal of a pixel cell located at the center-of-mass position of the 9 pixels, and the 9-pixel binned signal, is supplied as a second output from a memory circuit. Contrast information of a subject image is acquired based on the second output to perform lens focus adjustment.

Abstract: For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.

Abstract: A solid-state imaging apparatus includes: a pixel region including a plurality of pixels, each including a photoelectric conversion element, arranged in matrix, and a reset switch for discharging electric charge of the photoelectric conversion element; and a first scanning circuit for supplying a reset control signal for controlling an operation of the reset switch, the pixel region and the first scanning circuit being formed on a semiconductor substrate, in which the pixel region includes a first pixel region and a second pixel region, and the first scanning circuit includes a first decoder for controlling the operation of the reset switch arranged in the first pixel region, and a second decoder for controlling the operation of the reset switch arranged in the second pixel region.

Abstract: An image converter tube 2c and a plurality of image sensors CCDs 1 (eight CCDs 1 here) are provided, and the respective CCDs 1 and image positions in the image converter tube 2c are in one-to-one correspondence. By carrying out at least one of a control to make a shift to a different image position after image formation in one and the same image position for a predetermined number of frames, and a control to make a shift to a different image position in an imaging cycle with a predetermined time interval, various image pickup situations can be accommodated without changing the structure of CCDs 1 per se.

Abstract: A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits.

Abstract: An imaging system configured with readout circuit redundancy is disclosed. Pixel data from a particular column can be steered around a defective readout circuit to an operational readout circuit. Thus, larger imaging arrays which are generally more prone to common column circuitry defects are enabled. In addition, imaging systems configured with significant on-chip signal processing, which are also more prone to common column circuitry defects, are enabled. The occurrence of lost pixel data from an entire column is eliminated or otherwise reduced, thereby increasing overall operability and yield of the imaging system. The system can be implemented on a single chip or a chip set.

Abstract: An image pickup apparatus includes horizontally and vertically arranged charge-generating pixels, vertical charge transfer elements reading out charges generated by the pixels of vertical pixel lines, a horizontal charge transfer element reading out charges read out by the vertical transfer elements, in the horizontal direction, and a controller controlling a first mode dividing the pixel charges into fields and sequentially reading out the fields to form an image of one frame, and a third mode thinning out the pixel charges of a first field and reading them out to the vertical transfer elements, thinning out charges of the pixels of a third field to read them out to the vertical transfer elements, adding together the charges read out to the vertical transfer elements in the first and third fields and reading out the added charges to the horizontal charge transfer element to form an image of one frame.

Abstract: A solid-state imaging device, and a camera provided with this device, that can output high quality images at high speed are realized by preventing improper OB clamping in a solid-state imaging device that performs pixel mixing in the horizontal direction. Vertical final stages, which are the transfer stages closest to a horizontal transfer component 4, are provided with provided with independent transfer electrodes V3-1, V3-2, V3-3, V6-1, V5-2, and V5-3 that are independent of other columns in a region between the horizontal transfer component and an effective pixel region, and a common transfer electrode that is common to all of the columns in the region between the horizontal transfer component 4 and the OB region. Further, in the vertical final stages, the entire region between the OB region and the horizontal transfer component, or the region minus openings formed for the wiring of V3-1 and V5-1 in the columns closest to the effective pixel region, is covered with a light blocking film.

Abstract: A solid-state imaging element includes: a plurality of light receiving elements provided within an imaging region on a semiconductor substrate; a color filter with a plurality of colors provided on the plurality of light receiving elements for filtering with a predetermined color; a vertical shift register disposed adjacent to the light receiving elements for transferring a charge from the light receiving elements; and a first horizontal shift register and a second shift register disposed interposing the imaging region therebetween for transferring a charge transferred from the vertical shift register and outputting a signal in accordance with the charge, respectively; wherein a respective charge of the light receiving elements accumulated therein in accordance with a light transmitted through filters of the same color in the color filter is transferred exclusively via either one of the first horizontal shift register or the second horizontal shift register to be outputted as the signal.

Abstract: A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits.

Abstract: An imaging processing apparatus for effecting imaging processing on imaging signals inputted from an imaging device having a plurality of pixels arranged on a plane and having color filters attached on an imaging surface, the imaging processing apparatus having: a region determining unit, a first retaining unit, a second retaining unit, a switching unit, and an accumulation unit.

Abstract: A digital frame transfer imager having an image sensor and frame memory in the same chip. The image sensor has an integrated memory controller for controlling transfers of data between the sensor and the memory array. The imager utilizes a rolling shutter and multiple groups of analog-to-digital processing circuitry to readout data from the sensor and to output digital images substantially free from image smear, kT/C noise and other unwanted image artifacts.

Abstract: An external index detection unit (105) receives an image sensed by a camera (100), and detects an external index set in a real scene. A tachometer (110) measures the rotational velocities of two rear wheels of a vehicle. A vehicle measurement unit (120) measures the position and azimuth of the vehicle on the basis of the image coordinate position of the external index and the rotational velocities of the two rear wheels of the vehicle. A head index detection unit (135) receives an image sensed by a camera (130), and detects a head index set on the head of a passenger (132). A head measurement unit (140) measures the position of the head on the basis of the image coordinate position of the head index.

Abstract: There is disclosed a solid-state image pickup device in which light receiving elements of a light receiving region generates information charges in accordance with incident lights. The information charges are transferred to storage picture elements of a storage region, and subsequently emitted as image signals. Here, the storage region is formed smaller than the light receiving region. Only the information charges of a selected region are transferred from the light receiving elements of the light receiving region to the storage region. Therefore, thinned-out image signals can be obtained.

Abstract: A solid-state image sensor includes photodiodes, which constitute pixels, shifted in position from each other and red (R), green (G) and blue (B) filter segments fitted on the photodiodes in a preselected pattern. R transfer gates, G transfer gates and B transfer gates each are connected to a particular vertical transfer electrode. Particular vertical drive pulses are fed to the electrodes to drive the transfer R, G and B transfer gates. Photodiode read pulses are applied to each of the electrodes at a particular timing on the basis of image signals output from the image sensor. Consequently, a signal charge generated in each photodiode is shifted to a particular vertical transfer path via the R, G or B transfer gate in accordance with color-by-color exposure time.

Abstract: A fast imaging device 32 has a charge signal converter 33, a charge signal accumulator 36 and a charge signal transporter 37. A charge signal accumulator 36 is provided to each charge signal converter 33. A charge signal accumulator 36 extends linearly while inclining with respect to a line L2 connecting charge signal converter 33. The other end of a charge signal accumulator 36, connected at one end thereof to a charge signal converter 33 constituting a corresponding column, merges to a charge signal transporter 37. This construction reduces noise and increases a frame rate.

Abstract: Provided is a CCD image sensor wherein driving power and power consumption are reduced without increasing unusable regions. Photodiodes are arranged in a honeycomb form. Each vertical charge-transfer channel is made in such a manner that invasion portions, which invade spaces between the respective photoelectric transducers in photoelectric transducer columns positioned at both sides thereof, and non-invasion portions are alternately and continuously arranged, and the channel extends in the vertical direction to meander between the photodiodes arranged in the honeycomb form. Transfer electrodes extending in the horizontal direction to pass between the photodiodes are formed on the semiconductor substrate as monolayer electrodes. By making the transfer electrodes as the monolayer electrodes in this way, multi-layered poly-silicon electrode structure becomes unnecessary.

Abstract: There is provided an image pickup apparatus including a plurality of pixels which are arranged in a horizontal and a vertical direction and which generate charges corresponding to optical signals, in which a color filter arrangement of a first order are arranged in horizontal pixel rows of odd numbers and a color filter arrangement of a second order are arranged in horizontal pixel rows of even numbers; and a drive circuit having a first mode for reading out pixel data of 2k+1 fields (k is a natural number) by an interlace operation from the plurality of pixels, a second mode for reading out pixel data of one field among the 2k+1 fields from the plurality of pixels, and a third mode for reading out images of a plurality of fields, the number of which is smaller than the of the 2k+1 fields, among the 2k+1 fields from the plurality of pixels.

Abstract: In a solid-state image pickup device, third transfer electrodes are disposed in parallel to vertical transfer registers, and second transfer electrodes are disposed vertically to the vertical transfer registers. These transfer electrodes are also formed on the read-out gate portions to supply a driving voltage for reading out signal charges from photoelectric conversion elements. On the basis of the driving voltage applied to both the third and second transfer electrodes, the read-out of the signal charges to the vertical transfer registers is carried out. At the portion where the read-out of the signal charges is carried out, the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element are formed so as to be adjacent to each other. At the portion where no read-out of signal charges is carried out, an offset area is provided between the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element.

Abstract: In a solid state imaging apparatus of the present invention, first and second charge-coupled devices (CCDs) 336A and 336B are prepared as two charge accumulation circuits for one photodiode 330. The first and second CCDs 336A and 336B additionally accumulate charges during an on-state and an off-state of a light emitting source in the imaging apparatus, respectively. After the additional charge accumulation, the additionally accumulated charges in the first and second CCDs 336A and 336B are fed to first and second charge transfer CCD registers 333A and 333B, respectively. The charges in the first and second charge transfer CCD registers 333A and 333B are shifted in sequence to thereby output first and second charge signals, respectively. A differential amplifier 334 of the imaging apparatus calculates and outputs a differential signal between the first charge signal and the charge second signal. By using the imaging apparatus of the present invention, the effect, e.g.

Abstract: A solid-state image pickup device for generating image signals in accordance with incident light includes a semiconductor substrate with a semiconductor region formed on one surface thereof, plural channel regions extending in a column direction on the region and defining plural picture elements in which electric charges are accumulated, and plural transfer electrodes extending in a row direction on the semiconductor region. The picture elements include light receiving elements accumulating electric charges according to incident light and storage elements for storing charges transferred from the light receiving elements.

Abstract: A solid state image pickup device including: a plurality of pixel groups disposed on a two-dimensional plane defined by horizontal and vertical directions, the plurality of pixel groups being juxtaposed in the horizontal direction, each of the pixel groups including a first pixel column and a second pixel column, the first pixel column including a plurality of pixels regularly disposed at a first pixel pitch in the vertical direction, the second pixel column including a plurality of pixels regularly disposed at a half pitch of the first pixel pitch in the vertical direction relative to the first pixel column, the second pixel columns being disposed in the horizontal direction at a half pitch of a second pixel pitch of pixels of adjacent first pixel columns of the pixel groups; a first separation region formed between pairs of the pixel groups adjacent in the horizontal direction; a single vertical charge transfer path extending in the vertical direction and weaving between the first and second pixel columns o

Abstract: A method of driving a solid-state imaging device to increase the dynamic range of a CCD image sensor is described. The imaging device has a plurality of light receiving members arranged in a matrix in horizontal and vertical directions. In addition, a plurality of columns of vertical CCD registers associate with the light-receiving members for storing signal charges received from a plurality of light receiving members. A row of horizontal CCD registers is disposed and connected with one end of each columns of vertical CCD registers to transfer the signal charges received from those vertical CCD registers to an output circuit member. The method comprises receiving the signal charges from an object by those light-receiving members for a time period Cs firstly in a normal fashion in BLANKING “high” period.

Abstract: Provided is a CCD image sensor wherein driving power and power consumption are reduced without increasing unusable regions. Photodiodes are arranged in a honeycomb form. Each vertical charge-transfer channel is made in such a manner that invasion portions, which invade spaces between the respective photoelectric transducers in photoelectric transducer columns positioned at both sides thereof, and non-invasion portions are alternately and continuously arranged, and the channel extends in the vertical direction to meander between the photodiodes arranged in the honeycomb form. Transfer electrodes extending in the horizontal direction to pass between the photodiodes are formed on the semiconductor substrate as monolayer electrodes. By making the transfer electrodes as the monolayer electrodes in this way, multi-layered poly-silicon electrode structure becomes unnecessary.

Abstract: The invention is intended to provide a highly integrated solid-state image pickup device, in which the number of transfer electrodes of a horizontal shift register is reduced, and a plurality of vertical shifter registers are arranged with a reduced pitch therebetween. Output-control gate electrodes are disposed at an output end of the vertical shift registers. These output-control gate electrodes are operated independently from vertical transfer gate electrodes, and temporarily reserve information charges. Horizontal transfer gate electrodes corresponding to the vertical shift registers on odd-numbered columns are turned on, so signals charges in these vertical shift registers are read into a horizontal shift register. During horizontal transfer of these information charges, information charges of vertical shift registers on even-numbered columns are reserved, for half of a horizontal scanning period, in output ends of the vertical shift registers by the output-control gate electrodes.

Abstract: An image pick-up apparatus including an image sensor with a matrix of radiation-sensitive elements, notably a CCD image sensor, is provided with a control circuit for selecting gate electrodes as collecting gate electrodes or as isolating gate electrodes by application of an electric potential of suitable polarity. Groups of collecting gate electrodes are separated from one another by isolating gate electrodes. The surface area of such a group of collecting gate electrodes co-determines the modulation transfer function and hence the spatial resolution of the image sensor; this surface area, and hence the spatial resolution, can be adjusted by adjustment of the electric potentials. Notably the spatial resolution can be rendered dependent on the different modes of operation of the image pick-up apparatus, for example when the image pick-up apparatus forms part of an X-ray examination apparatus which is suitable for fluoroscopy as well as for making X-ray images.

Abstract: An addressing circuit designed for implementation within the device being addressed that uses less silicon space by selecting the desired address with shift register outputs. A fast shift register is coupled to a slow shift register by a combinatorial circuit having inputs from the fast shift register and the slow shift register to providing the selected address. A timing circuit is electrically coupled to each the fast shift register and the slow shift register. A mode select circuit that is operatively coupled to at least one of either the fast shift register or the slow shift register. The mode select circuit comprises a Boolean logic circuit that is operatively coupled to at least one of either the slow shift register or the fast shift register, the Boolean logic circuit having at least one logical input that determine a first portion of at least one of the shift registers to be used and a second portion of at least one of the shift registers to be discarded.

Abstract: An image sensing apparatus with an image sensor which comprises a plurality of sensors (47) each provided on each of pixel (37) forming a photo-receptive area (36), the sensor generating an electric signal in response to brightness of incident light from a subject; and a plurality of dual-function CCDs (40A-40H) for signal storage and read-out connected to the sensors, respectively, the dual-function CCDs each comprising a plurality of charge storage elements. The dual-function CCDs are of substantially linear shape, elongated over two or more of the pixels, and arranged parallel to each other. During an image sensing process, electric signals generated in the sensors of the pixels are transferred parallel in one direction by the plurality of dual-function CCDs, whereby the electric signals generated in the sensor are stored in the charge storage elements of the dual-function CCDs.

Abstract: A solid-state imaging apparatus includes a solid-state imaging device and a signal processing circuit. The solid-state imaging device includes: a plurality of photoelectric converting sections provided with color filters having different spectroscopic characteristics, and each converting light incident thereon into a charge and accumulating the charge, and a plurality of vertical charge transfer sections for vertically transferring the charge read from each of the photoelectric converting sections. A plurality of reading operations to read the charges accumulated in the photoelectric converting sections to the plurality of the vertical charge transfer sections are performed within a time duration for scanning an image for one image plane, and the charges read from the photoelectric converting sections are transferred through the vertical charge transfer section separately for each of the reading operations.

Abstract: There is provided a solid state imaging apparatus which has realized sharing of signal charges without generation of a fault of image like a vertical stripe resulting from defective sharing of signal charges in a horizontal transfer register consisting of a pair of transfer sections for horizontal transfer by sharing therewith the signal charges of the same pixel. In this solid state imaging apparatus, a pair of horizontal transfer registers 4 (6) are provided to execute horizontal transfer by sharing the signal charges of the same pixel in the first horizontal transfer register 4 in the side of the image section with a pair of transfer sections 4a, 4b with the control gate section 5. For the sharing of signal charges, a transfer channel 17 is formed in the transfer gate section 5 between the bit (.phi.H2) of the transfer section 4a and the bit (.phi.H1) one bit after, in the horizontal transfer direction, the bit (.phi.