Line Doublers Type (e.g., Interlace To Progressive Idtv Type) Patents (Class 348/448)
  • Patent number: 7525599
    Abstract: A method for processing video information may include calculating a plurality of motion indicators for a plurality of pixels in a current field and at least one corresponding plurality of pixels in at least one adjacent field. At least one of the plurality of motion indicators may indicate an amount of weave artifacts that are created, if the plurality of pixels in the current field are woven with the corresponding plurality of pixels in the at least one adjacent field. The calculated plurality of motion indicators may be combined to generate a blend control value that indicates an amount of weaving and spatial interpolation that is to be done for a current output sample value. The current output sample value may be generated based on the generated blend control value.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: April 28, 2009
    Assignee: Broadcom Corporation
    Inventors: Alexander MacInnis, Chenghui Feng
  • Publication number: 20090102966
    Abstract: Systems and methods of processing pixel information associated with video image deinterlacing are disclosed. In one exemplary implementation, the method may include performing an edge adaptive interpolation process on a present field so as to determine whether an edge passes through a pixel, wherein the edge adaptive interpolation process provides edge data including a first intensity estimate for the pixel, receiving motion data associated with motion compensation processing, including an estimated motion vector for at least one pixel proximate to the pixel in at least one reference field, determining a second intensity estimate for the pixel as a function of the edge data and the motion data, and performing an intensity-calculation procedure, wherein an interpolated intensity of the pixel is calculated as a function of the first intensity estimate and the second intensity estimate.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Applicant: Trident Technologies, Inc.
    Inventors: Jiande Jiang, Jun Zhang, Yong Wu, Dong Wang, Chun Wang
  • Patent number: 7522214
    Abstract: A method of adaptive deinterlacing of video data includes generating a selected pixel value at a given pixel position of a current interlaced field by either weaving a pixel value from another interlaced field, when no motion is detected at the pixel position, or by interpolating between other selected pixel values of the current field, when motion is detected at the pixel position. When the pixel value is generated by weaving, a test for feathering is performed. If feathering is detected, a further check is performed for motion at the pixel position over a selected number of preceding fields. In the absence of motion over the preceding fields, the weaved pixel value is utilized as the selected pixel value. If motion is detected over the preceding fields, interpolation is performed between selected pixel values of the current field to generate the selected pixel value.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: April 21, 2009
    Assignee: Magnum Semiconductor, Inc.
    Inventors: Sanjay R. Pillay, Brian F. Bounds, William Lynn Gallagher
  • Patent number: 7518655
    Abstract: A method and apparatus are provided for converting an interlaced video signal to a progressive scan signal. For each pixel in each missing line of a video field providing correlation data for each of set of possible interpolations between adjacent pixels to the pixel to be reconstructed. A confidence measure is then derived from the correlation data and from that confidence measure the interpolation scheme most likely to produce an accurate missing pixel is determined. The missing pixel is then interpolated using the selected interpolation scheme. In this process, the step of deriving a confidence measure comprises determining the number of maxima and minima in the correlation data and deriving the confidence measure in dependence on the number of maxima and minima so determined.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: April 14, 2009
    Assignee: Imagination Technologies Limited
    Inventor: Paolo Giuseppe Fazzini
  • Patent number: 7515205
    Abstract: We describe a weighted absolute difference based deinterlace method and apparatus. The deinterlace method and apparatus uses weighted absolute differences along different directions as means for interpolating pixel data using edge orientation detection. The apparatus includes a memory adapted to store a current and previous fields and predetermined portions of a future field of an input signal. A motion detector is adapted to detect motion between the future and previous fields. An interpolating circuit is adapted to generate a plurality of output pixels using a corresponding plurality of methodologies. And a switch is adapted to select between the plurality of output pixels responsive to the motion detector.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: April 7, 2009
    Assignee: Pixelworks, Inc.
    Inventors: Zhongde Wang, Dennis Morel
  • Patent number: 7515204
    Abstract: A method and system for performing fuzzy logic based de-interlacing on film source fields that might be mixed with video on film. An embodiment of the invention comprises an adaptive de-interlacer by weighing between merge operation and interpolation operation in the case of occurring video on film motion object. A weighing factor is generated from video on film pattern based on fuzzy logic inference rules. This weighing factor specifies the weighting between merging and interpolating in assigning the pixel values of the progressive display output.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: April 7, 2009
    Assignee: Pixelworks, Inc.
    Inventors: Lei He, Hongmin Zhang
  • Publication number: 20090086091
    Abstract: According to one embodiment, top- and bottom-field picture signals in an interlaced picture signal are stored in sequence into a frame memory. A top-field brightness conversion unit reads a top-field picture signal from the frame memory, divides an interval in which that top-field picture signal is used into four subintervals, and produces in the subintervals top-field picture signals obtained by changing the brightness of the top-field picture signal. A bottom-field brightness conversion unit reads a bottom-field picture signal from the frame memory, divides an interval in which that bottom-field picture signal is used into four subintervals, and produces in the subintervals bottom-field picture signals obtained by changing the brightness of the bottom-field picture signal. A combining unit combines the brightness changed top-field picture signals and the brightness-changed bottom-field picture signals into a frame picture signal.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 2, 2009
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Hiroaki Komaki
  • Publication number: 20090086092
    Abstract: An image processing apparatus detects an amount of pixel motion in a plurality of field images included in interlace image data, and determines a pixel region having a large motion by comparing the amount of the motion of the detected pixel to a predetermined threshold value. An image processing apparatus combines a predetermined pattern with the pixel region that has a large motion and is converted from the interlace image.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Akihiro Oishi
  • Patent number: 7508448
    Abstract: Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: March 24, 2009
    Assignee: NVIDIA Corporation
    Inventors: Stephen D. Lew, Garry W. Amann, Hassane S. Azar
  • Patent number: 7505080
    Abstract: A motion compensation deinterlacer for producing a progressive scan signal from an interlaced signal includes a motion compensation unit that derives missing lines in an interlaced field from at least one other field in the interlaced signal. The deinterlacer includes a device that derives a first confidence measure for the accuracy of the motion compensation unit using known lines of the field for which missing lines are to be derived. Another device derives a second confidence measure for the accuracy of the motion compensation unit using known lines of at least two other fields. The first and second confidence measures are combined. An output unit selects outputs for display from at least the motion compensation unit and one other deinterlacing device in dependence on the combined confidence measures.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: March 17, 2009
    Assignee: Imagination Technologies Limited
    Inventor: Peter David Leaback
  • Patent number: 7502071
    Abstract: A video information processing apparatus capable of accurately making a motion decision is provided. The apparatus stores interlaced video information for a plurality of fields, generates motion information on each of the pixels contained in a plurality of fields from at least one of the interlaced video information and stored video information, and generates motion information on an interpolation pixel from motion information on pixels contained in the same field as the interpolation pixel among the generated motion information on each of the pixels. The apparatus also generates motion information on the interpolation pixel from motion information on the pixels contained in fields previous and next to the interpolation pixel at the same position as the interpolation pixel, and determines the motion information on the interpolation pixel from the motion information on these pixels.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: March 10, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiichi Matsuzaki, Kenji Inoue, Takashi Tsunoda
  • Publication number: 20090059066
    Abstract: A double rate processing part generates, at a double rate, a non-interlaced image signal every frame to twice generate a double-rate non-interlaced signal which has identical information duplicately. An interlace part, after a predetermined process is carried out on the double-rate non-interlaced signal twice generated by the double rate processing part, extracts an odd scan lines from one of the twice generated double-rate non-interlaced signal to generate an odd scan line image signal, extracts an even scan lines from the other of the twice generated double-rate non-interlaced signal to generate an even scan line image signal, so as to obtain an interlaced image signal for one frame.
    Type: Application
    Filed: August 22, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhiro Yamauchi, Takahiro Fujimoto
  • Patent number: 7499103
    Abstract: A digital image processor is provided. The digital image processor includes a deinterlacing processor that is implemented upon a digital processing unit. The deinterlacing processor is coupled to an input operable to receive an interlaced video stream, a digital memory for storing portions of the interlaced video signal, and an output operable to transmit a deinterlaced video stream. The deinterlacing processor is operable to perform frequency analysis upon the received interlaced video stream in order to generate the deinterlaced video stream having reduced motion artifacts.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: March 3, 2009
    Assignee: Silicon Image, Inc.
    Inventors: Laurence A. Thompson, Dale R. Adams
  • Patent number: 7499102
    Abstract: An image processing apparatus using a judder-map and a method thereof. The image processing apparatus using a judder-map includes: a field storage block to receive an input interlaced video signal including an input image having a plurality of consecutive fields, a film detecting block to receive the plurality of the consecutive fields from the field storage block and to detect whether the input image is an image in a film mode, a judder-map generating block to detect judder created on a pixel or block of neighboring fields among the plurality of consecutive fields provided from the field storage block to generate a judder-map, and an image interpolating block to perform image interpolation using the judder-map if the input video signal is detected to be an image in the film mode and to generate and output a progressive video signal. The image processing apparatus prevents the creation of judder on CGI (Computer Graphic Imagery) or subtitles, to which pulldown technologies are not applied.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: March 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-ho Lee, Seung-joon Yang
  • Publication number: 20090051809
    Abstract: System and method for combining interlaced video frames. A method embodiment for displaying a de-interlaced video sequence includes receiving a video stream, decoding the video stream to produce a sequence of interlaced video fields, creating a first de-interlaced video frame by combining at least two interlaced video fields, determining a cadence of the first de-interlaced video frame, and outputting the first de-interlaced video frame in a next de-interlaced video frame display time slot if the first de-interlaced video frame has proper cadence, while if the de-interlaced video frame has a broken cadence, re-outputting a previously outputted de-interlaced video frame in the next de-interlaced video frame display time slot. A feed-forward control signal may be used to determine which de-interlaced video frame to output and helps to minimize latency as well as storage requirements.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Inventor: Marshall Charles Capps
  • Publication number: 20090040375
    Abstract: A display controller capable of detecting data line similarity is provided. The display controller includes a buffer for temporarily storing a plurality of data lines of a target field, a data line similarity detector, coupled to the buffer, for detecting a similarity of each data line of the target field, a data line state recorder for recording the similarity of each data line of the target field, a de-interlacer coupled to the buffer, and a scaler coupled to the de-interlacer, wherein the de-interlacer selectively de-interlaces the target field according to the content stored in the data line state recorder in order to generate a de-interlaced output, and the scaler generates a scaling output according to the de-interlaced output.
    Type: Application
    Filed: October 23, 2008
    Publication date: February 12, 2009
    Inventor: Scott Jen
  • Publication number: 20090040373
    Abstract: An interface converting circuit applied between a 3D de-interlace chip and a rear-end image compression chip. The interface converting circuit includes: a reducing FPS circuit, for dividing a first vertical synchronization signal to generate a second vertical synchronization signal, and converting a first horizontal synchronization signal to a second horizontal synchronization signal by masking the first horizontal synchronization signal according to the second vertical synchronization signal; a pixel clock multiplier, for multiplying a first pixel clock signal to generate a second pixel clock signal; and, a data-width converter, for converting an input signal with M bits data width, which is transmitted at a frequency of the first pixel clock signal by the 3D de-interlace chip, to an output signal with M/2 bits data width, which is transmitted at a frequency of the second pixel clock signal.
    Type: Application
    Filed: March 11, 2008
    Publication date: February 12, 2009
    Applicant: ALPHA NETWORKS INC.
    Inventor: CHUNG-MING LO
  • Publication number: 20090040374
    Abstract: This invention enables, for example, reduction of motion blur in a hold-type display device and reduce flicker in an impulse-type display device by a simple process. For this purpose, an LPF filters a frame of input image data (A[i]) to generate low-frequency image data (L). A subtractor and an adder generate high-frequency image data (SH). Another adder adds the low-frequency image data (L) from a delay circuit to subsequent low-frequency image data. A divider halves the sum to generate low-frequency averaged image data (SL). A switch alternately outputs the high-frequency image data (SH) and the low-frequency image data (SL) every time a frame of image data is input. As a result, the apparatus of this invention can generate output image data having a frame rate twice that of the input image data.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 12, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Kiwamu Kobayashi
  • Patent number: 7489361
    Abstract: The invention provides a pixel interpolating method including a step of discriminating, based on an input image signal, a similarity of a discrimination block constituted of plural pixels, and a reference block constituted of plural pixels, positioned close to the discrimination block and shifted upwards or downwards to a position by at least a line with respect to the discrimination block, and a step of outputting, as pixel information of an interpolation pixel positioned between a discrimination block and a reference block having a high similarity, pixel information based on pixel information of a pixel of the discrimination block and/or the reference block having the high similarity.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 10, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiichi Matsuzaki, Kenji Inoue
  • Patent number: 7483577
    Abstract: A method and system processes a compressed input video. The compressed input video is processed to produce an interlaced picture, and macroblock coding information of the input video. The interlaced picture has a first spatial resolution, and a top-field and a bottom-field. The top-field and the bottom-field of the interlaced picture are filtered adaptively according to the macroblock coding information to produce a progressive picture with a second spatial resolution less than the first spatial resolution.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: January 27, 2009
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Jun Xin, Anthony Vetro, Huifang Sun
  • Patent number: 7483082
    Abstract: A method for automatically adjusting chrominance data of an input pixel from a color video signal includes receiving and temporarily storing the chrominance data of the input pixel in a transmission format comprising a color difference representation and converting the chrominance data from the color difference representation in Cartesian coordinates to color hue and color saturation representation in polar coordinates such that color attributes of the input pixel can be analyzed according to hue and saturation values. The method also includes determining a hue adjustment value and a saturation adjustment value based on the color hue value and color saturation value associated with the chrominance data, applying the hue adjustment and the saturation adjustment directly to the chrominance data in its transmission format, and outputting the adjusted chrominance data to an output color video signal.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: January 27, 2009
    Assignee: Kolorific, Inc.
    Inventor: Chih-Hsien Chou
  • Patent number: 7477319
    Abstract: A method for rendering an object on a display screen, comprising the steps of (A) buffering a plurality of pixels in a plurality of line buffers, (B) determining a boundary of the object based on the buffered pixels, (C) determining a direction of the boundary, (D) testing if a pixel in the line buffers is in motion and applying one of a plurality of filter coefficients if the pixel is in motion, where the plurality of filter coefficients define a modified median filter having a predetermined threshold and (E) interpolating a new pixel in the direction of the boundary.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: January 13, 2009
    Assignee: LSI Corporation
    Inventors: Hsi-Chen Wang, Shi-Chang Wang
  • Patent number: 7474354
    Abstract: A binarizer binarizes a video signal input from an A/D converter and a video signal output from a line memory using an average luminance value provided from a detection window video signal processor as a threshold value, and outputs a binary pattern. A reference pattern generator generates a plurality of reference patterns. An angle detector compares the binary pattern with each of the plurality of reference patterns, and outputs the angle of a matched reference pattern as angle information. An arc shape detector outputs the edge angle information of a picture based on a combination of the angle information of an interpolation scanning line including an object interpolation pixel and the angle information of interpolation scanning lines above and below the interpolation scanning line.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: January 6, 2009
    Assignee: Panasonic Corporation
    Inventors: Hideaki Kawamura, Mitsuhiro Kasahara, Tomoaki Daigi
  • Patent number: 7474789
    Abstract: A method for edge direction detection at a selected pixel on a center-line between two lines of an image includes defining two vectors using certain pixels on the two lines. A vector norm is defined which gives an indication of the correlation of between pixels of one vector and pixels of the other vector. If a vertical vector norm value indicates a low correlation in the vertical direction, then it can be assumed that the selected pixel is in a non-vertical edge area. Vector norm values associated with small angles from the vertical direction are used to determine candidate directions for the non-vertical edge. If a candidate direction is verified as being a preferred direction, then a direction-fine tuning process is performed in which vector norm values associated with big angles from the vertical direction are calculated in order to find a more accurate direction for the non-vertical edge.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: January 6, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Xianglin Wang, Yeong-Taeg Kim
  • Publication number: 20090002552
    Abstract: An output of a conventional color-difference inter-field interpolating unit (10) and an output obtained by a color-difference 4:2:0 inter-field interpolating unit (11) and a color-difference intra-field line interpolating unit (12) as a progressive signal through inter-field interpolation by changing a 4:2:2 color-difference signal into a 4:2:0 color-difference signal are switched by a color-difference static image processing method selecting/mixing unit (14) in accordance with an output or the like of a detecting unit (13) for detecting a characteristic of an image signal. Thus, it is possible to realize color-difference signal IP conversion static image processing in which degradation of a correct 4:2:2 color-difference signal is suppressed and jaggy is reduced with respect to a 4:2:2 color-difference signal obtained through interpolation of a 4:2:0 signal.
    Type: Application
    Filed: June 25, 2007
    Publication date: January 1, 2009
    Inventor: Yoichiro Miki
  • Publication number: 20080316356
    Abstract: System and methods for the detection of progressive pulldown in a video sequence are provided. The method comprises calculating a difference between temporally adjacent frames in the video sequence, generating a pattern based upon these differences, and comparing the generated pattern against patterns understood for known progressive film modes in order to determine if the video sequence comprises a known progressive film mode. In one embodiment, the pattern may be adjusted to account for uncertainty in assigning values to the pattern, reducing the likelihood of false detections. In another advantage, confidence metrics are built into the method in order to further reduce the incidence of false detections.
    Type: Application
    Filed: June 21, 2007
    Publication date: December 25, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Zhi Zhou, Yeong-Taeg Kim
  • Patent number: 7468756
    Abstract: Herein described is a system and method of detecting 2:2 and/or 3:2 pull-down video. In addition, aspects of the present invention provide a system and method to identify and lock onto a field phase of a received 2:2 or 3:2 pull-down video signal. The system for detecting a field phase in 2:2 pull-down video comprises a first circuitry that computes unexpected motion values, a second circuitry that implements an alternating straight through or crossover function, a third circuitry that performs processing and generates one or more control signals, a pair of counters, and a phase selection circuitry. The method comprises computing luminance approximations of pixels associated with an output video frame, computing one or more first differences, and computing a second difference for each absent pixel of the output video frame based on one of five field phases.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: December 23, 2008
    Assignee: Broadcom Corporation
    Inventor: Richard Hayden Wyman
  • Patent number: 7468754
    Abstract: A combined de-interlacing and frame doubling system (114, 114? and 114?) advantageously serves to de-interlace successive lines of Present Field Video data at twice the field rate to yield an output bit stream suitable for display on display device that utilizes progressive scanning. The de-interlacing and frame doubling system in accordance with present principles includes a frame memory mechanism (116, 116? and 116?) for storing at least one frame of interlaced video having a prescribed field rate. At least one de-interlacing circuit (11401, 1140?1, 1140?) pulls at least two fields of video data from the memory mechanism at a rate of at least twice the field rate for performing a full de-interlacing function in half of a field period to generate the a progressive, frame doubled signal for receipt at the display device.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: December 23, 2008
    Assignee: Thomson Licensing
    Inventors: Eric Stephen Carlsgaard, David Leon Simpson, Michael Evan Crabb
  • Patent number: 7468757
    Abstract: Herein described are at least a system and a method of more effectively detecting and correcting irregularities when performing an inverse telecine deinterlacing of pull-down video. These irregularities may be caused by editing of the video, which when left undetected, may result in displaying video of unacceptable quality. In a representative embodiment, the method determines a first pixel luminance of an absent pixel using a luminance generated from one or more first present pixels, determines a second pixel luminance of the absent pixel using a luminance generated from one or more second present pixels, and determines a first luminance approximation for the absent pixel. In a representative embodiment, the system comprises a memory, a software resident in the memory, and a processor used to execute the software, such that executing the software performs the inverse telecine deinterlacing to result in an improve displayed video image quality.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: December 23, 2008
    Assignee: Broadcom Corporation
    Inventor: Richard Hayden Wyman
  • Patent number: 7466900
    Abstract: Moving pictures are reproduced from a stored moving-picture signal and output at a set reproduction speed that is a first reproduction speed matching a rate of motion of the moving pictures or a second reproduction speed different from the first reproduction speed. The stored moving-picture signal is reproduced in accordance with the set reproduction speed to obtain first interlaced pictures. The first interlaced pictures are converted to obtain first progressive pictures. Moving pictures to be displayed are selected from the first progressive pictures per frame in accordance with the set reproduction speed to obtain second progressive pictures. Scanning lines of the second progressive pictures are decimated so that the number of remaining scanning lines of the second progressive pictures after decimation is equal to the number of scanning lines of interlaced pictures to be displayed, thus outputting second interlaced pictures.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: December 16, 2008
    Assignee: Victor Company of Japan, Ltd
    Inventor: Kenji Sugiyama
  • Patent number: 7463306
    Abstract: In an arrangement for processing video signals provided as interlaced video signals generated in the interlaced scanning mode, in which two fields constitute one frame, and/or as pseudo-interlaced video signals derived from non-interlaced video signals obtained by means of progressive scanning, flexible use of the arrangement with a minimal number of components for this arrangement is achieved in that at least one video signal-processing unit (1) is provided which receives at least an interlaced video signal or at least a pseudo-interlaced video signal and processes these video signals in dependence upon control data generated by means of a control unit (2), and in that a clock generator (4) is provided which controls the control unit (2) and/or the video signal-processing unit (1) in such a way that, when processing an interlaced video signal or a pseudo-interlaced video signal, possibly new control data are generated and/or taken into account as from the start of its next field or its next frame, respective
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: December 9, 2008
    Assignee: Thomson Licensing
    Inventor: Rolf Grzibek
  • Patent number: 7463307
    Abstract: A display controlling device includes a first line buffer, a second line buffer, a buffer controller, a mixer, a de-interlacing device, a de-interlacing controller, a scaling device, a scaling controller, and a window display controller. The window display controller controls the operations of the mixer, the de-interlacing controller, and the scaling controller according to a first coordinate parameter and a second coordinate parameter, wherein a first video frame and a second video frame are displayed on a display device. The window display controller controls the de-interlacing device and the scaling device to selectively operate in either a first clock or a second clock.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: December 9, 2008
    Assignee: MStar Semiconductor, Inc.
    Inventor: Kun-Nan Cheng
  • Publication number: 20080291323
    Abstract: The interlace/progressive conversion section of an image processing device sequentially receives image data corresponding to odd-numbered lines or sequentially receives image data corresponding to even-numbered lines. The interlace/progressive conversion section performs an even-numbered-line interpolation process that uses sequentially-received image data corresponding to first and second odd-numbered lines and generates image data corresponding to an even-numbered line between the first and second odd-numbered lines, or an odd-numbered-line interpolation process that uses sequentially-received image data corresponding to first and second even-numbered lines and generates image data corresponding to an odd-numbered line between the first and second even-numbered lines.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 27, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Chisato Higuchi, Takeshi Makabe
  • Publication number: 20080284907
    Abstract: Disclosed is a system and method of dual-screen interactive digital television (IDTV), which is implemented by applying modality-independent remote console technology. The system has two ends, referred to as host IDTV and handheld device. The host IDTV includes a host IDTV content, an IDTV middleware, a host graphic user interface (host GUI), and a server-side remote console control protocol. The handheld device includes a handheld IDTV content, an interface generator, a handheld GUI, and a client-side remote console control protocol. In the invention, the DTV content may only have a dual-screen execution mode. The DTV content may also switch between single-screen and dual-screen modes.
    Type: Application
    Filed: September 28, 2007
    Publication date: November 20, 2008
    Inventor: Hsin-Ta Chiao
  • Patent number: 7453518
    Abstract: Correlation of videos between fields is determined between a difference between an input interlaced signal and a signal that is delayed by one field with respect to the input interlaced signal. Correlation among N-1 sequential fields is compared with a predetermined pattern to determine whether the input interlaced signal is unquestionably a telecine-converted signal, whether it is unquestionably not a telecine-converted signal, or whether it cannot be said to be unquestionably a telecine-converted signal. If a determination of being unquestionably a telecine-converted signal is continued for a predetermined number or more of fields, an instruction signal, which instructs to perform inter-field interpolation on the input interlaced signal, is outputted.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 18, 2008
    Assignee: Panasonic Corporation
    Inventor: Takayuki Kimoto
  • Patent number: 7450184
    Abstract: A method of detecting a stream of video data generated utilizing a pull-down technique includes receiving a sequence of fields of interlaced video data. For each pair of a plurality of pairs of the fields of interlaced video in the sequence, pixel values corresponding to pixel positions of pixel lines of a first parity of a first field of the pair of fields are weaved with pixel values corresponding to pixel positions of pixel lines of a second parity of a second field of the pair of fields. For each pixel value corresponding to each pixel position of each pixel line of the second field of the pair of fields after weaving, a check is made for feathering at the corresponding pixel position due to motion.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: November 11, 2008
    Assignee: Magnum Semiconductor, Inc.
    Inventors: Sanjay R. Pillay, Brian F. Bounds, William Lynn Gallagher
  • Patent number: 7446815
    Abstract: A first video signal generation circuit newly generates pixels between pixels in a first progressive video field signal outputted by a first progressive video generation circuit, and outputs a third progressive video field signal. A second video signal generation circuit newly generates pixels between pixels in a second progressive video field signal outputted by a second progressive video generation circuit, and outputs a fourth progressive video field signal. A comparison circuit compares the third progressive video field signal and the fourth progressive video field signal, and outputs the result of the comparison as motion amount information. An output circuit synthesizes an intra-field interpolation signal and a frame interfiled interpolation signal on the basis of the motion amount information, and outputs a composite signal as a progressive video signal.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: November 4, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Kasahara, Tomoaki Daigi, Hideaki Kawamura, Hideto Nakahigashi, Tomoko Morita
  • Patent number: 7446818
    Abstract: An apparatus and related method for detecting film mode using motion estimation. In the method, a pixel region in each field is sequentially chosen as a target pixel region in a target field to be processed with a motion estimation operation.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: November 4, 2008
    Assignee: Realtek Semiconductor Corp.
    Inventor: Po-Wei Chao
  • Patent number: 7443451
    Abstract: A display device can simultaneously receive digital display signal and analog display signal and display a television program corresponding to one of the signals on a display panel. The display device includes the following components: a digital tuner, an analog/digital converter, a video decoder, an audio decoder, a de-interlacer, a scaler, a display driver, a display panel, an audio amplifier, and a speaker. The display device allows the user to watch a television program corresponding to the digital display signal or the analog display signal on the display panel and listen to amplified television audio signal from the speaker.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: October 28, 2008
    Assignee: Tatung Co., Ltd.
    Inventor: Yet-Zen Lin
  • Patent number: 7443448
    Abstract: An apparatus to suppress artifacts in an image signal. The apparatus includes a differential value calculation unit to calculate a differential value between adjacent pixels with respect to an input image signal, a diffusion amount calculation unit to calculate an amount of diffusion between the adjacent pixels on the basis of the differential value calculated by the differential value calculation unit, and a pixel value conversion unit to convert the present pixel value of the image signal inputted on the basis of the diffusion amount between the pixels calculated by the diffusion amount calculation unit. The apparatus changes the pixel value in consideration of the differential value between the adjacent pixels, and thus it can provide a high quality image signal without losing or misrecognizing the artifacts of the image signal.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: October 28, 2008
    Assignee: Samsung Electronics Co. ,Ltd.
    Inventors: Seung-joon Yang, Young-jin Kwon
  • Publication number: 20080259206
    Abstract: An adaptive de-interlacer can convert an interlaced video signal into a progressive video signal, and comprises an intra-field interpolator, an inter-field interpolator, a static pixel detector, a motion detector and a blending unit. The intra-field interpolator outputs an intra-field interpolated pixel based on a current field of the interlaced video signal, and the inter-field interpolator outputs an inter-field interpolated pixel based on successive fields of the interlaced video signal. The static pixel detector detects whether each interpolated pixel is a static pixel based on luminance differences between pixels of the successive fields with reference to a threshold and outputs a detection result. The motion detector generates a motion value for the interpolated pixel based on the successive fields and the detection result.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Yi Pin Lu, Chang Hsien Tai
  • Patent number: 7440032
    Abstract: The present invention relates to a motion compensated image process taking local characteristics of image data into account. Image data included in a single image may stem from different video sources. In order to take specific motion phase into account, the motion compensation process is switched accordingly such that an improved picture quality can be achieved.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: October 21, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Sven Salzer, Frank Janssen
  • Patent number: 7440029
    Abstract: Converting circuits convert the values of multiple items of SD pixel data (pixel value) as class tap data to luminance values. The converting circuits convert pixel values to luminance values based on a correspondence relation between a value of pixel data in an image display device and a luminance value. Class-detecting circuits detect a space class and a motion class based on plural luminance values. Class-synthesizing circuit acquires a class code indicating the class to which the pixel data of a target position in an HD signal belongs. Estimation/prediction-operating circuit obtains items of pixel data of the target position in the HD signal based on an estimation equation using data of an prediction tap and coefficient data of the class indicated by the class code. Consequently, appropriate classification of class to the luminance characteristic of a display device is performed.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: October 21, 2008
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Nobuyuki Asakura, Takeharu Nishikata, Koichi Fujishima
  • Patent number: 7436455
    Abstract: A de-interlacing device having a pattern recognizing unit and a method therefor for receiving an interlaced image and outputting a non-interlaced image. The de-interlacing device includes a first de-interlacing unit, a second de-interlacing unit and a pattern recognizing unit. The pattern recognizing unit receives the interlaced image, recognizes whether or not the interlaced image has an obviously horizontal pattern, outputting the interlaced image to the first de-interlacing unit if yes, and outputting the interlaced image to the second de-interlacing unit if not. The first de-interlacing unit and the second de-interlacing unit use different de-interlacing methods. The first or second de-interlacing unit receives the interlaced image outputted from the pattern recognizing unit and outputs the non-interlaced image accordingly.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: October 14, 2008
    Assignee: Himax Technologies Limited
    Inventors: Fung-Jane Chang, Ling-Shiou Huang, Jiunn-Yau Huang
  • Publication number: 20080246876
    Abstract: A method of de-interlacing interlaced video information including determining functional equations which estimate trajectories of corresponding pixel locations based on statistical information, updating each functional equation with sampled pixel values from the interlaced video information of corresponding pixel locations, and evaluating the functional equations at a time point of a progressive frame and providing corresponding progressive pixel values. A video de-interlace system including a trajectory estimator and a component estimator. The trajectory estimator provides functional equations estimating trajectories of tracked pixel locations based on statistical information. The component estimator receives the functional equations and the interlaced video information and provides progressive pixel values.
    Type: Application
    Filed: April 4, 2007
    Publication date: October 9, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: David A. Hayner, Honglin Sun
  • Patent number: 7432979
    Abstract: An image processing apparatus that can convert an interlaced signal generated by the 3-2 or 2-2 pull-down process, to a progressive signal without degrading the quality of the image represented by the interlaced signal, even if the interlaced signal contains an ordinary 60-fields/sec signal. The apparatus has a progressive conversion unit 11. The progressive conversion unit 11 generates an intra-field interpolated signal and an a motion-adaptive interpolated signal to convert an interlaced signal generated by the 3-2 or 2-2 pull-down process and containing an ordinary 60-fields/sec signal, to a progressive signal. The unit 11 then determines, for each pixel, whether the intra-field interpolated signal contains a double-image error. If a double-image error is detected, the unit 11 replaces, for each pixel, the intra-field interpolated signal by the motion-adaptive interpolated signal.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 7, 2008
    Assignee: Sony Corporation
    Inventor: Tetsuro Tanaka
  • Publication number: 20080239145
    Abstract: According to one embodiment, an image expansion apparatus includes a vertical interpolating part obtaining a pixel value of an interpolation target pixel based on pixel values of an upper pixel and a lower pixel of the interpolation target pixel, a diagonal interpolating part obtaining a pixel value of the interpolation target pixel based on pixel values of a pixel at a diagonally upper side and a pixel at a diagonally lower side of the interpolation target pixel, which are two pixels in opposite directions with the interpolation target pixel as a center, a difference computing part obtaining a difference between a pixel value of an image block including the interpolation target pixel and a mean value of pixel values of two image blocks at both left and right sides of the image block, as an index value expressing an edge shape in a periphery of the interpolation target pixel, and a mixing part mixing the pixel value of the interpolation target pixel obtained by the vertical interpolating part and the pixel va
    Type: Application
    Filed: February 14, 2008
    Publication date: October 2, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tadayoshi Kimura
  • Patent number: 7430014
    Abstract: A de-interlacing device capable of de-interlacing a video field adaptively and associated method, the device includes a video field detector for detecting a video field and for outputting a motion detection parameter, a motion detector for detecting a motion difference between the video frame and at least one video frame neighboring the video frame, and for determining a motion ratio for the motion difference according to the motion detection parameter, and a de-interlacing unit for de-interlacing the video field according to the motion ratio output from the motion detector.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: September 30, 2008
    Assignee: MStar Semiconductor, Inc.
    Inventors: Kun-Nan Cheng, Zhi-Ren Chang
  • Publication number: 20080231747
    Abstract: A deinterlacing method for a digital motion picture is provided. The method includes determining if a predicted pixel lies in an artificial horizontal line or not according to the relationship among a first pixel value, a second pixel value, a first threshold value and a second threshold value; and estimating the predicted pixel value in a still image manner if the predicted pixel is determined to lie in an artificial horizontal line. The present invention also includes an apparatus implementing the deinterlacing method.
    Type: Application
    Filed: July 7, 2007
    Publication date: September 25, 2008
    Inventors: Hua-Sheng Lin, Jiunn-Shyang Wang, Sheng-Che Tsao
  • Publication number: 20080231746
    Abstract: A method and a system is provided for deinterlacing interlaced video containing an interlaced image field f including scan lines of multiple pixels. Such deinterlacing involves detecting the one or more edge directions in the image field f using principal component analysis (PCA), and performing spatial interpolation to reconstruct a missing pixel value in the image field f substantially along each of the one or more detected edge directions.
    Type: Application
    Filed: March 20, 2007
    Publication date: September 25, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Surapong Lertrattanapanich, Yeong-Taeg Kim