Line Doublers Type (e.g., Interlace To Progressive Idtv Type) Patents (Class 348/448)
  • Patent number: 7843509
    Abstract: The invention relates to an iterative method for determining an interpolated image information value in an image that comprises a number of image regions arranged in a matrix-like fashion having original image regions to which one image information value has been assigned, and having at least one image region to be interpolated. In order to determine an interpolated image information value, the method specifies a starting interpolation direction and determines a quality measure for the starting interpolation direction. At least one image direction is selected different from the starting interpolation direction and determining a quality measure for this at least one image direction.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: November 30, 2010
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Marko Hahn, Markus Schu
  • Patent number: 7834932
    Abstract: An image de-interlacing method for estimating an interpolation luminance of an interpolated pixel, including: selecting a plurality of first and second candidate pixels respectively on upper and lower lines adjacent to the interpolated pixel, calculating a plurality of weighted directional differences respectively associated with one of the first candidate pixels and one of the second candidate pixels with weighting values determined by comparing similarity of luminance decreasing/increasing patterns near the associated first and second candidate pixels on the upper and lower lines, selecting a first selected pixel and a second selected pixel respectively from the first and second candidate pixels associated with the smallest weighted directional difference, and obtaining the interpolation luminance according to the first and second selected pixels.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: November 16, 2010
    Assignee: Faraday Technology Corp.
    Inventors: Yu-Chang Wang, Chih-Wei Ke, Kuo-Han Hsu
  • Patent number: 7834934
    Abstract: When television screen setting is not set and thus a television screen setting completion flag is not set, and a terminals-connection judgment pin takes a low level, an i/p selection screen is initially displayed on a progressive display device. However, the i/p selection screen is not displayed on an interlaced display device. When processing performed for the i/p selection screen is completed, or when the terminals-connection judgment pin takes a high level, indicating that the video input D-terminal of the display device is not connected to the video output D-terminal, an aspect ratio setting screen is displayed. After aspect ratio setting is completed, the television screen setting completion flag is set. This eliminates the need to perform the television screen setting again.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: November 16, 2010
    Assignee: Funai Electric Co., Ltd.
    Inventor: Hiroshi Ochi
  • Publication number: 20100283895
    Abstract: Aspects of the present invention relate to systems and methods for picture up-sampling and picture down-sampling. Some aspects relate to a selective filter process whereby a filter is selected based on the position of a first resolution picture relative to a second resolution picture. Some aspects relate to an up-sampling and/or down-sampling procedure designed for the Scalable Video Coding extension of H.264/MPEG-4 AVC.
    Type: Application
    Filed: July 21, 2010
    Publication date: November 11, 2010
    Inventor: Shijun Sun
  • Publication number: 20100284672
    Abstract: For example, in reproduction of a BD-ROM, when two streams of image data having different resolutions are displayed in a picture-in-picture mode, the difference in a sense of resolution between two windows is reduced. In an image conversion section, first image data is converted to image data in a progressive scan format by i-p conversion section, and then, the image size of the first image data is converted so that the first image data is output as third image data. The synthesizing section synthesizes the third image data with second image data, and outputs the synthesized data.
    Type: Application
    Filed: February 6, 2009
    Publication date: November 11, 2010
    Inventor: Eiko Kida
  • Publication number: 20100271545
    Abstract: A display apparatus includes a conversion unit for converting first video data having a first frame rate to second video data having a second frame rate which is “n” times as high as the first frame rate (“n” is an integer of two or larger), and a display unit for displaying the second video data. When the first video data is video data of two successive frame images having different brightness, the conversion unit performs a first frame rate converting process for converting the first video data to the second video data by outputting a frame image group made of two successive frame images in the first video data “n” times in a row at the second frame rate. Consequently, the frame rate converting process can be performed without deteriorating a visual effect such as an HDR effect, and viewing environment comfortable for the user can be realized.
    Type: Application
    Filed: April 22, 2010
    Publication date: October 28, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tomokazu Mori, Kazuhiko Nakazawa
  • Patent number: 7821524
    Abstract: Selectively applying graphical filtering to a portion of an object. One method described herein includes a method including accessing an object to be rendered. At least one characteristic of a portion of the object is determined. A filter is selected that has been pre-specified for the at least one determined characteristic. The filter is applied to the portion of the object, while not applying the filter to at least one other portion of the object.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: October 26, 2010
    Assignee: Microsoft Corporation
    Inventors: Tanya Matskewich, Geraldine Wade, Gregory C. Hitchcock
  • Patent number: 7812884
    Abstract: A de-interlacer includes recursive motion history map generating circuitry operative to determine a motion value associated with one or more pixels in interlaced fields based on pixel intensity information from at least two neighboring same polarity fields. The recursive motion history map generating circuitry generates a motion history map containing recursively generated motion history values for use in de-interlacing interlaced fields wherein the recursively generated motion history values are based, at least in part, on a decay function.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: October 12, 2010
    Assignee: ATI Technologies ULC
    Inventors: Daniel W. Wong, Philip L. Swan, Daniel Doswald
  • Publication number: 20100253837
    Abstract: An image apparatus and an image processing method are provided. The image apparatus determines a type of original format of inputted image data and determines a degree of noise reduction in accordance with the determined type of original format. As a result, an optimized noise reduction can be carried out.
    Type: Application
    Filed: November 25, 2009
    Publication date: October 7, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dale YIM, Sang-su LEE, Ho-chul SHIN
  • Patent number: 7808553
    Abstract: An apparatus and method for converting an interlaced image into a progressive image, the apparatus includes a motion detector which detects motion at an object pixel of the interlaced field image, using proceeding and following field images; an interpolation direction determination unit which determines a direction in which the object pixel is to be interpolated, using values of pixels along scan lines where the object pixel is not located when motion at the object pixel is detected; a first interpolator which spatially interpolates the object pixel according to the determined direction; and a second interpolator which resets a value of the object pixel using corresponding values of pixels of the preceding and following field images and a value obtained by spatially interpolating the object pixel when the object pixel contains high-frequency components in the vertical direction.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: October 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Yun Kim, Hyun Mun Kim
  • Patent number: 7808559
    Abstract: A method and system for accumulating stillness characteristics is presented. The method and system generates field stillness characteristics for a current pixel of a current field. The field stillness characteristic is accumulated with an accumulated stillness characteristic that corresponds to a pixel location of the current pixel. The accumulated stillness characteristic includes stillness information regarding previous pixels of previous fields in the same pixel location as the current pixel.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: October 5, 2010
    Assignee: Huaya Microelectronics, Inc
    Inventors: Ge Zhu, Edward Chen, Zhengjun Gong, Qing Yang
  • Patent number: 7808552
    Abstract: Techniques for distinguishing a pulldown field sequence from a normal field sequence are disclosed. According to one aspect of the techniques, the method for detecting pulldown field sequence comprises receiving a field sequence, combining two adjacent fields into one frame, detecting whether the combined frame has a combing phenomenon, if there is such a combing phenomenon, and determining a number of how many times the combing phenomenon occurs continuously in the combined frame. Based on the number, it can be determined whether the field sequence is a normal field sequence or a pulldown field sequence.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: October 5, 2010
    Assignees: Vimicro Corporation, Wuxi Vimicro Corporation, Wuxi
    Inventors: Yuan Wang, Song Qiu
  • Publication number: 20100245547
    Abstract: An image signal processing device improving quality of three-dimensional image is provided. The device includes a determination section; deinterlace sections and a synchronous control section. The determination section determines whether first and/or second input image signals, having horizontal parallax there between, are interlaced signals derived from video signal or from pull down-converted film signal. The deinterlace sections perform deinterlace on each of the first and second input image signals, through interpolation for a video signal or pull down reverse conversion for a film signal, and generate first and second output image signals as progressive signals, having horizontal parallax there between. The synchronous control section synchronously controls the deinterlace, based on result of the determination section, such that deinterlace process onto the first and second input image signals, synchronized with each other for each of fields, are of same type.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 30, 2010
    Applicant: Sony Corporation
    Inventor: Tetsuro Tanaka
  • Patent number: 7804542
    Abstract: A method including, in some embodiments, comparing a preceding field and a succeeding field of a video signal for motion at a locus of a current pixel in a current field to be interpolated, in an instance of no motion determining which of a current pixel location in the preceding field and the succeeding field is closer to an estimate of a neighbor pixel and using the result of the determination to decide which of the preceding and succeeding fields to use to interpolate the current pixel based on symmetric spatial neighbors of the current pixel, and in an instance of motion interpolating the current pixel based on symmetric spatial neighbors of the current pixel at a line above and a line below the current pixel in the current frame.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: September 28, 2010
    Assignee: Intel Corporation
    Inventors: Jorge E. Caviedes, Steven J. Tu, Satyajit Mohapatra
  • Publication number: 20100231785
    Abstract: A broadcast receiver includes: an image analyzer configured to perform an analysis on a series of images; a recorder configured to record a result of the analysis and the series of images; and an image processor configured to perform image processing on a target image included in the series of images recorded in the recorder based on the result of the analysis performed for images subsequent to the target image.
    Type: Application
    Filed: October 9, 2009
    Publication date: September 16, 2010
    Inventor: Shingo Yanagimoto
  • Patent number: 7796191
    Abstract: One embodiment of an edge-preserving vertical interpolation system constructs a de-interlaced video frame on a pixel-by-pixel basis using an edge-preserving vertical interpolation technique. Pixels within a pixel window centered about a selected pixel determine the direction of an intensity gradient associated with the selected pixel. A first pixel is constructed by interpolating between pixels that are perpendicular to the direction of the intensity gradient and a confidence factor is computed that indicates the likelihood that there is only one edge within the pixel window. A second pixel is constructed using a non-edge-preserving vertical interpolation technique. Interpolating between the first pixel and the second pixel based on the confidence factor generates a pixel in the de-interlaced video frame corresponding to the selected pixel.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: September 14, 2010
    Assignee: NVIDIA Corporation
    Inventor: Mark M. Vojkovich
  • Patent number: 7796189
    Abstract: According to one embodiment, when portions that should be “strong” are decided not to be “weak” on the 2-2 pulldown pattern of an inter-field correlation, if conditions are not established in which the correlation between the current field and the field before its one field is “strong”, the correlation between field before its one field and the field before its two field of the current field is “strong”, and the correlation between the current field and the field before its one field is “weak”, the decision that the input image signal is a 2-2 pulldown signal continues.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: September 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Himio Yamauchi
  • Patent number: 7796192
    Abstract: There is provided an image processing method capable of improving the picture quality. The image processing method comprises: incorporating input frame pictures to be displayed on a display device, on the basis of an input picture signal and an input synchronizing signal which is synchronized with the input picture signal; recording the incorporated input frame pictures in an input frame memory; and producing output frame pictures from input frame pictures, which have been recorded in the input frame memory, by producing an interpolated picture or inserting a black raster picture or thinning out the frame pictures, between input frame pictures corresponding to a picture information of the input frame picture to be displayed, on the basis of the picture information and the input synchronizing signal and an output synchronizing signal.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: September 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Goh Itoh, Haruhiko Okumura
  • Publication number: 20100225805
    Abstract: A video apparatus is provided with automatic deinterlacing and inverse telecine pre-filtering capability to automatically analyze the frames of the video to determine at least whether the video is one of telecine, non-telecine progressive and non-telecine interlaced formatted, and to automatically reformat the video into a non-telecine progressive format if the video is determined to be one of telecine and non-telecine interlaced formatted.
    Type: Application
    Filed: September 8, 2009
    Publication date: September 9, 2010
    Applicant: REALNETWORKS, INC.
    Inventor: Gregory J. Conklin
  • Patent number: 7791672
    Abstract: In the scanning conversion apparatus, interlaced-to-progressive scanning is performed according to one of at least two different techniques. The technique used depends on the interlaced scan data being converted. As examples, a spatial interpolation technique, a spatial/temporal interpolation technique, or other technique may be selected.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Sun Kim, Jong-Won Lee, Jae-Hong Park, Jae-Ho Kim
  • Patent number: 7791769
    Abstract: A method for providing a film image and an image display apparatus for providing the film image are provided. The method includes determining a scheme of an input image signal; if the input image signal is determined to be an interlaced image signal, converting the input image signal into a progressive image signal to generate a converted progressive image signal and converting a scanning rate the converted progressive image signal to generate an image signal having a selected scanning rate; if the input image signal is determined to be a progressive image signal, converting a scanning rate the input progressive image signal to generate the image signal having the selected scanning rate; and converting a color characteristic of the image signal having the selected scanning rate into an image signal having a color characteristic related to a selected type of a film. Accordingly, a general image can be viewed which has a similar effect to when a film image is projected on a screen.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-moon Byun, Tae-hong Jeong, Sang-jin Lee, Won-seok Ahn, Se-jin Pyo
  • Patent number: 7791673
    Abstract: A method for comparing pixels may comprise determining at least one polarity difference for at least one pair of neighboring pixels selected from a plurality of adjacent pixels, which are from different fields. A number of subsequent polarity changes may be calculated for the pair of neighboring pixels based on the determined polarity of difference. The adjacent pixels may be selected from a plurality of woven fields. A portion of the selected adjacent pixels may include pixels in neighboring fields. A portion of the selected adjacent pixels may include vertically adjacent pixels, horizontally adjacent pixels, and/or diagonally adjacent pixels. At least one pixel in the plurality of adjacent pixels includes a corresponding horizontally, vertically or diagonally located adjacent pixel in a different field.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: September 7, 2010
    Inventors: Alexander MacInnis, Chenhui Feng
  • Publication number: 20100220232
    Abstract: Pipelining techniques to deinterlace video information are described. An apparatus may comprise deinterlacing logic to convert interlaced video data into deinterlaced video data using multiple processing pipelines. Each pipeline may process the interlaced video data in macroblocks. Each macroblock may comprise a set of working pixels from a current macroblock and supplemental pixels from a previous macroblock. Other embodiments are described and claimed.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 2, 2010
    Inventors: Satyajit Mohapatra, Steven J. Tu
  • Patent number: 7787048
    Abstract: One embodiment of a motion-adaptive video de-interlacing system includes a motion estimator and a pixel interpolator. The motion estimator determines the magnitude of motion associated with each pixel within a de-interlaced video frame. In some instances, as determined by the motion values, the pixel interpolator produces final pixel values by blending between pixel values produced through different de-interlacing methods optimized for different levels of pixel motion. The present invention advantageously produces de-interlaced video frames having relatively better picture quality than those produced using prior art techniques, especially for small pixel motions.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: August 31, 2010
    Assignee: NVIDIA Corporation
    Inventors: Mark M. Vojkovich, Hassane S. Azar
  • Patent number: 7787049
    Abstract: There is provided an image processing method capable of improving the picture quality. The image processing method comprises: incorporating input frame pictures to be displayed on a display device, on the basis of an input picture signal and an input synchronizing signal which is synchronized with the input picture signal; recording the incorporated input frame pictures in an input frame memory; and producing output frame pictures from input frame pictures, which have been recorded in the input frame memory, by producing an interpolated picture or inserting a black raster picture or thinning out the frame pictures, between input frame pictures corresponding to a picture information of the input frame picture to be displayed, on the basis of the picture information and the input synchronizing signal and an output synchronizing signal.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: August 31, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Goh Itoh, Haruhiko Okumura
  • Patent number: 7787047
    Abstract: According to one embodiment, an image processing apparatus includes a resolution increasing module and a moving-image improving module. The resolution increasing module performs, on receipt of a first video signal with first resolution, super resolution conversion on the first video signal to obtain a second video signal with second resolution that is higher than the first resolution by estimating an original pixel value from the first video signal and increasing pixels. The resolution increasing module also performs first correction on the second video signal obtained by the super resolution conversion. The moving-image improving module configured to perform, on the second video signal subjected to the first correction, second correction except for a correction process included in the first correction.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: August 31, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Wada
  • Patent number: 7777812
    Abstract: Embodiments of the present invention comprise systems and methods for picture up-sampling and picture down-sampling. Some embodiments of the present invention provide an up-sampling and/or down-sampling procedure designed for the Scalable Video Coding extension of H.264/MPEG-4 AVC.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 17, 2010
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Shijun Sun
  • Publication number: 20100201868
    Abstract: A system and a method may include performing a coarse estimation to eliminate at least one direction from a set of edge candidate directions without directly evaluating each direction; performing a fine estimation to select a single direction as corresponding to an edge; and performing a directional interpolation as a function of the single selected direction to generate a pixel value for a pixel being interpolated.
    Type: Application
    Filed: February 6, 2009
    Publication date: August 12, 2010
    Inventors: Wei Che, Hui De Li, Lin Li
  • Publication number: 20100201869
    Abstract: Image processing includes generating image data for an image, the image data including an array of original pixels. Respective first pixels for the image are interpolated from respective pluralities of original pixels adjacent the interpolated first pixels. Respective second pixels for the image are interpolated from respective pluralities of original pixels adjacent the interpolated second pixels using image information generated in the interpolation of the interpolated first pixels.
    Type: Application
    Filed: January 20, 2010
    Publication date: August 12, 2010
    Inventor: Hoseok Shin
  • Publication number: 20100201867
    Abstract: A system for graphically scaling of LCDs in mobile television devices is provided. PAL resolution is 720×576, and DVB-T broadcasts in Europe, for example, use this resolution. In order to display this PAL video on a 480×272 LCD, scaling algorithms are used. However, when MHEG-5 content is present on the video stream, a different scaling is required. The present principles provide a mechanism to convert the interlaced PAL video at a resolution of 720—576 to the progressive display of an LCD having a resolution of 480—272.
    Type: Application
    Filed: August 22, 2006
    Publication date: August 12, 2010
    Inventor: Igor Sinyak
  • Patent number: 7773151
    Abstract: A device and a method of deinterlacing a sequence of images from an interlaced format to a progressive format. The sequence of images being composed of successive frames. A plurality of pixels of missing lines of a current frame to be completed, an evaluation of the values of these pixels according to a spatially consistent order. The evaluation comprises, for each pixel of the plurality of pixels, estimating a direction of interpolation, spatial interpolation according to the estimated direction of interpolation. According to the invention, the estimation step comprises, for at least one current pixel of the plurality of pixels, calculating a score for at least two directions, and selecting the direction of interpolation on the basis of the calculated scores and of the estimated direction of interpolation for a distinct pixel situated in the neighborhood of the current pixel.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: August 10, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Christophe Barnichon
  • Patent number: 7773150
    Abstract: An apparatus for use in conversion of an SD signal into an HD signal. The pixel data sets of a tap corresponding to an objective position in the HD signal are extracted selectively from the SD signal. Class CL to which pixel data set of the objective position belongs is then obtained using the pixel data sets of the tap. A coefficient production circuit produces coefficient data sets Wi for each class based on coefficient seed data sets for each class and values of picture quality adjusting parameters, h and v obtained by user operation. A tap selection circuit selectively extracts the data sets xi of the tap corresponding to the objective position in the HD signal from the SD signal and then, a calculation circuit produces the pixel data sets of the objective position in the HD signal according to an estimation equation using the data sets xi and the coefficient data sets Wi corresponding to the class CL read out of a memory.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: August 10, 2010
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Yasushi Tatehira, Kei Hiraizumi, Nobuyuki Asakura, Takuo Morimura, Wataru Niitsuma, Takahide Ayata
  • Publication number: 20100188570
    Abstract: A video processing apparatus for de-interlacing includes a video decoder and a de-interlacing circuit. The video decoder decodes a video data stream to generate an interlaced video signal and transmits a first interlaced control signal. The de-interlacing circuit is coupled to the video decoder, and includes a detecting unit and an interlacing to progressive converting unit. The detecting unit generates a second interlaced control signal according to the interlaced video signal and the first interlaced control signal. The interlacing to progressive converting unit is coupled to the detecting unit for receiving the interlaced video signal as well as the second interlaced control signal and for converting the interlaced video signal into a first progressive video signal according to the second interlaced control signal.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 29, 2010
    Inventors: Jin-Sheng Gong, Chun-Hsing Hsieh
  • Patent number: 7760267
    Abstract: The present invention discloses a scalable video format conversion system for utilizing various system resources to provide a progressive video signal. The scalable video format conversion system has a scalable motion-adaptive de-interlacing system for converting an interlaced video signal into the progressive video signal according to a motion situation of an image area. The scalable motion-adaptive de-interlacing system includes a motion detection apparatus detecting the motion situation of the image area according to the availability of the various system resources or the status of the scalable video format conversion system.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: July 20, 2010
    Assignee: Mediatek Inc.
    Inventor: Yuan-Chung Lee
  • Patent number: 7755700
    Abstract: According to one embodiment, a motion-adaptive non-interlace conversion apparatus includes an interference elimination process circuit which executes a cross-color & dot interference elimination process, an intra-field interpolation process circuit which generates an intra-field interpolation signal using a signal that is obtained by delaying a processed signal, which is subjected to the interference elimination process, with a delay corresponding to 1 field, an inter-field interpolation process circuit which generates an inter-field interpolation signal by using the processed signal and a pre-process signal which is yet to be subjected to the cross-color & dot interference elimination process, a motion detection circuit which obtains a motion detection signal, a mixing circuit which mixes the intra-field interpolation signal and the inter-field interpolation signal with a mixing ratio corresponding to the motion detection signal and outputs a mixed signal, and a multiple-speed conversion circuit whic
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: July 13, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadayoshi Kimura, Himio Yamauchi
  • Patent number: 7750974
    Abstract: A system and method for processing video information are disclosed and may include calculating at least one pixel difference between at least one pixel in a first field and at least one corresponding aligned pixel in a second field. The first field and the second field may be adjacent to a current field. At least one pixel in the current field may be deinterlaced based at least in part on the calculated at least one pixel difference. A first pixel difference between a first pixel in the first field and a corresponding aligned second pixel in the second field may be calculated. A second pixel difference between a third pixel in the first field and a corresponding aligned fourth pixel in the second field may be calculated. The third pixel and the fourth pixel may be adjacent to a current output sample.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: July 6, 2010
    Inventors: Alexander MacInnis, Chenhui Feng
  • Publication number: 20100165191
    Abstract: A de-interlacing method and controller is provided. The de-interlacing method includes steps of de-interlacing based on an ith odd input pixel row of an odd field and an ith even input pixel row of an even field to generate an ith odd output pixel row, where i is a natural number; de-interlacing based on the ith even input pixel row and an (i+1)th odd input pixel row of the odd field to generate an ith even output pixel row; and adjusting i and repeating the above steps to generate a complete interpolated frame.
    Type: Application
    Filed: May 8, 2009
    Publication date: July 1, 2010
    Applicant: MStar Semiconductor, Inc.
    Inventors: LI-HUAN JEN, HUNG-YI LIN, ZHI-REN CHANG
  • Publication number: 20100165190
    Abstract: A signal output device includes a signal output unit to output a video signal based on input image data, a storage unit to store the image data, a detection unit to detect whether or not the number of frames included in one set of image data stored in the storage unit satisfies a predetermined number, and a data creating unit to add, if the number of the frames included in the one set of image data does not satisfy the predetermined number, a new frame to the one set of image data so that the number of the frames included in the one set of image data satisfies the predetermined number, and to input, to the signal output unit, the one set of image data to which the new frame has been added.
    Type: Application
    Filed: February 25, 2010
    Publication date: July 1, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Toshiro Ohbitsu
  • Publication number: 20100157147
    Abstract: A de-interlacing device and method are provided that may be used in a memory based video processor. The de-interlacer mixes the output of a temporal de-interlacer and a spatial de-interlacer. Two separate error values are used; one for the temporal de-interlacer and another for the spatial de-interlacer. The de-interlacing device calculates from the two error values, using a non-linear mapping, a mix factor used to mix between the outputs of the spatial and temporal de-interlacers.
    Type: Application
    Filed: May 23, 2006
    Publication date: June 24, 2010
    Inventor: Erwin Bellers
  • Publication number: 20100157148
    Abstract: A method for video decoding in a video decoding/de-interlacing display apparatus that utilizes a storage device is provided. The method includes: (a) decoding video data of a next picture; (b) if the next picture is a B picture, buffering the decoded video data of the next picture into a frame buffer of the storage device not stored with a reference picture nor a present display picture nor a previous display picture; and (c) if the decoded next picture is a reference picture, buffering the decoded video data of the next picture into a frame buffer of the storage device not stored with a last decoded reference picture nor the present display picture nor the previous display picture.
    Type: Application
    Filed: March 9, 2010
    Publication date: June 24, 2010
    Inventor: Chi-Chin Lien
  • Publication number: 20100157108
    Abstract: The disclosed is to provide an image signal processor and its method in which the enhancement of resolution and the effective reduction of noise are compatible. The image signal processor is provided with an edge character detector that detects a character of an edge of an object, an image signal frequency zone limiter that executes a noise removing process, an image signal frequency zone enhancer that executes a resolution enhancing process and a gain controller that changes each intensity of the image signal frequency zone limiter and the image signal frequency zone enhancer according to an output result of the edge character detector.
    Type: Application
    Filed: February 3, 2010
    Publication date: June 24, 2010
    Inventors: Yuichi Nonaka, Akihito Nishizawa
  • Publication number: 20100156955
    Abstract: A low-resolution image is displayed at high resolution and power consumption is reduced. Resolution is made higher by super-resolution processing. Then, display is performed with the luminance of a backlight controlled by local dimming after the super-resolution processing. By controlling the luminance of the backlight, power consumption can be reduced. Further, by performing the local dimming after the super-resolution processing, accurate display can be performed.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 24, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime KIMURA
  • Patent number: 7742103
    Abstract: A method and system for performing fuzzy logic based de-interlacing on film source fields that might be mixed with video on film. An embodiment of the invention comprises an adaptive de-interlacer by weighing between merge operation and interpolation operation in the case of occurring video on film motion object. A weighing factor is generated from video on film pattern based on fuzzy logic inference rules. This weighing factor specifies the weighting between merging and interpolating in assigning the pixel values of the progressive display output.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: June 22, 2010
    Assignee: Pixelworks, Inc.
    Inventors: Lei He, Hongmin Zhang
  • Publication number: 20100149415
    Abstract: A system, apparatus, and method are provided for a video detector that computes a measure of how much a given video content resembles one of a de-interlaced video content or a progressive video content. More particularly, the present invention determines the position of original and interpolated lines and the scaling factor of an input content whenever that content was scaled after de-interlacing.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 17, 2010
    Inventors: Dmitry Znamenskiy, Claus Nico Cordes
  • Patent number: 7738037
    Abstract: A method and apparatus for detecting and correcting motion artifacts in interlaced video signal converted for progressive video display. A correction is applied where interlaced video material is determined to originate from film source, thereby having been converted to video using a process known as 3-2 pulldown. Where the video material is not a result of the 3-2 pulldown process, a check is made for the presence of “pixel motion” so that corrections may be applied to smooth out the pixel motion. To determine 3-2 pulldown or field motion, a video field is compared to the field prior to the previous field to generate field error. Field errors are generated for five consecutive fields and a local minimum error repeated every five fields indicate the origination of the video material from film source using the 3-2 pulldown process.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: June 15, 2010
    Assignee: RGB Systems, Inc.
    Inventors: Che Wing Tang, Dung Duc Truong
  • Patent number: 7738038
    Abstract: A content-dependent scan rate converter with adaptive noise reduction that provides a highly integrated, implementation efficient de-interlacer. By identifying and using redundant information from the image (motion values and edge directions), this scan rate converter is able to perform the tasks of film-mode detection, motion-adaptive scan rate conversion, and content-dependent video noise reduction. Adaptive video noise reduction is incorporated in the process where temporal noise reduction is performed on the still parts of the image, thus preserving high detail spatial information, and data-adaptive spatial noise reduction is performed on the moving parts of the image. A low-pass filter is used in flat fields to smooth out Gaussian noise and a direction-dependent median filter is used in the presence of impulsive noise or an edge. Therefore, the selected spatial filter is optimized for the particular pixel that is being processed to maintain crisp edges.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey Kempf, Arnold P. Skoog, Clifford D. Fairbanks
  • Patent number: 7733420
    Abstract: A judder detection apparatus, a de-interlacing apparatus using the judder detection apparatus, and a de-interlacing method. The judder detection apparatus includes a judder detector to detect whether a detected pattern that is similar to a judder pattern occurs using predetermined pixel values of even and odd fields sequentially input, a pattern detector to detect whether an input image has a uniform pixel value in every other line of the even and odd fields and whether consecutive lines of the even and odd fields have a blind pattern having a difference from the uniform pixel that is greater than or equal to a threshold value, and a determiner to determine whether the detected pattern that is similar to the judder pattern is a judder based on whether the blind pattern is detected.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: June 8, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Haeng-kang Kim, Young-ho Lee
  • Patent number: 7733421
    Abstract: A vector interpolator optimizes the conversion of an interlaced signal to a non-interlaced signal. The vector interpolator improves the visual clarity of slanted features in a displayed image by adjusting the luminance value of each pixel such that the appearance of “steps” or “jaggies” in the features is reduced. For each pixel, the vector interpolator determines a similarity measure for the pixels within a predetermined area around the pixel. From the similarity measure, an angle for interpolation is selected. The luminance value is then interpolated along the selected vector corresponding to the angle and applied to the pixel.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: June 8, 2010
    Assignee: Marvell International Ltd.
    Inventors: Shilpi Sahu, Nikhil Balram
  • Patent number: 7728908
    Abstract: According to the invention, a pull-down signal detecting apparatus includes: an interfield motion detecting module configured to determine whether or not an interfield motion between a first field signal and a second field signal exists by comparing a first counted number with a first threshold; an interframe motion determining module configured to determine whether or not an interframe motion between the first field signal and a third field signal exists by comparing a second counted number with a second threshold; a determination module configured to determine whether or not the video signal is pull-down signal based on the determination result of the interfield motion determining module and the interframe motion determining module; and a threshold control module configured to vary the first threshold, when the determination result of the interframe motion determining module corresponds with a second pull-down pattern and when the determination result of the interfield motion determining module does not cor
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideaki Tokutomi
  • Patent number: 7728907
    Abstract: A method (300) of converting interlaced Moving Picture Experts Group (MPEG) video signals to progressive video signals can include receiving an interlaced video signal representing a luma component specifying luma lines and a chroma component specifying chroma lines (310) wherein the chroma component can specify approximately one-half the number of lines of the luma component. The interlaced video signal can be decoded and the number of the chroma lines can be increased to approximately the same as the number of the luma lines (320). The number of chroma lines of the interlaced video signal then can be decreased (340), to substantially reverse the previous increase. The interlaced video signal then can be deinterlaced to produce a progressive video signal (350), which can be processed further (360) as needed.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: June 1, 2010
    Assignee: Thomson Licensing
    Inventor: Donald Henry Willis