Changing Number Of Fields For Standard Conversion Patents (Class 348/459)
  • Patent number: 8233085
    Abstract: A method for interpolating a pixel value of a pixel located at an OSD object during frame rate conversion includes determining current forward motion vectors between a first previous video frame and a current video frame, and at least one other set of forward motion vectors between two temporally consecutive previous video frames. The method also includes determining that a block adjoining a target block includes pixels depicting at least a portion of an OSD object. The method also includes determining that a position of the adjoining block relative to the target block coincides with a direction of a current forward motion vector associated with the target block, setting a magnitude of the current forward motion vector to zero (0), and calculating a pixel value of a pixel in the target block in the interpolated video frame based on the current forward motion vector associated with the target block.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: July 31, 2012
    Assignee: Kolorific, Inc.
    Inventor: Yi Liu
  • Patent number: 8212919
    Abstract: An image processing apparatus includes: a field forming unit configured to subject 3-2 pulldown materials to 3-2 pulldown to form field images in normal reproduction, and to add flag information to the field images, the flag information necessary to generate frame images from field images; and a generating unit configured to generate frame images from the formed field images based on the flag information, wherein in a special reproduction other than the normal reproduction, according to its reproduction form, the field forming unit forms a predetermined field image from the material, and adds flag information to the formed field images, the flag information that has to be added to a field image possibly formed by subjecting the material corresponding to the field image to 3-2 pulldown, and the generating unit generates a frame image from the field image based on the flag information added to the field image.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Hiroaki Itou, Yasunari Hatasawa
  • Publication number: 20120162508
    Abstract: A video data conversion apparatus can convert inputted video data in a predetermined scanning format into video data in another scanning format. The inputted video data in the predetermined scanning format is video data at 60 fields per second in a 4:2:2:2 format. The video data in the 4:2:2:2 format is video data in a format where four fields generated from one original image, two fields generated from a next original image, two fields generated from a further next original image, and two fields generated from a further next original image appear periodically in this order. The video data conversion apparatus includes a conversion unit operable to convert the inputted video data into video data at 60 frames per second in a 3:2 pulldown format.
    Type: Application
    Filed: December 28, 2011
    Publication date: June 28, 2012
    Inventor: Tadayoshi OKUDA
  • Patent number: 8208065
    Abstract: A video format conversion method and concomitant computer software stored on a computer-readable medium comprising receiving a video stream comprising a plurality of frames in a first format, converting the video stream to a second format in approximately real time, and outputting the video stream in the second format, and wherein the converting step employs a hierarchical block true motion estimator.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: June 26, 2012
    Assignee: Cinnafilm, Inc.
    Inventors: Dillon Sharlet, Lance Maurer
  • Patent number: 8203650
    Abstract: An inter-field pull-down pattern detecting circuit determines whether an input video signal is a first pull-down signal or a second pull-down signal, on the basis of input plug information and a pattern of the consecutive inter-field correlation levels, obtained from an inter-field correlation determination circuit. A counter counts the number of times the pattern detecting circuit determines that the input video signal is the first pull-down signal. The counter is reset to “0” when the input video signal is determined to be other than the first and second pull-down signals. When the count of the counter exceeds a preset value, the input video signal is finally determined to be the first pull-down signal.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 19, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shogo Matsubara
  • Patent number: 8189104
    Abstract: An apparatus for creating an interpolation frame includes a first computing unit that computes a first motion vector in relation to a first block in a first reference frame, a second extracting unit that extracts a second block in a second reference frame based on the first motion vector, a first calculating unit that calculates a correlation between the first block and the second block, a third extracting unit that extracts a third block that is shifted from the second block by a certain number of pixels, a second calculating unit that calculates a correlation between the first block and the third block, and a third computing unit that computes a motion vector for an interpolation block based on a most-highly correlated block-pair.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: May 29, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyasu Ohwaki, Yasutoyo Takeyama, Goh Itoh, Nao Mishima
  • Patent number: 8189107
    Abstract: A system, method and computer program product are provided. After receipt of visual data, an aspect of the frequency response associated with the visual data is changed. Thereafter, subsequent processing is performed on the visual data, based on information extracted from and related to the aspect of the frequency response change.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: May 29, 2012
    Assignee: NVIDIA Corporation
    Inventor: William S. Herz
  • Patent number: 8184200
    Abstract: Systems and methods for converting a picture frame rate between a source video at a first rate and a target video at a second rate. A system may include a phase plane correlation calculator configured to determine a first motion vector estimate. The system may further include a global motion calculator configured to determine a second motion vector estimate based on the previous frame data, the current frame data, and the first motion vector estimate. The system may also include a motion compensated interpolator for assigning a final motion vector through a quality calculation and an intermediate frame generator for generating the intermediate frame using the final motion vector.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: May 22, 2012
    Assignee: Marvell International Ltd.
    Inventors: Mainak Biswas, Vipin Namboodiri
  • Patent number: 8169541
    Abstract: A method of converting a frame rate of a video signal includes the steps of: receiving a pulldown film sequence existing in or converted from a sequence of successive-in-time frames of the video signal, in which the pulldown film sequence comprises a plurality of diverse original frames each having a corresponding number of duplicate frames; modifying the original frames; performing estimation of at least one motion vector associated with the modified original frames; and interpolating new frames between the modified original frames in accordance with the motion vector.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: May 1, 2012
    Assignee: Himax Media Solutions, Inc.
    Inventors: Sheng-Chun Niu, Ling-Hsiu Huang
  • Patent number: 8159607
    Abstract: A video signal display system includes: a reproducing apparatus including a decoder that decodes input video data to produce a video signal, an IP converter that, when the video signal produced by the decoder is an interlaced video signal, converts the interlaced video signal into a progressive video signal, a pseudo-interlacing unit that performs pseudo-interlacing in which the progressive video signal converted by the IP converter undergoes pseudo-interlacing so that the progressive video signal is converted into a pseudo-interlaced signal, and a first controller; and a display apparatus including a display processor that carries out a display process for displaying a video signal, and a display that can at least display the video signal that has undergone the display process in the display processor.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: April 17, 2012
    Assignee: Sony Corporation
    Inventor: Masami Tomita
  • Patent number: 8116572
    Abstract: A method for detecting an image edge is provided. Pixel data of neighbor lines of an image are read to generate a first and a second inclined edge areas between two neighbor lines. The incline edge areas are determined by detecting whether a difference of two corresponding pixel data exceeds a preset edge threshold. Then, whether there is an overlapped or nearby portion between the inclined edge areas is determined, so as to find an incline edge.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: February 14, 2012
    Assignee: Novatek Microelectronics Corp.
    Inventors: Tsui-Chin Chen, Hsing-Chuan Chen
  • Patent number: 8115864
    Abstract: The present invention relates to the field of video data de-interlacing, and in particular to a method for reconstructing full-resolution frames from a line-skipped-sequence of fields and a corresponding apparatus. It is the particular approach of the present invention to substitute missing lines of a block of a reconstructed full-resolution frame by lines from another field, e.g. the preceding field, and translating the substitute lines vertically and horizontally so as to optimized a smoothness measure computed for the thus reconstructed block. In this manner, an error-prone a priori determination of motion vectors based an interpolation of the interlaced images in the vertical direction can be avoided. The present invention may also be applied to sequences generated from a full-resolution sequence by a line-skipping operation that keeps only every Kth line and discards the other K?1 lines.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: February 14, 2012
    Assignee: Panasonic Corporation
    Inventor: Torsten Palfner
  • Patent number: 8115863
    Abstract: A method of de-interlacing interlaced video information including determining functional equations which estimate trajectories of corresponding pixel locations based on statistical information, updating each functional equation with sampled pixel values from the interlaced video information of corresponding pixel locations, and evaluating the functional equations at a time point of a progressive frame and providing corresponding progressive pixel values. A video de-interlace system including a trajectory estimator and a component estimator. The trajectory estimator provides functional equations estimating trajectories of tracked pixel locations based on statistical information. The component estimator receives the functional equations and the interlaced video information and provides progressive pixel values.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: February 14, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: David A. Hayner, Honglin Sun
  • Patent number: 8107007
    Abstract: A technique for flexibly converting the number of frames of a displayed image on the basis of a motion in the image or information of an image signal such as a program genre is provided. An image processing apparatus includes an input unit to which an image signal having a predetermined frame rate is input, an information acquirer for acquiring information concerning the input image signal, and a frame rate converter for converting the frame rate of the input image signal and outputting a resultant signal. The frame rate converter conducts the frame rate conversion of the input image signal on the basis of the information (such as the motion in the image or the program genre) of the input image signal acquired by the information acquirer.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: January 31, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Ogino, Yasutaka Tsuru, Yoshiaki Mizuhashi, Junichi Satoh
  • Patent number: 8102468
    Abstract: A display device includes: a display unit including a plurality of pixels each including a plurality of sub-pixels; an acquisition unit configured to acquire a numbers of sub-pixels corresponding to an amount of motion of a target image between a plurality of reference original frames; an allocating unit configured to allocate the numbers of sub-pixels acquired by the acquisition unit to an interpolated frame, in accordance with an order of the interpolated frame to be interposed between the plurality of reference original frames; and a generating unit configured to generate the interpolated frame, in accordance with the numbers of sub-pixels allocated by the allocating unit.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: January 24, 2012
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Masutaka Inoue, Tomoya Terauchi
  • Patent number: 8094235
    Abstract: An image signal processing method is disclosed for maintaining high image display quality by avoiding signal-mode misjudgment. The image signal processing method includes generating a first threshold based on a plurality of motion values generated prior to a first time when an image input signal is detected to be of a film mode, generating a second threshold based on the first threshold and a first offset, generating a third threshold based on the first threshold and a second offset, and determining whether the image input signal between the first time and a second time is the film mode or a video mode based on the second and third thresholds.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: January 10, 2012
    Assignee: AmTran Technology Co., Ltd.
    Inventor: Chien-Chou Chen
  • Patent number: 8054381
    Abstract: An apparatus for frame rate up conversion comprises a motion-compensated frame rate converter, a primitive frame rate converter and a determination circuit. The determination circuit designates either the motion-compensated frame rate converter or the primitive frame rate converter to output an interpolated frame according to an index that estimates an output quality of the motion-compensated frame rate converter.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: November 8, 2011
    Assignee: Himax Technologies Limited
    Inventor: Fang Chen Chang
  • Patent number: 8040432
    Abstract: Disclosed are information processing equipment and an information processing method, a provision system and method, and a program that are intended to readily produce a content of higher quality, wherein, an acquisition unit acquires an interpolative content with which a main content is interpolated in a spatial or temporal direction or with which gray levels into which the main content is quantized are interpolated, and, a synthesis unit synthesizes the main content and interpolative content so that the first content will be interpolated in the spatial or temporal direction or the gray levels into which the first content is quantized will be interpolated.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: October 18, 2011
    Assignee: Sony Corporation
    Inventor: Jun Hirai
  • Patent number: 8013935
    Abstract: According to one embodiment, an image processing circuit comprising first memory unit which stores image signal, equalizing circuit which, when there is no movement between two picture signals, outputs average signal between the both signals, second memory unit which stores the average signal, pull-down detecting circuit which outputs pull-down interpolation signal for deinterlacing process from a plurality of frames of the pull-down signals when it is determined that the picture signal is based on the pull-down signals upon receipt of the average signal, an output from the second memory unit, and output from the first memory unit, interpolation signal generating circuit which generates interpolation signal, the outputs from the first and second memory units, and noninterlaced scanning conversion circuit which generates noninterlaced signal by adding the pull-down signals to the output from the second memory unit when the picture signal based on the pull-down signals.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: September 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Matsubara, Himio Yamauchi
  • Patent number: 8009231
    Abstract: Systems and methods of coding progressive content with isolated fields for conversion to interlaced display are provided. Some systems and methods may find use in, for example, digital video compression systems and methods. Film material may be encoded as video material with an intended field polarity and an explicit 3:2 pull-down operation for interlaced display (e.g., a 30-frames-per-second display).
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: August 30, 2011
    Assignee: Broadcom Corporation
    Inventors: Sherman (Xuemin) Chen, Alexander G. MacInnis
  • Patent number: 7978266
    Abstract: An improved motion compensated interpolation of images in video sequences, in particular, for use in up-conversion processing. In order to achieve a smooth object motion in the interpolated image sequence, separate image areas are processed differently if an image change occurs in the video sequence. While for one image area motion compensation is suspended, the other image area is subjected to motion compensated interpolation.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: July 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Frank Janssen, Sven Salzer
  • Publication number: 20110109796
    Abstract: Frame rate conversion may be implemented using motion estimation results. Specifically, as part of the motion estimation, pixels may be labeled based on the number of matching pixels in subsequent frames. For example, pixels may be labeled as to whether they have no matching pixels, one matching pixels, or multiple matching pixels. The motion estimation and pixel labeling may then be used to interpolate pixels for frame rate conversion.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 12, 2011
    Inventors: Mahesh Subedar, Jorge E. Caviedes
  • Patent number: 7940241
    Abstract: A display apparatus includes a plurality of frame rate controllers that generate a motion interpolated intermediate image. The frame rate controllers exchange image information with adjacent frame rate controllers. According to the display apparatus, each frame rate controller displays the intermediate image on a corresponding display area based on the image information provided from the adjacent frame rate controller.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Sung Bae, Jung-Hwan Cho, Bong-Hyun You, Jun-Pyo Lee, Jung-Won Kim, Sang-Soo Kim, Seon-Ki Kim, Hee-Jin Choi
  • Patent number: 7898595
    Abstract: A method for converting frames that can display smooth moving images is provided. A memory (16) to which image data of frames in the NTSC format is written is provided. A memory controller (14) for retrieving image data of an odd field and an even field from the memory (16) every odd field period and even field period in the frame period of the PAL format is provided. An interpolating circuit (76) is provided. The interpolating circuit (76) mixes the image data of the odd field retrieved by the memory controller (14) and image data of a next odd field at a predetermined ratio to output as image data of an odd field in the frame period of the PAL format, and mixes the retrieved image data of the even field and image data of a next even field at a predetermined ratio to output as image data of an even field in the frame period of the PAL format. A coefficient-generating circuit (73) for changing the mixing ratios in the interpolating circuit (76) every field period of the PAL format is provided.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: March 1, 2011
    Assignee: Sony Corporation
    Inventors: Tsutomu Kume, Shinya Ishii, Tokuichiro Yamada, Yoshinori Tomita
  • Patent number: 7876380
    Abstract: Systems and methods of coding progressive content with isolated fields for conversion to interlaced display are provided. Some systems and methods may find use in, for example, digital video compression systems and methods. Film material may be encoded as video material with an intended field polarity and an explicit 3:2 pull-down operation for interlaced display (e.g., a 30-frames-per-second display).
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: January 25, 2011
    Assignee: Broadcom Corporation
    Inventors: Sherman (Xuemin) Chen, Alexander G. MacInnis
  • Patent number: 7868948
    Abstract: Disclosed herein is an image signal processing apparatus configured to convert an interlaced signal into a progressive signal, including: a first conversion unit; a second conversion unit; a decision unit; and a selection unit.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: January 11, 2011
    Assignee: Sony Corporation
    Inventor: Tetsuro Tanaka
  • Publication number: 20110001873
    Abstract: A frame rate converter device and method for interpolation during frame rate conversion are disclosed. The method includes, receiving input frames containing film content and video content. The film content exhibits a 3:2 pull-down cadence while video content that does not exhibit such cadence. Consecutive frames Cn and Cn+1 are interpolated to form Fn using the frame rate converter. The frame rate converter further selects as an output frame, either current or previous ones of interpolated frames or input frames. The selection is made so as to reduce both film judder and video judder. The invention is suitable for use on video input frames at 60 frames per second (fps) derived from a 24 fps cinema using 3:2 pull-down, and also blended with 60 Hz overlay video such as subtitle text. The invention can be used to obtain a good overall reduction in both overlay video judder and film judder.
    Type: Application
    Filed: March 19, 2010
    Publication date: January 6, 2011
    Inventors: Daniel Doswald, Michael Joseph Erwin, Samir Narayan Hulyalkar
  • Publication number: 20100328530
    Abstract: A video display apparatus is provided wherein even for ones, such as 32 pulldown and 22 pulldown, in which since the motion range of an original material is wide, there is a high probability of degradation of the precision of detected vectors, the processing time is effectively used to enhance the precision of detected vectors, thereby generating interpolated pictures having higher qualities. A liquid crystal display apparatus has a means (14) for converting the frame rate by interpolating a picture, which has been corrected based on an interframe motion vector, between frames of input video signals. When interpolating signals representative of two or three consecutive identical pictures generated in telecine or the like, the liquid crystal display apparatus recalculates, based on motion vectors (Va) used in generating the first interpolated picture, motion vectors for use in the next interpolated picture generation, thereby detecting motion vectors having higher precision and less errors.
    Type: Application
    Filed: November 27, 2008
    Publication date: December 30, 2010
    Inventors: Mitsuru Hashimoto, Yasunori Takanezawa
  • Patent number: 7860321
    Abstract: A rate conversion unit determines a frame thinning-out rate to thin out frames on the basis of a recording rate at the time of photographing and a display rate for display on a display apparatus so that a temporal updating interval of a video image between continuous fields becomes constant. After that, a frame is repeatedly inserted so that a frame rate becomes equal to the display rate.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: December 28, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshinori Watanabe, Hideyuki Rengakuji
  • Patent number: 7830450
    Abstract: A frame synchronization method includes: temporarily storing input data of at least one source frame in a frame buffer according to an input time sequence; generating an output time sequence according to the input time sequence and a delay time; generating output data of a destination frame according to the input data of the source frame; and outputting the output data of the destination frame according to an output time sequence; wherein an average frame rate of the source frame is substantially the same as that of the destination frame.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: November 9, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jin-Sheng Gong, Yu-Pin Chou, Hsu-Jung Tung
  • Patent number: 7821572
    Abstract: This invention relates to an apparatus for processing an information signal etc. that, when converting, for example, SD signal into HD signal, enables well to be obtained pixel data of HD signal no matter whether the dynamic range DR is large or small. DR in a class tap is detected. If DR?Th, items of pixel data y1-a?y4-a calculated by using item of coefficient data Wi-a corresponding to a class code Ca are estimated as items of pixel data of HD signal. If DR<Th, an addition mean value of items of pixel data y1-a?y4-a, y1-b?y4-b calculated by using items of coefficient data Wi-a, Wi-b corresponding to class codes Ca, Cb is estimated as item of the pixel data of HD signal. The items of coefficient data Wi-a, Wi-b are obtained by learning between a student signal corresponding to the SD signal and a teacher signal corresponding to the HD signal by using a portion of the DR having a value thereof that is not less than the threshold value Th.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Takashi Nakanishi, Daisuke Kikuchi, Shizuo Chikaoka, Takeshi Miyai, Yoshiaki Nakamura, Tsugihiko Haga
  • Patent number: 7822293
    Abstract: Embodiments of an imaging system and method for generating video data with edge-aware interpolation are generally described herein. Other embodiments may be described and claimed. In some embodiments, an edge-aware demosaicing process is performed on image sensor data to generate pixel-edge data, and video output data may be generated by adding the pixel-averaged data to difference data weighted by a correction factor. The difference data represents a difference between pixel-averaged data and the pixel-edge data. The correction factor may be proportional to an amount of edge content in the image sensor data.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: October 26, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Dmitri Jerdev
  • Publication number: 20100254453
    Abstract: This disclosure describes inverse telecine techniques that are performed to adjust or convert the frame rate of a video sequence. The described techniques provide a very useful way to identify a telecine technique that was used to increase the frame rate of a video sequence. Upon identifying the telecine technique that was used, the corresponding inverse telecine technique can be performed with respect to the sequence of video frames in order to decrease the frame rate back to its original form (prior to telecine). This disclosure also provides many useful details that can improve inverse telecine, e.g., by simplifying the inverse telecine process and by reducing memory accesses during the process.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Gokce Dane, Chia-yuan Teng
  • Patent number: 7796189
    Abstract: According to one embodiment, when portions that should be “strong” are decided not to be “weak” on the 2-2 pulldown pattern of an inter-field correlation, if conditions are not established in which the correlation between the current field and the field before its one field is “strong”, the correlation between field before its one field and the field before its two field of the current field is “strong”, and the correlation between the current field and the field before its one field is “weak”, the decision that the input image signal is a 2-2 pulldown signal continues.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: September 14, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Himio Yamauchi
  • Patent number: 7791769
    Abstract: A method for providing a film image and an image display apparatus for providing the film image are provided. The method includes determining a scheme of an input image signal; if the input image signal is determined to be an interlaced image signal, converting the input image signal into a progressive image signal to generate a converted progressive image signal and converting a scanning rate the converted progressive image signal to generate an image signal having a selected scanning rate; if the input image signal is determined to be a progressive image signal, converting a scanning rate the input progressive image signal to generate the image signal having the selected scanning rate; and converting a color characteristic of the image signal having the selected scanning rate into an image signal having a color characteristic related to a selected type of a film. Accordingly, a general image can be viewed which has a similar effect to when a film image is projected on a screen.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-moon Byun, Tae-hong Jeong, Sang-jin Lee, Won-seok Ahn, Se-jin Pyo
  • Patent number: 7782396
    Abstract: A frame rate converting apparatus for converting a frame rate of an input first image signal and outputting the image signal having the converted frame rate as a second image signal. The apparatus includes an input section into which the first image signal is input; a detecting section for detecting a time difference between synchronization timing of each frame of the first image signal and synchronization timing of each frame of the second image signal; a section for determining an output method of outputting the first image signal in conformity with a frame rate of the second image signal, based on a time period of each frame of the first image signal, a time period of each frame of the second image signal, and the above time difference; and an output section for outputting the first image signal as the second image signal in accordance with the determined output method.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: August 24, 2010
    Assignee: Olympus Corporation
    Inventor: Kazuhiro Haneda
  • Patent number: 7750973
    Abstract: A pickup 1 generates a video signal based on an arbitrarily set frame rate. A frame rate converter 2 converts a frame rate of the video signal output from the pickup 1 into a predetermined frame rate. Frame rate conversion information output units 6 and 4 output information on frame rate conversion in a manner corresponding to a video signal after the frame rate conversion.
    Type: Grant
    Filed: November 11, 2002
    Date of Patent: July 6, 2010
    Assignee: Panasonic Corporation
    Inventors: Hiromi Nakase, Shinji Takemoto, Yukio Shimamura, Akiyuki Noda, Katsuyuki Taguchi
  • Publication number: 20100141832
    Abstract: A method of converting a frame rate of a video signal includes the steps of: receiving a pulldown film sequence existing in or converted from a sequence of successive-in-time frames of the video signal, in which the pulldown film sequence comprises a plurality of diverse original frames each having a corresponding number of duplicate frames; modifying the original frames; performing estimation of at least one motion vector associated with the modified original frames; and interpolating new frames between the modified original frames in accordance with the motion vector.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 10, 2010
    Applicant: HIMAX MEDIA SOLUTIONS, INC.
    Inventors: Sheng-Chun Niu, Ling-Hsiu Huang
  • Patent number: 7719614
    Abstract: In an apparatus and method for converting the frame rate of an image signal in a display system without an external memory, the display system and method are capable of down converting the frame rate of an image signal using a frame rate conversion unit without an external memory. The system and method can be used even in the case where the frequencies of input and output synchronization signals are locked to the same frame rate. The frame rate conversion unit disable-masks portions of the frames of a data enable signal or a vertical synchronization signal, thus canceling the portions of the frames, and outputs the masked data enable signal or the masked vertical synchronization signal to an LCD driving circuit unit, thereby down converting the frame rate of the image signal.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: May 18, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwe-ihn Chung, Sang-ha Hwang, Byeong-du La
  • Publication number: 20100118932
    Abstract: Multifunctional transmitters capable of transmitting signals of different specifications in different modes are provided, in which N output units are provided and each output unit comprises a serializer and an output driver. A control unit, according to a mode selection signal, selects a first set of output units from the N output units to transmit a first video data compatible with a first transmission interface under a first transmission mode and selects a second set of output units from the first set of output units to transmit a second video data compatible with a second transmission interface which is different from the first transmission interface under a second transmission mode.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 13, 2010
    Applicant: MEDIATEK INC.
    Inventors: Yan-Bin Luo, Tang-Hung Po
  • Patent number: 7711050
    Abstract: An image-coding format converting apparatus comprising an MPEG2 image decoder 30, a resolution/frame rate converter 31, a motion vector converter 32, and an MPEG4 encoder 33. The MPEG2 decoder 30 decodes a bit stream of MPEG2 image codes, generating an image signal. The resolution/frame rate converter 31 converts the image signal. The MPEG4 encoder 33 encodes the output of the resolution/frame rate converter 31, generating a bit stream of MPEG4 image codes. In the resolution/frame rate converter 31, pixels are added or extracted in accordance with the start position of a macro block, thus adjusting the input image signal to one than can easily be encoded to MPEG4 image codes. The motion vector converter 32 generates an MPEG4 motion vector from parameters such as an MPEG2 motion vector. The MPEG4 encoder 33 uses the MPEG4 motion vector to encode the output of the resolution/frame rate converter 31.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: May 4, 2010
    Assignee: Sony Corporation
    Inventors: Zhu Yiwen, Yoichi Yagasaki, Takefumi Nagumo, Kuniaki Takahashi
  • Publication number: 20100091111
    Abstract: A method for setting a frame rate conversion (FRC) and a display apparatus using the same are provided. According to a method for setting FRC, an FRC level is received from a user; and a motion estimation and motion compensation level when performing FRC is set according to the input FRC level. Therefore, a user may set the FRC level according to the user's preference.
    Type: Application
    Filed: May 26, 2009
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jeong-woo KANG
  • Patent number: 7697071
    Abstract: A device for detecting a display mode of a video signal having first pixels corresponding to a first field, second pixels corresponding to a second field, and third pixels corresponding to a third field, includes a pixel converter, a measurement circuit, and a decision circuit. The pixel converter converts the second pixels to generate converted pixels. The measurement circuit generates measurement values related to differences between a converted pixel, a first pixel, and a third pixel. The decision circuit determines the display mode of the video signal according to the first, second, and third measurement values.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: April 13, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chao-Chih Huang, Po-Wei Chao
  • Patent number: 7688386
    Abstract: According to one embodiment, a de-interlacing apparatus includes: a motion vector detecting section; a full-screen shift detecting section detecting a full-screen shift; a moving-or-still judging section performing a moving/still judgment for a video signal; a moving judgment correcting section correcting a moving/still judgment result to lean toward a moving judgment when full-screen shift is detected; a first interpolation signal generating section generating a first interpolation signal for interpolating a one-field delay signal based on the motion vector and the full-screen shift; a second interpolation signal generating section generating a second interpolation signal for interpolating the one-field delay signal from a current field signal or a two-field delay signal; and an interpolation signal mixing section mixing the first and second interpolation signals to generate a mixed interpolation signal.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: March 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Tokutomi, Himio Yamauchi, Shogo Matsubara
  • Patent number: 7683920
    Abstract: An image sending/receiving device of the present invention includes: an image receiving section for receiving image data from an external image reproducing device connected to the image sending/receiving device; an image sending section for sending the image data to an external image display device connected to the image sending/receiving device; a first storage section for storing a set of resolutions to be read out by the image reproducing device; a second storage section in which a set of resolutions are pre-stored; a read-out section for reading out a set of resolutions pre-stored in the image display device from the image display device; and a resolution registration section for registering, in the first storage section, all of the resolutions read out by the read-out section or a subset of resolutions among those read out by the read-out section with which the image sending section is able to send data to the image display device.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: March 23, 2010
    Assignee: Onkyo Corporation
    Inventors: Koji Kitayama, Hiroyuki Fukuma
  • Publication number: 20100039557
    Abstract: It is an object to prevent the image quality deterioration of a moving image likely to include a plurality of the same consecutive images such as a movie video and an animation video due to the motion-compensated frame rate conversion (FRC) processing. An image displaying device is provided with an FRC portion (10) for converting the number of frames in an input image signal by interpolating an image signal to which a motion compensation processing has been given between the frames in the input image signal, a genre determining portion (14) for determining whether the input image signal is a predetermined genre, and a controlling portion (15).
    Type: Application
    Filed: April 4, 2007
    Publication date: February 18, 2010
    Inventors: Takeshi Mori, Seiji Kohashikawa, Hiroyuki Furukawa, Masafumi Ueno, Kenichiroh Yamamoto, Takashi Yoshii
  • Publication number: 20100026891
    Abstract: An image signal processing unit and an image signal processing method thereof An image signal processing unit estimates motion characteristics of an input image, and adjusts a phase of an interpolation frame according to the motion characteristics when converting a frame rate. Accordingly, linearity can be maintained according to the motion characteristics of an input image, and the frame rate can be converted without generating noise such as halo artifacts.
    Type: Application
    Filed: February 19, 2009
    Publication date: February 4, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shin-haeng KIM, Yeong-taeg KIM
  • Patent number: 7652721
    Abstract: One embodiment disclosed relates to the use of object motion estimation to interlace a progressive video sequence. One of a plurality of consecutive frames is segmented and motion vectors for each segment are determined though object motion estimation. Interpolated motion vectors are used to construct at least one intermediate frame, and interlaced fields are extracted from the new sequence of frames that includes intermediate frames. An interlaced sequence with smooth, incremental motion is thus constructed from a progressive video sequence.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: January 26, 2010
    Assignee: Altera Corporation
    Inventors: Gary R. Holt, Edward R. Ratner
  • Publication number: 20100013992
    Abstract: A method and system for detecting motion at a temporal intermediate position between image fields is provided. One implementation involves detecting an uncovering area in the temporal intermediate position in an image field; determining a motion vector candidate, in place of a current original motion vector, for the temporal intermediate position with a detected uncovering area; and determining a motion vector representing motion at the temporal intermediate position by combining the candidate motion vector with a current original motion vector for the temporal intermediate position. Erroneous motion vectors in uncovering areas are eliminated.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 21, 2010
    Inventors: Zhi Zhou, Yeong-Taeg Kim
  • Publication number: 20100013993
    Abstract: A system and method for detecting the presence and location of pull-down fields in a video field stream. Various aspects of the present invention may comprise method steps and circuit structure for generating an array of variance indications, each of which represents a degree of variance between two video fields in the video field stream. Various aspects may comprise comparing the array of variance indications to a pattern to detect a pull-down field in the video field stream. Various aspects may comprise comparing corresponding portions of video fields and generating a histogram of differences between the corresponding portions. Various aspects may comprise generating an indication of variance of the histogram and analyzing the indication of variance. Various aspects may comprise analyzing an array of such indications of variance and may comprise comparing the array of such indications to a pattern or plurality of patterns.
    Type: Application
    Filed: September 25, 2009
    Publication date: January 21, 2010
    Applicant: BROADCOM CORPORATION
    Inventors: Darren Neuman, Joseph Del Rio, Vadim Kochubievski, Craig Zinkievich, Shannon Posniewski, Alexander G. MacInnis