Digital Patents (Class 348/508)
-
Patent number: 9892698Abstract: Disclosed are a controlling device and method for frequency synchronization as well as a LCD TV. The method is applied to an LCD TV, wherein the LCD TV includes a front-end motherboard chip, a main drive control chip and a plurality of column drive control chips, the method includes: when the main drive control chip recognizes that its operating frequency is unstable, it generates a clock turn-off signal; the main drive control chip transmits fixed data to each column drive control chip according to the clock turn-off signal and receives a clock training request initiated by each column drive control chip according to the fixed data; and when recognizing that the operating frequency synchronizes with a frequency corresponding to front-end data transmitted by the front-end motherboard chip, the main drive control chip responds to the clock training request and transmits clock training data to each column drive control chip.Type: GrantFiled: March 28, 2017Date of Patent: February 13, 2018Assignees: HISENSE ELECTRIC CO., LTD., HISENSE USA CORPORATION, HISENSE INTERNATIONAL CO., LTD.Inventors: Shili Zhang, Haoqiang Fang, Qinghua Tian, Zhongjun Zhang
-
Patent number: 9013631Abstract: Methods and apparatus for processing and displaying caption information associated with a video program are provided. The caption information is extracted from a video signal and different captions are rendered in sequence for different segments of the video program. A plurality of the different captions is blended in a form for simultaneous display superimposed on video images during one of the different segments of the video program. The different captions may be the latest caption corresponding to the current segment of video and a previous caption corresponding to a previous video segment. These different captions can be displayed such that they overlie each other and such that their opacity is different. In this manner, a viewer is able to have a prolonged period of time to read captions and can readily distinguish the current caption from the previous caption.Type: GrantFiled: June 22, 2011Date of Patent: April 21, 2015Assignee: Google Technology Holdings LLCInventors: Denis Sergeyevich Suvorov, Anton S. Korchazhinskiy, Irina Spirina
-
Patent number: 8953013Abstract: This invention discloses an image pickup device and an image synthesis method thereof The image pickup device comprises an image-pickup module, an image-synthesis module, a database and a processing module. The image-pickup module captures a plurality of temporary images of a scene. The image-synthesis module extracts a part of each temporary image and combines the parts to form a panorama temporary image, and splits the panorama temporary image into a plurality of zone-areas according to at least one threshold value and a panorama luminosity histogram. The database stores a lookup table for recording a plurality of exposure values. The plurality of the exposure values correspond to luminance values of the zone-areas respectively. The processing module obtains the plurality of exposure values corresponding to the luminance values and obtains a weighting-exposure value by an equation, and controls the image-pickup module to capture the panorama image according to the weighting-exposure value.Type: GrantFiled: July 30, 2012Date of Patent: February 10, 2015Assignee: Altek CorporationInventors: Hong-Long Chou, Chia-Chun Tseng, Chia-Yu Wu
-
Patent number: 8830395Abstract: Systems and methods are provided for upscaling a digital image. A digital image to be upscaled is accessed, where the digital image comprises a plurality of pixel values. A first half pixel value is computed for a first point in the digital image based on a plurality of pixel values of the digital image surrounding the first point and an activity level. A second half pixel value is computed for a second point in the digital image, and an interpolated pixel of an upscaled version of the digital image is determined using a plurality of the pixel values, the first half pixel value, and the second half pixel value.Type: GrantFiled: December 10, 2013Date of Patent: September 9, 2014Assignee: Marvell World Trade Ltd.Inventors: Yun Gong, Dam Le Quang
-
Patent number: 8804035Abstract: A method and system for communicating text descriptive data has a receiving device that receives a data signal having text description data corresponding to a description of a video signal. A text-to-speech converter associated with the receiving device converts the text description data to a first audio signal. A display device in communication with the text-to-speech converter converts the first audio signal associated with the receiving device to an audible signal.Type: GrantFiled: September 25, 2012Date of Patent: August 12, 2014Assignee: The DIRECTV Group, Inc.Inventors: Scott D. Casavant, Brian D. Jupin, Stephen P. Dulac
-
Patent number: 8654873Abstract: In one embodiment, a Television (TV) receiver to perform a method of synchronizing a demodulator at a Viterbi decode input in the TV receiver using one or more bit de-interleaved even and odd Orthogonal Frequency Division Multiplexing (OFDM) symbols is provided. The method includes (i) performing a Viterbi decoding on the bit de-interleaved even and odd OFDM symbols when a frame boundary does not exist for the bit de-interleaved even and odd OFDM symbols, (ii) performing a convolutional encoding on an decoded data output of the Viterbi decoding, (iii) determining whether an output of the convolutional encoding of the bit de-interleaved OFDM symbols matches an input at a Viterbi decode, and (iv) determining whether the output of the convolutional encoding of the bit de-interleaved even and odd OFDM symbols matches with a SYNC pattern or a SYNC? pattern to obtain a RS packet align boundary.Type: GrantFiled: March 30, 2012Date of Patent: February 18, 2014Inventors: Gururaj Padaki, Sunil Hosur Rames, Rakesh A Joshi, Raghavendra Raichur, Rajendra Hegde
-
Patent number: 8648965Abstract: An image signal processor and a method for processing an image signal thereof are disclosed. When the image signal processor executes an automatic chroma gain control (ACC), the image signal processor adjusts a variable rate of ACC gain according to a size of an input color signal to reduce a time for processing the ACC. Even if a difference between the size of the input color signal and the size of a reference color signal is large, the ACC is rapidly processed. As a result, transient phenomenon disappears from a screen.Type: GrantFiled: January 17, 2008Date of Patent: February 11, 2014Assignee: Samsung Electronics Co., Ltd.Inventor: Hye-joung Park
-
Patent number: 8310595Abstract: A method, and apparatus, and logic encoded in one or more computer-readable media to carry out a method. The method is to sample analog video at a sample clock rate and at a phase selected from a set of phases based on a quality measure determined from the sampled video. The quality measure is based on statistics of pixel to pixel differences in a coordinate of the generated digital video that have a magnitude exceeding a pre-determined threshold.Type: GrantFiled: April 21, 2008Date of Patent: November 13, 2012Assignee: Cisco Technology, Inc.Inventors: Maurice J. Buttimer, Andrew P. Weir, Michael A. Arnao
-
Patent number: 8159619Abstract: A multi-standard integrated television receiver is disclosed. According to the invention, a RF tracking filter is provided to receive a RF signal and then filter out a fifth order and above harmonics and a band-pass filter is provided to further eliminate harmonics. Moreover, a double quadrature mixer is provided to remove third order harmonics. Accordingly, the quality factor requirement of the RF tracking filter and the linearity requirement of the band-pass filter are relaxed. Thus, the RF tracking filter and the band-pass filter can be fully integrated without any external components.Type: GrantFiled: October 6, 2009Date of Patent: April 17, 2012Assignee: Sunplus Technology Co., Ltd.Inventor: Yu-Tung Chen
-
Patent number: 7365796Abstract: A digital signal processing based decoder is disclosed. The decoder asynchronously samples video signals. By doing so, the decoder can work in pseudo real-time and without analog interface components improving performance while reducing cost.Type: GrantFiled: May 20, 2004Date of Patent: April 29, 2008Assignee: Pixelworks, Inc.Inventor: Neil Woodall
-
Patent number: 7330217Abstract: Chrominance phase error correction circuitry includes a demodulator for demodulating a received video color burst signal into first and second demodulated signals and signal generation circuitry for providing to the demodulator a demodulating signal for demodulating video color burst signal. Phase correction circuitry detects a phase error from the first and second demodulated signals and varies a phase of the demodulating signal to provide a corrected demodulating signal for demodulating a video chrominance signal with the demodulator during an active video period.Type: GrantFiled: October 20, 2004Date of Patent: February 12, 2008Assignee: Cirrus Logic, Inc.Inventor: Rahul Singh
-
Patent number: 7321397Abstract: A color frame identifier circuit generates a pseudo-subcarrier signal and compares the pseudo-subcarrier signal to a sliced color burst of at least one selected line in a video frame. Based on this comparison, a processing circuit determines the color frame.Type: GrantFiled: September 8, 2004Date of Patent: January 22, 2008Assignee: Gennum CorporationInventor: Nigel James Seth-Smith
-
Patent number: 6760076Abstract: There is disclosed a system and method for recovering a recurring data segment synchronization pattern in the presence of an arbitrary phase rotation of a pilot carrier by detecting and compensating for the amount of the phase rotation. The system comprises a first synchronization pattern detector capable of receiving a real component of a complex signal and detecting a data segment synchronization pattern on the real component, and a second synchronization pattern detector capable of receiving an imaginary component of a complex signal and detecting a data segment synchronization pattern on the imaginary component. There is also disclosed a method for compensating a pilot carrier phase rotation comprising the steps of determining the angle of pilot carrier phase rotation present in a complex signal and rotating the pilot carrier signal through the same angle in the opposite direction.Type: GrantFiled: December 8, 2000Date of Patent: July 6, 2004Assignee: Koninklijke Philips Electronics N.V.Inventor: Karl R. Wittig
-
Patent number: 6741289Abstract: A technique to stabilize subcarrier generation in a line-locked digital video system, caused by simultaneous locking of the genlock device causing continuous changing of a shared clock signal, by calculating a time shift occurring in an output waveform, converting the time shift into an equivalent phase shift and sending a corresponding phase correction number to a waveform generator block to correct the time shift, and thus stabilize subcarrier generation.Type: GrantFiled: October 31, 2000Date of Patent: May 25, 2004Assignee: Fairchild Semiconductors, Inc.Inventor: Ara Bicakci
-
Patent number: 6654065Abstract: A standard signal processing apparatus for a digital display that is adaptive for a digital display device. In the apparatus, a synchronizing signal/image signal separator separates an input signal into a composite synchronizing signal and image signals. A synchronizing signal separator separates the composite synchronizing signal into horizontal and vertical synchronizing signals. A clock generator generates a clock signal using any one of the horizontal synchronizing signal and the composite synchronizing signal. A display receives the clock signal, the image signals and the horizontal and vertical synchronizing signals to display a picture.Type: GrantFiled: August 30, 2000Date of Patent: November 25, 2003Assignee: LG Electronics Inc.Inventor: Ki Cheol Sung
-
Patent number: 6538702Abstract: A color signal reproducing circuit having A/D converter 101, sync separator 102, YC separator 103, gain controller 105, multipliers 106 and 107, low-pass filters 108 and 109, burst-period cumulative adders 110 and 111, SINCOS generator 112, clock generator 113, and ramp-wave generator 114. The simple structure allows a color signal reproducing circuit to be used commonly in a different television systems without changing its clock frequency considerably in accordance with broadcasting systems and also achieves YC separation and color signal demodulation from analog composite signal with a higher degree of precision.Type: GrantFiled: September 11, 2000Date of Patent: March 25, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Nobuo Taketani, Hiroshi Moribe, Hisao Morita, Ryuichi Shibutani, Hiroshi Ando
-
Patent number: 6330034Abstract: A microprocessor controlled color phase locked loop is provided which provides flexibility and adaptability for different television standards and sampling rates. Color burst phase error and color burst amplitude information are stored in data registers located at the output of the phase locked loop's low pass filter rather than at the output of the color demodulator.Type: GrantFiled: October 30, 1998Date of Patent: December 11, 2001Assignee: Texas Instruments IncorporatedInventors: Karl Renner, Peter Chang
-
Patent number: 6292224Abstract: An improved method for generating an NTSC compatible color television video signal having a main carrier signal and a color subcarrier signal 3,579,545 Hz above the main carrier signal. The main carrier signal is modulated by a luminance signal, while the color subcarrier is modulated in quadrature with color difference signals. The luminance and color difference signals provide 525 scan lines of picture frame information at a rate of 29.97 frames per second so that the color subcarrier has 227.5 cycles for each scan line, resulting in 119,437.5 color subcarrier cycles per frame. The additional half cycle causes a subcarrier phase inversion from frame to frame, which produces undesirable dot-crawl. The improvement comprises incrementing the phase of the color subcarrier by a fixed increment at a number of predetermined intervals in each picture frame, to produce a total phase shift which prevents the phase inversion. The total phase shift is an odd-half-multiple of a color subcarrier cycle.Type: GrantFiled: May 16, 1997Date of Patent: September 18, 2001Assignee: LSI Logic CorporationInventor: Brian K. Ogilvie
-
Patent number: 6172713Abstract: A color system determination circuit for use with an input video signal having a frequency component is disclosed. The circuit includes a color trap filter for attenuating the frequency component in the input video signal with the color trap filter providing a color burst output signal, a comparator for comparing the color burst output signal of the color trap filter and the frequency component of the input video signal, a maximum value detector which receives the color burst output signal of the color trap filter and a color burst sampling signal and detects a maximum value of the color burst output signal of the color trap filter during a period of the color burst sampling signal, and another maximum value detector which receives the video signal and the color burst sampling signal and detects a maximum value of the video signal during the period of the color burst sampling signal.Type: GrantFiled: December 10, 1997Date of Patent: January 9, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hisao Morita
-
Patent number: 6064446Abstract: In a method of demodulating an analog chrominance signal (C), digital quadrature signals are generated (DPA, SIN ROM, COS ROM) for demodulating (MUL DAC U, MUL DAC V) the analog chrominance signal (C) to obtain analog demodulated color difference signals (U, V). A digital phase error signal is furnished (.SIGMA..DELTA.mod) from at least one (V) of the analog demodulated color difference signals (U, V). The digital phase error signal is digitally filtered (DLF) to obtain a phase control signal (K) for the digital quadrature signals generation (DPA, SIN ROM, COS ROM).Type: GrantFiled: February 12, 1998Date of Patent: May 16, 2000Assignee: U.S. Philips CorporationInventors: Roy W.B. Wissing, Roy P.M. Van Lammeren, Marcellinus J.M. Pelgrom
-
Patent number: 6034735Abstract: A clock generation circuit for a digital video processing apparatus which has a simple structure and can be stably worked in both luminance and color signal systems. A color burst phase error signal indicative of phase difference of a color burst signal is produced on the basis of two color difference signals, a sampling clock signal is generated in accordance with the color burst phase error signal, the sampling clock is divided in order to produce a chrominance subcarrier signal, and the phase of the chrominance subcarrier signal is adjusted in accordance with the color burst phase error signal.Type: GrantFiled: April 8, 1997Date of Patent: March 7, 2000Assignee: Motorola, Inc.Inventors: Toru Senbongi, Hitoshi Matsunaga, Hiroshi Odanaga
-
Patent number: 5995168Abstract: A video receiver includes a tuner, a QAM demodulator including a selective gated PLL carrier recovery circuit, and a digital equalizer. The selective gated PLL carrier recovery circuit has a normal operation mode and a selection control mode. The channel changing of the tuner is performed after the selective gated PLL carrier recovery circuit is set to the selection control mode and the digital equalizer is held at its current state.Type: GrantFiled: January 30, 1997Date of Patent: November 30, 1999Assignee: NEC CorporationInventor: Manabu Yagi
-
Patent number: 5940137Abstract: A video transmission system and method including a technique for deriving clock information in a receiver from a transmitted analog video signal to decipher digital data encoded on the video signal. A phase-locked loop in the transmitter is used to phase-lock a color burst subcarrier in the video signal to a local oscillator in the phase-locked loop to phase-lock a data clock to the subcarrier. A phase-locked loop in the receiver is also used to phase-lock the subearrier of the transmitted video signal to a local oscillator in the phase-locked loop to again phase-lock a data clock to the subcarrier. By phase-locking a data clock to the subcarrier in both the transmitter and receiver, the data clock and the receiver can be synchronized to the data clock and the transmitter to provide for effective digital data recovery without the use of additional data bits for clock phase information.Type: GrantFiled: February 6, 1997Date of Patent: August 17, 1999Assignee: TRW Inc.Inventor: Robert W. Hulvey
-
Patent number: 5786865Abstract: A digital amplitude and phase detector for detecting the amplitude and phase of a color burst digital signal used in television systems is provided. The detector comprises a phase lock loop circuit for detecting the phase of said color burst signal and for generating a synchronous constant amplitude sinusoidal signal; multiplying circuit for generating a product signal by multiplying the color burst signal by the constant amplitude sinusoidal signal, wherein said product signal has a high-frequency component and a low-frequency component having an amplitude substantially proportional to that of the color burst signal; and low pass filter circuit coupled to said multiplying circuit for filtering said product signal such that the high-frequency component is substantially suppressed relative to that of the low-frequency component. A video encoder using the digital amplitude and phase detector is also provided.Type: GrantFiled: June 28, 1996Date of Patent: July 28, 1998Assignee: Zilog, Inc.Inventors: Oscar Ayzenberg, Anatoliy V. Tsyrganovich
-
Patent number: 5719512Abstract: An oscillator includes a frequency-controllable clock generator, and a digital oscillator responsive to a clock generated by the clock generator for oscillating a data sequence at a period in proportion to the clock and also discretely controllable in accordance with a frequency switching signal.Type: GrantFiled: December 22, 1995Date of Patent: February 17, 1998Assignee: Kabushiki Kaisha ToshibaInventor: Akihiro Murayama
-
Patent number: 5459524Abstract: This invention is for a reference generator and demodulator for recovering information which has been phase, modulated on (or encoded on) a carrier. The inventive concepts described herein include a novel reference measurement circuit including a sampler and phase measurement circuit to measure the carrier reference's phase and/or frequency relative to a discrete time sampling phase and frequency, and a demodulator reference signal generator to generate properly phased reference signals for use by the phase demodulator circuit. The invention is particularly useful for decoding chroma difference signals of PAL and NTSC television video signals. It is suited to be implemented in digital form, operating on digitized signals thereby deriving all of the benefits normally expected of digital signal processing, including precision, freedom from drift and freedom from alignment. The invention is also particularly well suited to implementation by integrated circuit.Type: GrantFiled: November 18, 1994Date of Patent: October 17, 1995Inventor: J. Carl Cooper
-
Patent number: 5396294Abstract: Different from typical signal processing which employs a feedback control, by adopting a demodulating circuit employing AFC, which is not affected by a comb filter, the response characteristic against jitter is improved and a down converted chrominance signal can be demodulated with a good accuracy. Therefore, the noise rejection effect by a comb filter is improved, the detecting accuracy of the residual phase error is also improved, and the S/N ratio of the phase is improved by combining feedforward APC compensation with a velocity error, and this results in a much improved picture quality.Type: GrantFiled: June 9, 1993Date of Patent: March 7, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kunihiko Fujii, Naoshi Usuki
-
Patent number: RE41399Abstract: A technique to stabilize subcarrier generation in a line-locked digital video system, caused by simultaneous locking of the genlock device causing continuous changing of a shared clock signal, by calculating a time shift occurring in an output waveform, converting the time shift into an equivalent phase shift and sending a corresponding phase correction number to a waveform generator block to correct the time shift, and thus stabilize subcarrier generation.Type: GrantFiled: March 25, 2005Date of Patent: June 29, 2010Assignee: Fairchild Semiconductor CorporationInventor: Ara Bicakci