Abstract: Methods and systems for managing media objects by maintaining one unique location that the media object is stored to and accessible from. A media object is received by a computing system and a unique uniform resource identifier is determined based at least in part on identification information corresponding to the media object. The identification information is requested from a remote identification information maintenance service. The media object is provided to a storage location corresponding to the determined unique uniform resource identifier.

Abstract: A system for cadence break detection is provided. The system includes a field system receiving a plurality of fields of image data. A threshold system generates a cadence break signal if a difference in two fields exceeds a predetermined threshold. A sequence system generates the cadence break signal if a sequence of differences between the plurality of fields does not match a predetermined sequence.

Abstract: A method and apparatus for increasing the effective contrast ratio and brightness yields for digital light valve image projectors using a variable luminance control mechanism (VLCM), associated with the projector optics, for modifying the light output and provide a correction thereto; and an adaptive luminance control module (ALCM) for receiving signals from the video input board, the adaptive luminance control module producing a signal on a VLCM bus connecting the variable luminance control mechanism and the adaptive luminance control module, the signal causing the variable luminance control mechanism to change the luminance of the light output and provide a corrected video signal for the projector.

Abstract: Spatial or temporal interpolation may be performed upon source video content to create interpolated video content. A video signal including the interpolated video content and non-interpolated video content (e.g. the source video content) may be generated. At least one indicator for distinguishing the non-interpolated video content from the interpolated video content may also be generated. The video signal and indicator(s) may be passed from a video source device to a video sink device. The received indicator(s) may be used to distinguish the non-interpolated video content from the interpolated video content in the received video signal. The non-interpolated video content may be used to “redo” the interpolation or may be recorded to a storage medium.

Abstract: A first multiplexer, at each given cycle, outputs a second input data signal, after outputting a first input data signal. A second multiplexer, at each given cycle, outputs a fourth input data signal, after outputting a third input data signal. The second multiplexer outputs the third input data signal at a timing that coincides with the timing at which the second input data signal is output from the first multiplexer. At each given cycle, a third multiplexer, after outputting the first input data signal and the second input data signal output from the first multiplexer, outputs the third input data signal and the fourth input data signal output from the second multiplexer.

Abstract: A method for de-interlacing interlaced video includes receiving a first video field and a second video field of an interlaced video frame, generating a first video frame from the first video field and a first synthesized video field, where video data of the first synthesized video field is based exclusively on video data of the first and second video fields, generating a second video frame from the second video field and a second synthesized video field, where video data of the second synthesized video field is based exclusively on the video data of the first and second video fields, and outputting two de-interlaced video frames for every received interlaced video frame. The first (second) synthesized video field is generated by combining image data from the second (first) video field with image data from corresponding lines of an up-scaled first (second) field generated by a scaler.

Abstract: A method for identifying state of macro block of de-interlacing computing and an image processing apparatus are provided, the method is as follows. A video frame is divided into a plurality of regions, where each of the regions includes a plurality of macro blocks. Then, a basic threshold corresponding to each of the regions is provided according to a position of each of the regions in the video frame, and a first macro block is identified to be a first type macro block or a second type macro block according to the basic threshold corresponding to one of the regions where the first macro block of the macro blocks locates. Then, a corresponding de-interlacing computing step is performed on the first macro block according to an result that the first macro block is identified as the first type macro block or the second type macro block.

Abstract: Stereographic glasses includes reception-stop timing control means that is so arranged as to: (i) cause a wireless-signal receiving section to stop receiving signals, after a cycle detection section detects a cycle of synchronous signals and a liquid crystal shutter control data memory section stores liquid crystal shutter control data therein signals; (ii) cause a liquid crystal shutter control signal timing generation section to generate timings for controlling opening and closing of liquid crystal shutters, based on cycle signals generated by a cycle signal generation section and the liquid crystal shutter control data stored in the liquid crystal shutter control data memory section; and (iii) cause a liquid crystal shutter control section to open and close the liquid crystal shutters, at the timings thus generated.

Abstract: Provided is a data receiving device and method for shortening a channel switching time in a DMB system. The device includes a CDM channel for receiving a broadcasting signal from a DMB satellite, demodulating the broadcast signal, and generating a MPEG2-TS packet. a GOP buffer for receiving the MPEG2-TS packet, checking whether or not the received MPEG2-TS packet is a key frame, and, when it is determined that the received MPEG2-TS packet is the key frame, initializing the buffer and storing the received MPEG2-TS packet as a GOP unit, a channel switch for switching a channel of a DMB service to the GOP buffer, an A/V reproducing buffer for buffering a predetermined amount of A/V data to reproduce the A/V data of the GOP buffer; and an A/V decoder for receiving and decoding the A/V data.

Abstract: Header information is used to facilitate coarse frequency and frame recovery. The coarse frequency and frame recovery is thereafter utilized to perform adaptive phase and frequency synchronization on a frame-by-frame basis. In one aspect, a frame identifier in a physical layer header of the digitized signal is utilized to estimate a first phase associated with the frame identifier. The remaining portion of the physical layer header is utilized to estimate a second phase associated with the remaining portion. The first phase estimate and the second phase estimate are combined to generate a first combined phase estimate.

Abstract: The invention concerns receive circuitry for extracting horizontal and vertical synchronization signals from a digital synchronization signal associated with a video signal, the digital synchronization signal having a plurality of pulses, the receive circuitry including detection circuitry arranged to determine a first value indicative of the time delay between a timing edge of a first pulse and a timing edge of a second pulse of the digital synchronization signal; and a synchronization extraction block arranged to determine that one of the plurality of pulses is a vertical synchronization pulse based on a comparison between the first value and a reference value.

Abstract: In a device for separating a synchronous signal in a video signal, a capacitor receives the video signal to obtain a coupling signal, a level determining circuit receives the coupling signal and compares a voltage level of the coupling signal with a number of reference voltages. The reference voltages define several reference voltage ranges, one of which is a predetermined reference voltage range. The level determining circuit outputs an adjusting signal according to a reference voltage range corresponding to a minimum voltage level of the coupling signal within a predetermined time period. A level adjusting circuit has several current sources for receiving the adjusting signal and thus controls the current sources to adjust a DC level of the coupling signal. A synchronous signal separating circuit separates the synchronous signal from the coupling signal when the minimum voltage level of the coupling signal is substantially within the predetermined reference voltage range.

Abstract: A multi-slicing horizontal synchronization signal generating apparatus and method is provided. The apparatus includes a slicer, a numerically controlled oscillator (NCO), a first phase detector, a second phase detector and a calibration circuit. The slicer performs edge detection on a video signal having a first horizontal synchronization, and generates a first detection signal and a second detection signal according to a first voltage level and a second voltage level, respectively. The NCO generates a second horizontal synchronization signal. The first phase detector detects a first phase difference between the first detection signal and the second horizontal synchronization signal, and the second detector detects the second phase difference between the second detection signal and a reference time point. The calibration circuit generates a calibration signal according to the first phase difference and the second phase difference.

Abstract: Field order in a sequence of video frames is determined based on magnitude or relative motion of a motion vector between a bottom field of a current frame and a top field of a next frame, and magnitude or relative motion of a motion vector between a top field of the current frame and a bottom field of the next frame. Field order of two interlaced frames of a video sequence is determined by assembling two new frames from the two interlaced frames by combining a bottom field of the first frame with a top field of the second frame and by combining a top field of the first frame with a bottom field of the second frame. The field order is top field first if the number of zipper points in the first new frame is smaller than the number of zipper points in the second new frame.

Abstract: In one aspect a transmission system with a transmitter which can be connected to a video source and a receiver linked to the transmitter via at least four circuit pairs, to which receiver a playback device can be connected is provided. Data is usually exchanged digitally between a graphics card in a personal computer and an LCD display module. The personal computer transmits a digital R, G, B video signal to the LCD display module via a special, so-called DVI (Digital Video Interface) cable. This DVI cable is also provided to transmit so-called DDC (Display Data Channel) data, which particularly comprises specification information of the LCD display module. A transmission system is proposed, which simplifies a connection of an LCD display module to a personal computer and with which the DVI cable can be dispensed with.

Abstract: Detects from camera information frames of probable low continuity, such as frames in which a strobe is flashed, and does not use such frames as candidate images for a reference image. As a result, the possibility that the candidate images in the frame memory are images of high continuity with a frame to be encoded increases, enabling efficient motion vector detection and making possible low data-generation-volume encoding.

Abstract: The invention concerns a method (200) and system (100) performing a trick mode on a video signal containing a plurality of original pictures. The method includes the steps of selectively skipping (214) at least one of the original pictures to convert the video signal to a trick mode video signal in response to a trick mode command and selectively inserting (224) at least one dummy bidirectional predictive picture in the trick mode video signal using field-based prediction. The method can also include the steps of monitoring (220) the trick mode video signal in which the step of selectively inserting at least one dummy bidirectional predictive picture in the trick mode video signal can be done if the bit rate of the trick mode video signal exceeds a predetermined threshold.

Abstract: A frame rate converting apparatus for converting a frame rate of an input first image signal and outputting the image signal having the converted frame rate as a second image signal. The apparatus includes an input section into which the first image signal is input; a detecting section for detecting a time difference between synchronization timing of each frame of the first image signal and synchronization timing of each frame of the second image signal; a section for determining an output method of outputting the first image signal in conformity with a frame rate of the second image signal, based on a time period of each frame of the first image signal, a time period of each frame of the second image signal, and the above time difference; and an output section for outputting the first image signal as the second image signal in accordance with the determined output method.

Abstract: Methods and apparatuses for dynamically adjusting sync windows are described. A default sync window is set; a data signal is input; detecting if parts of the data signal within the sync window form a sync pattern; accumulating a count of the sync pattern within and without the sync window; and reducing the sync window when the count of sync pattern within the sync window achieves a first threshold value, and increasing the sync window when the count of the sync pattern outside the sync window achieves a second threshold value.

Abstract: A short film generation/reproduction apparatus for generating video of a short film using at least one still picture and reproducing such video is comprised of: a picture feature extraction unit 1107 for extracting picture features from an input picture; a picture-to-style feature conversion unit 1115 for converting the picture features into style features; a picture-to-musical feature conversion unit 1118 for converting the picture features into musical features; a style determination unit 1116 for determining a style based on the style features; a music determination unit 1119 for determining a piece of music based on the musical features; and a scenario generation unit 1117 for generating a scenario by using the still picture, music and style.

Abstract: We describe and claim a system and method for horizontal and vertical sync detection and processing. A method comprises detecting synchronization information within a video signal, estimating stability of the video signal according to the detected synchronization information, and generating one or more synchronization signals according to the detected synchronization information and the estimated stability of the video signal.

Abstract: Header information is used to facilitate coarse frequency and frame recovery. The coarse frequency and frame recovery is thereafter utilized to perform adaptive phase and frequency synchronization on a frame-by-frame basis. A digitized signal representative of a wireless signal may be received. A frame identifier in a physical layer header in the signal may be identified by correlating the digitized signal to one or more known frame identifiers. The identified frame identifier may be used to estimate a phase or frequency error.

Abstract: A video signal mode detector for automatically detecting and indicating the type of video signal being received in terms of its video signal characteristics, including horizontal line count and progressive or interlaced scanning.

Abstract: Header information is used to facilitate coarse frequency and frame recovery. The coarse frequency and frame recovery is thereafter utilized to perform adaptive phase and frequency synchronization on a frame-by-frame basis. A digitized signal representative of a wireless signal may be received. A frame identifier in a physical layer header in the signal may be identified by correlating the digitized signal to one or more known frame identifiers. The identified frame identifier may be used to estimate a phase or frequency error.

Abstract: Methods and systems for determining fields in a video signal are disclosed. Historic field ID values for a received video signal may be stored and subsequently utilized by a summer and/or a correlator in order to estimate a field ID value for a current field. The summer may sum all historic field ID values and, if the sum is within a determined range, for example, the field ID value for a current field may be estimated based on the sum of the historic field ID values. If the sum is not within the determined range, for example, the historic field ID values may be correlated with an expected field ID value or with an inverted expected field ID value. The correlation may then be utilized to estimate the field ID value for the current field.

Abstract: The invention provide methods and code for better detecting 3:2 pulldown or other video formats. In one respect, embodiments of the invention improve the way in which fields of video data are compared. In another respect, embodiments of the invention provide pattern matching techniques and code for processing the field difference data.

Abstract: A synchronization detector of a video signal processor includes a line buffer, a parameter extraction unit and synchronization detection unit. The line buffer sequentially stores a digital video signal corresponding to an input analog video signal, line by line of the input analog video signal. The parameter extraction unit continuously extracts horizontal synchronization parameters from the digital video signal stored line by line and continuously extracts vertical synchronization parameters from a portion of the digital video signal stored line by line. The synchronization detection unit generates horizontal and vertical synchronization signals of the input analog video signal using time information related to local minimum values of the horizontal synchronization parameters and time information related to local minimum values of the vertical synchronization parameters.

Abstract: The invention relates to a method for detecting video frame types with median filtering, which proceeds a denoising step after calculating the comb factor of each pixel, to avoid incorrect judgment of the frame type resulting from excessive field difference and improve detection accuracy.

Abstract: Disclosed is a video signal processing apparatus comprising a plurality of line memories to which in sequence input video signal data is written on a line-by-line basis; a timing controller for controlling a timing to write video signal data to the plurality of line memories and a timing to read video signal data from the plurality of line memories; a computation output portion for computing video signal data read from the plurality of line memories and outputting video signal data differing in resolution which is determined by a pixel count in the horizontal direction and a line count in the vertical direction; and a line controller which vary the pixel count in specified lines of video signal data obtained from the computation output portion, depending on a conversion rate of the video signal data resolution.

Abstract: The present invention relates to a video signal processing device for avoiding a phenomenon that noise is upwardly or downwardly shifted due to noise reducing operation when a non-standard signal is input. When a non-standard signal is input as an input video signal, coefficients of interpolating filters for carrying out interpolation on pixels of timely-sequential field video signals are fixed as a non-standard signal supporting signal processing. With this processing, interpolated pixels achieved by the interpolation processing are located at the same vertical spatial position, and pixels which are noise-reduced by the interpolated pixels are located at the same vertical spatial position as pixels before original noise is reduced, thereby locating the pixels at the same horizontal position.

Abstract: Successive values of a horizontal phase of a video signal are determined a predetermined integer number of video lines after the successive occurrences of vertical synchronization pulses. The successive values of a parity bit are updated according to the successive values of the horizontal phase. Indications on the parity of the fields are provided from the successive values of the parity bit.

Abstract: A video signal detecting circuit includes a synchronization detector for detecting a vertical synchronous signal in an input video signal. A counter starts counting pixel clock pulses in response to every vertical synchronous signal thus detected, and outputs a first signal when the count of pixel clock pulses reaches a preselected value. A comparator compares the vertical synchronous signal detected with the first signal for outputting a second signal representative of a difference between them. A mean circuit produces a mean value of the second signals over a plurality of pictures of the input video signal. An adjusting circuit adjusts the vertical synchronous signal with the mean value to output the resultant adjusted signal as a vertical synchronous signal. The preselected number is substantially equal to the standard number of pixels included in a single picture.

Abstract: One embodiment of a method of frame detection may involve storing data indicative of a pulse duration and a number of successive occurrences of pulses having that pulse duration for each of several different pulse durations detected within a first field of a composite synchronization signal. This process may be repeated for one or more other fields of the composite synchronization signal. The data stored for each of the fields may be compared, and a frame signal may be generated dependent on an outcome of said comparing.

Abstract: A method for detecting dynamic video pixels by using adaptive counter threshold values according to field difference value of the frame in the video, thereby to determine whether the frame is an interlaced frame or a progressive frame and to eliminate incorrect judgements resulting from field difference and to improve accuracy of frame determination.

Abstract: An apparatus and a method of controlling image display in an image display apparatus having a panel and wherein an image output is synchronized to a frame synchronization signal of an input signal. The method includes determining whether or not an input synchronization signal is an abnormal synchronization signal, processing the abnormal synchronization signal if the input synchronization is the abnormal synchronization signal, and removing damaged frame data if the abnormal synchronization signal is processed.

Abstract: The invention relates to a method for detecting video frame types with median filtering, which proceeds a denoising step after caculating the comb factor of each pixel, to avoid incorrect judgment of the frame type resulting from excessive field difference and improve detection accuracy.

Abstract: The present invention is related to a video signal processing apparatus and method, a recording medium, and a program which are suitably for use in determining whether an input video signal is standard or nonstandard. In synchronization with the edge of an advance vertical sync signal xAVD, a free-running vertical sync edge counter 31 increments by 1 the count value which cycles between 0 through 7 and outputs the count value to a free-running field ID edge counter 32 and a comparator 33. In synchronization with the rising and falling edges of a field ID signal AFD, the free-running field ID edge counter 32 increments the count value by 1. The comparator 33 generates a nonstandard signal detection signal in correspondence with the FD edge count value with the V count value being 7 and a vertical sync signal xVD being at L level. The present invention is applicable to TV receivers for example.

Abstract: Images in a plurality of related images are processed such that a specific region of the image in the first frame is designated and a specific image in the specific region is modified while at the same time the information about the image characteristic quantity of the specific region and what was modified about the specific image are both stored. In the processing of the images in the second and subsequent frames, a similar region that is similar in the image characteristic quantity to the initial specific image is extracted and subjected to the same image modification as has been performed on the specific region of said first frame. Therefore, highly amusing images that have been finished to satisfy the customer's request and other needs can be obtained by simple and efficient operations; as a result, prints of high quality that reproduce such images can be produced in high yield.

Abstract: Displaying video images includes determining which of at least two video field polarities a video display is in a state to display and choosing a stored video field for display based on the determined state.

Abstract: A method for detecting dynamic video pixels by using adaptive counter threshold values according to field difference value of the frame in the video, thereby to determine whether the frame is an interlaced frame or a progressive frame and to eliminate incorrect judgements resulting from field difference and to improve accuracy of frame determination.

Abstract: A rapid channel changer for use in a digital broadband access system. The subject rapid channel changer includes a cache buffer for storing the video data and a processor for detecting and pointing to the synchronization frames. When a subscriber's channel change request is received by the processing unit, the corresponding video signal can be quickly accessed and directed downstream to the subscriber, since the processor can immediately synchronize the video data without having to wait for the next synchronization frame.

Abstract: When a field is determined by using a counter, a number of gates are needed in fabricating the counter and accordingly, the circuit scale is magnified and high cost formation is resulted. According to the invention, in a timing control circuit for separating a horizontal synchronizing signal and a vertical synchronizing signal included in a compound synchronizing signal CSYNC by a synchronizing separator circuit and forming an internal horizontal synchronizing signal and an internal vertical synchronizing signal based on a horizontal synchronizing signal Sep-HD and a vertical synchronizing signal Sep-VD after the separation, pulses P2 and P3 formed in a procedure of synchronizing separation at the synchronizing separator circuit, are utilized for determining a field in a field determining circuit and when the compound synchronizing signal CSYNC is inputted as an external synchronizing signal, whether the field is an odd number field or an even number field is determined.

Abstract: Device and method for managing a snap shot in a USB camera, the device including a camera for taking, and digitizing an image, and providing the image through an end point exclusive for an image, an interface unit for inserting either a frame sync pattern between frames of image data provided through an end point exclusive for an image or a snap shot sync pattern instead of the frame sync pattern in a snap shot mode, and a USB host for displaying an image data provided from the interface unit on a monitor in the USB host or forwarding for a picture communication, the method including the steps of (1) determining turning on/off of a snap shot button on the camera, (2) according to a result of the determination, either inserting a frame sync pattern between frames of image data and providing to the USB host, or inserting a snap shot sync pattern instead of the frame sync pattern and providing to the USB host, and (3) either displaying an image data having the frame sync pattern or the snap shot sync pattern ins

Abstract: An apparatus for detecting whether an image signal is in a film mode, includes a first field buffer, a second field buffer and a third field buffer that sequentially buffer respective fields of the image signal by order of input, using the respective fields stored in the first, the second and the third field buffers.

Abstract: A circuit for discriminating between received signals and a method therefor are provided. The circuit includes a detector for detecting a peak signal based on the degree of correlation between a received signal and a reference signal and a generator for generating a discrimination signal showing that the received signal is a high definition signal if the peak signal is detected in a predetermined period and showing that the received signal is a signal of an analog broadcasting method if the peak signal is not detected in the predetermined period. This can prevent the improper operation of a receiver by automatically determining whether the received signal according to a channel selection is a high definition digital signal or an analog broadcast signal.

Abstract: A radio receiver for receiving a selected digital TV signal uses final intermediate frequency signals the carrier frequencies of which are multiples of symbol rate. The radio receiver has a match filter receptive of rectified samples of digitized intermediate-frequency signal and responsive to the amplitude of the intermediate-frequency carrier being modulated in accordance with the field synchronization code group to generate a pulsed response to the beginning of each data field. This pulsed response is used to determine when data segment synchronization information should occur, so its detection is more certain to be accurate and data segment synchronization is more rapidly determined. Symbol synchronization is rapidly inferred from the field synchronization and data segment synchronization, so that the samples in each data line can be counted.

Abstract: A video signal detecting circuit includes a synchronization detector for detecting a vertical synchronous signal in an input video signal. A counter starts counting pixel clock pulses in response to every vertical synchronous signal thus detected, and outputs a first signal when the count of pixel clock pulses reaches a preselected value. A comparator compares the vertical synchronous signal detected with the first signal for outputting a second signal representative of a difference between them. A mean circuit produces a mean value of the second signals over a plurality of pictures of the input video signal. An adjusting circuit adjusts the vertical synchronous signal with the mean value to output the resultant adjusted signal as a vertical synchronous signal. The preselected number is substantially equal to the standard number of pixels included in a single picture.

Abstract: When video data is odd field data, interlaced data for an even field consisting of all black even line data is appended to that video data by an interlaced data appending circuit. On the other hand, when video data is even field data, interlaced data for an odd field consisting of all black odd line data is appended to that video data by the interlaced data appending circuit. Noninterlaced data generated in this way is noninterlaced-displayed on a display monitor such as an LCD, CRT, or the like.

Abstract: Successive values of a horizontal phase of a video signal are determined a predetermined integer number of video lines after the successive occurrences of vertical synchronization pulses. The successive values of a parity bit are updated according to the successive values of the horizontal phase. Indications on the parity of the fields are provided from the successive values of the parity bit.

Abstract: A method and/or apparatus is capable of performing high accuracy digital level restoration with a high degree of noise immunity provided by a passive clamping stage.