Transferred Transistor Patents (Class 349/45)
  • Patent number: 11335572
    Abstract: A transition device for a flexible device and a production method therefor, and a method for fabricating a flexible device are provided. The transition device includes a functional component and a transition base. The functional component has a first surface for mounting with a base and a second surface opposite to the first surface, and the transition base is bonded to the second surface of the functional component by an adhesive layer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 17, 2022
    Assignee: INSTITUTE OF FLEXIBLE ELECTRONICS TECHNOLOGY OF THU, ZHEJIANG
    Inventor: Yunping Gong
  • Patent number: 11134566
    Abstract: Disclosed is an apparatus for fabricating a stretchable electrical circuit, including: a stretching device configured to stretch a mounted stretchable substrate in two different directions; a marking device configured to mark a mark on the stretchable substrate; an image device configured to obtain an image of the stretchable substrate on which a plurality of alignment marks are marked by the marking device; and a control device configured to control the stretching device, the image device, and the marking device. The control device forms a first axis and a second axis using the plurality of alignment marks marked on the image obtained by the image device and marks one point of a surface of the stretchable substrate with coordinates made by the first axis and the second axis using the first axis and the second axis.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: September 28, 2021
    Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Yongtaek Hong, Byeongmoon Lee, Junghwan Byun
  • Patent number: 11076519
    Abstract: A method and system for manufacturing a device by forming a conformable interface layer from elastomer solution on semiconductor devices to facilitate picking and placing the semiconductor devices from a carrier substrate to a target substrate. The method may include transferring elastomer solution onto fluidic tips of a subset of fluidic heads of a fluidic head array by extending one or more fluidic head actuators of the subset of the fluidic heads, transferring the elastomer solution on the fluidic tips of the subset of the fluidic heads to semiconductor devices on a carrier substrate to form conformable interface layers on the semiconductor devices, and picking up the semiconductor devices via adhesive attachment with the conformable interface layers from the carrier substrate to place on a target substrate.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: July 27, 2021
    Assignee: Facebook Technologies, LLC
    Inventor: Pooya Saketi
  • Patent number: 10680020
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: June 9, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Satoru Idojiri, Kenichi Okazaki, Hiroki Adachi, Daisuke Kubota
  • Patent number: 10615230
    Abstract: An example process includes: powering, via a power supply, an active-matrix display panel comprised of picture elements; and identifying, based on an output of the power supply, one or more picture elements in the active-matrix display panel that are potentially defective. The example process may also include identifying, among one or more of the picture elements that are potentially-defective, one or more picture elements that actually are defective.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: April 7, 2020
    Assignee: Teradyne, Inc.
    Inventors: Jason A. Messier, Bradley A. Phillips, Kyle L. Klatka, Brian L. Massey, Peter J. D'Antonio, Anthony J. Suto
  • Patent number: 10424762
    Abstract: A method for manufacturing a transparent display device includes: providing a transparent flexible substrate on a support substrate; forming a display unit on a front side of the transparent flexible substrate; separating the transparent flexible substrate from the support substrate; and cleaning a rear side of the transparent flexible substrate with plasma.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: September 24, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byung Hoon Kang, Seung Jun Moon, Hee Kyun Shin, Min-Woo Lee, Woo Jin Cho
  • Patent number: 9299879
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: March 29, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 9279068
    Abstract: The present invention discloses an optical bonding apparatus, including: a first bonding layer; a second bonding layer; and a dismountable bonding layer superposed between the first bonding layer and the second bonding layer. The present invention also discloses a touch sensitive display using the optical bonding apparatus and a method of making the optical bonding apparatus.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: March 8, 2016
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Yuh-Wen Lee, Qiong Yuan, Xianbin Xu, Fengming Lin
  • Patent number: 9184211
    Abstract: To provide a method for fabricating a light-emitting device using flexible glass which is capable of withstanding a process temperature higher than or equal to 500° C., and the light-emitting device. A second substrate is attached to a support substrate using an adsorption layer. The second substrate is bonded to a backplane substrate provided with a transistor and a light-emitting element. The backplane substrate includes a separation layer and a buffer layer. A first substrate is separated from the backplane substrate by separation between the separation layer and the buffer layer. A flexible third substrate is bonded, using a second adhesive layer, to a surface of the buffer layer exposed by the separation. The support substrate is separated from the second substrate by separation between the second substrate and the adsorption layer.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: November 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiharu Hirakata
  • Patent number: 9013650
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 8928823
    Abstract: The present invention discloses a 3D display device adopting a half-source driving structure. The 3D display device includes a liquid crystal display panel. Gate lines and data lines of the liquid crystal panel are crossed with each other and define multiple pixel regions. Each gate line is bent to have a plurality of arched portions that each arched portion corresponds in position to one pixel region and forms an accommodating area. A switching element in each one of the pixel regions is mounted in the corresponding accommodating area and connected to a pixel electrode. Because the accommodating areas formed by the gate lines can accommodate switching elements, light-exiting positions of the pixel electrodes in adjacent pixel regions can be in line with each other to avoid a color washout problem when the phase retarder film is mounted with a positional error.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: January 6, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co. Ltd.
    Inventors: Chia-chiang Hsiao, Chih-wen Chen
  • Patent number: 8860635
    Abstract: Various embodiments of methods and systems for designing and constructing displays from multiple light-modulating elements are disclosed. Display elements having different light-modulating and self-assembling characteristics may be used during display assembly and operation.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: October 14, 2014
    Assignee: The Invention Science Fund I, LLC
    Inventors: W. Daniel Hillis, Nathan P. Myhrvold, Clarence T. Tegreene, Victoria Y. H. Wood, Lowell L. Wood, Jr.
  • Patent number: 8830413
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 8823893
    Abstract: To reduce power consumption and suppress display degradation of a liquid crystal display device. To suppress display degradation due to an external factor such as temperature. A transistor whose channel formation region is formed using an oxide semiconductor layer is used for a transistor provided in each pixel. Note that with the use of a high-purity oxide semiconductor layer, off-state current of the transistor at a room temperature can be 10 aA/?m or less and off-state current at 85° C. can be 100 aA/?m or less. Consequently, power consumption of a liquid crystal display device can be reduced and display degradation can be suppressed. Further, as described above, off-state current of the transistor at a temperature as high as 85° C. can be 100 aA/?m or less. Thus, display degradation of a liquid crystal display device due to an external factor such as temperature can be suppressed.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: September 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8785257
    Abstract: Disclosed is array substrate including a pixel region having a switching region, a driving region and a storage region. A switching TFT in the switching region includes a first gate electrode, a first gate insulating layer, a switching active layer on the first gate insulating layer, a switching source electrode on a first switching ohmic contact layer, and a switching drain electrode on a second switching ohmic contact layer; a driving TFT in the driving region is connected to the switching TFT and includes a first gate electrode, a second gate insulating layer, a driving active layer on the second gate insulating layer, a driving source electrode on a first driving ohmic contact layer, and a driving drain electrode on a second driving ohmic contact layer; wherein at least one of the switching and driving TFTs further includes a second gate electrode over the switching or driving active layers.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: July 22, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Hee-Dong Choi, Hye-Young Choi, Doo-Seok Yang
  • Patent number: 8730422
    Abstract: A liquid crystal display uses a layout which reduces the number of data lines relative to the number of pixel columns by providing one data line for every two pixel columns. The display is structured to prevent a passivation layer from becoming opaque due to a manufacturing haze effect by forming the pixel electrode below a gate insulating layer. It is structured to prevent a drain electrode from being damaged due to an etchant used for patterning the pixel electrode. Further, it is structured to prevent a short circuit between a common voltage line and a gate line while not substantially reducing an aperture ratio by disposing a common voltage contact hole for electrically connecting the common voltage line with a common electrode between vertically extending portions of two gate lines that generally extend horizontally.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: May 20, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Gyung-Soon Park, Il Gon Kim, Seon Young Choi, Sung Hoon Kim
  • Patent number: 8665405
    Abstract: A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: March 4, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeo-Geon Yoon, Hyoung-Wook Lee, Mi-Ae Lee, Ho-Jun Lee
  • Patent number: 8642364
    Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 4, 2014
    Assignee: Sony Corporation
    Inventors: Iwao Yagi, Hideki Ono, Mari Sasaki
  • Patent number: 8629443
    Abstract: The present invention provides an active matrix substrate in which a peripheral can be narrowed or a gap between adjacent wirings increased to improve a yield. The present invention is an active matrix substrate in which a peripheral region is provided outside a display region. In the active matrix substrate, a first, a second, and a third transistor, a floating wiring, a switching wiring, a main wiring, and a branch wiring electrically connected with the main wiring are arranged in the peripheral region. The floating wiring and branch wiring each electrically connect the first and second transistors and comprise an intersecting portion intersecting with the switching wiring, with the third transistor being provided at the intersecting portion. A gate electrode of the third transistor includes the switching wiring, one of a source electrode and a drain electrode thereof includes the branch wiring, and the other of the source electrode and the drain electrode includes the floating wiring.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: January 14, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Isao Ogasawara, Masahiro Yoshida
  • Patent number: 8599326
    Abstract: A method of manufacturing a cell wall assembly for an electro-optic display device with greyscale capability comprises: forming on a substantially planar surface of a transfer carrier, at least one dielectric structure; forming on said at least one dielectric structure at least one electrode structure; wherein said dielectric structure extends in a direction perpendicular to said surface by a distance which varies substantially within the area of the or each electrode structure; adhering said at least one electrode structure to a major surface of a substrate of glass or a plastics material; and removing the transfer carrier. Other aspects of the invention include the cell wall assembly, a device with greyscale capability, a method of manufacturing the device, and the transfer carrier.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: December 3, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen Christopher Kitson, John Christopher Rudin, Adrian Derek Geisow
  • Patent number: 8546804
    Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Ono, Naoki Nakagawa, Yusuke Yamagata, Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Toru Takeguchi
  • Patent number: 8508682
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: August 13, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 8445912
    Abstract: A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: May 21, 2013
    Assignee: Sony Corporation
    Inventors: Iwao Yagi, Hideki Ono, Mari Sasaki
  • Patent number: 8373811
    Abstract: A liquid crystal display (LCD) device essentially includes a plurality of data lines, a plurality of gate lines and a plurality of pixel units. Each pixel unit includes a first liquid-crystal capacitor, a second liquid-crystal capacitor, a first switch and a second switch. The first liquid-crystal capacitor of a pixel unit is charged via the first switch of the same pixel unit. The second liquid-crystal capacitor of a pixel unit is charged via the second switch of the same pixel unit and the first switch of a different pixel unit. The sub-pixel voltages corresponding to the first and second liquid-crystal capacitors of the same pixel unit have the same polarity. Furthermore, disclosed is a liquid-crystal display driving method for writing two data signals having same polarity respectively into the first and second liquid-crystal capacitors of a pixel unit via the same date line during two intervals partly overlapped.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: February 12, 2013
    Assignee: AU Optronics Corp.
    Inventors: Chih-Yuan Chien, Pei-Yi Chen
  • Patent number: 8253874
    Abstract: A liquid crystal display including a pixel electrode having first and second sub-pixel electrodes separated from each other; a gate line electrically connected to the first and second sub-pixel electrodes through thin film transistors, a data line electrically connected to the first and second sub-pixel electrodes through the thin film transistors, a first storage electrode line having a first storage electrode overlapped with the first sub-pixel electrode, wherein a first storage voltage is applied to the first storage electrode line as a cyclic signal; and a second storage electrode line having a second storage electrode overlapped with the second sub-pixel electrode, wherein a second storage electrode voltage opposite in phase to the first storage electrode voltage is applied to the second storage electrode line as a cyclic signal, and wherein the first and second sub-pixel electrodes are electrically connected to the same gate line and to the same data line through the thin film transistors, and the pixel
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyu Kim, Hye-Seok Na
  • Patent number: 8228454
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 8059222
    Abstract: An active matrix substrate in which variations in output characteristics of photodiodes are reduced, and a display device using this active matrix substrate, are provided. An active matrix substrate (1) having an n-TFT (20), a p-TFT (30), and a photodiode (10) is used. The photodiode (10) includes a p-layer (7), an i-layer (8), and an n-layer (9). The i-layer (8) includes a p-type semiconductor region (8a) at a position adjacent to the player (7), said p-type semiconductor region (8a) having a diffusion concentration of p-type impurities that is set at the same level as that of a diffusion concentration of p-type impurities in the channel region (23) of the n-TFT (20); and an n-type semiconductor region (8b) at a position adjacent to the n-layer (9), said n-type semiconductor region (8b) having a diffusion concentration of n-type impurities that is set at the same level as that of a diffusion concentration of n-type impurities in the channel region (33) of the p-TFT (30).
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: November 15, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiromi Katoh, Benjamin James Hadwen
  • Patent number: 8054397
    Abstract: It is an object of the present invention to provide a display device that has a structure of an electrode where a residue of a transparent conductive film is not generated when a weak acid solution is used in etching, which is particularly appropriate for an electrode of a light-emitting element. A display device according to the present invention has an electrode that has a laminated structure of laminated transparent conductive films, and the electrode has a first transparent conductive film as the bottom layer, where no residue is generated when a weak acid solution is used in etching, and a second transparent conductive film as the top layer, which has a work function of 5.0 eV or more.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Noriko Miyagi, Shingo Eguchi
  • Patent number: 8004625
    Abstract: An active matrix substrate is provided, which includes a substrate, a plurality of scan lines, data lines, pixel unites, and pre-charge components. The scan lines, data lines and pixel units are all disposed on the substrate. The pixel units are electrically connected with the corresponding scan lines and data lines. Each pixel unit includes an active device and a pixel electrode. The active devices are electrically connected with the scan lines, the data lines and the pixel electrodes. Each pre-charge component is electrically connected with one of the scan lines and two adjacent pixel electrodes controlled by the next scan line. When the pre-charge component is turned on via the scan line electrically connected therewith, the two adjacent pixel electrodes electrically connected with each pre-charge component have the same voltage level so that the two adjacent pixel units are pre-charged.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: August 23, 2011
    Assignee: Wintek Corporation
    Inventor: I-Fang Wang
  • Patent number: 7916130
    Abstract: An electronic device, such as personal computer, incorporating a liquid crystal panel which uses LEDs as an illuminating light source for a liquid crystal panel to reduce power consumption and size of the electronic device. When 3-color LED lamps 13R, 13G, 13B of the LED light source 12 are lit, red, green and blue rays emitted from respective LED lamps enter the scatterplate 11 where they are scattered and mixed to produce white light LW which goes out from the entire surface of the scatterplate 11 to illuminate the entire rear surface of the transmission type liquid crystal panel 10. The white light LW that has entered the liquid crystal panel 10 is modulated according to the alignment of the liquid crystal material and passes through the color filters of the counter substrate. The user can view the transmitted light LT from the liquid crystal panel 10 as a color image.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: March 29, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 7782412
    Abstract: Disclosed is a method of fabricating a liquid crystal display device enabling to form a uniform gate insulating layer in thickness. The present includes the steps of forming a gate line, a gate electrode, and a storage line on a substrate and forming a gate insulating layer on the substrate including the gate line and the gate electrode using first and second gases having a gas mixture ratio of 0.3˜0.5:1. And, the first and second gases are mono-silane (SiH4) and ammonia (NH3), respectively. Accordingly, the present invention enables a uniformly thick gate insulating layer, thereby to improving the discharging time as well as reducing flicker on the screen.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: August 24, 2010
    Assignee: LG. Display Co., Ltd.
    Inventor: Min Gu Cho
  • Patent number: 7718452
    Abstract: Disclosed is a display apparatus, and method of making same, including a plurality of lower electrodes patterned on a substrate on the basis of each pixel, an auxiliary wiring composed of the same layer as the lower electrodes and arranged in the state of being insulated from the lower electrodes, an insulating film formed on the substrate and provided with pixel openings for exposing central portions of the lower electrodes and connection holes reaching the auxiliary wiring, organic layers so patterned as to cover bottom portions of the pixel openings and to have end portions partly overlapping on each other between the adjacent pixels, and an upper electrode so formed as to cover the organic layers and to be connected to the auxiliary wiring through the connection holes between the organic layers.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: May 18, 2010
    Assignee: Sony Corporation
    Inventors: Chiyoko Sato, Jiro Yamada, Takashi Hirano, Seiichi Yokoyama
  • Patent number: 7714950
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: May 11, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 7633575
    Abstract: An exemplary liquid crystal display (100) includes gate lines (122), and data lines (123) cooperatively defining pixel units. Each pixel unit includes a first thin film transistor (TFT) (125), a second TFT (126), a first pixel electrode (127), and a second pixel electrode (128). Gate electrodes of the two TFTs are connected to one of the gate lines. A source electrode of the first TFT is connected to one of the data lines. A drain electrode of the first TFT is connected to the first pixel electrode. A source electrode of the second TFT is connected to the first pixel electrode. A drain electrode of the second TFT is connected to the second pixel electrode. A channel width/length ratio of the second TFT is such that a voltage of the drain electrode thereof is less than a voltage of the source electrode thereof when the second TFT is switched on.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: December 15, 2009
    Assignee: Innolux Display Corp.
    Inventors: Chien-Cheng Chen, Yu-Cheng Lin, Hung-Yu Chen
  • Patent number: 7608490
    Abstract: To provide a semiconductor device having a circuit with high operating performance and high reliability, and improve the reliability of the semiconductor device, thereby improving the reliability of an electronic device having the same. The aforementioned object is achieved by combining a step of crystallizing a semiconductor layer by irradiation with continuous wave laser beams or pulsed laser beams with a repetition rate of 10 MHz or more, while scanning in one direction; a step of photolithography with the use of a photomask or a leticle including an auxiliary pattern which is formed of a diffraction grating pattern or a semi-transmissive film having a function of reducing the light intensity; and a step of performing oxidation, nitridation, or surface-modification to the surface of the semiconductor film, an insulating film, or a conductive film, with high-density plasma with a low electron temperature.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: October 27, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuya Kakehata, Hideto Ohnuma, Masaharu Nagai, Mitsuaki Osame, Masayuki Sakakura, Shigeki Komori
  • Patent number: 7576359
    Abstract: To provide a liquid crystal display device with high visibility by forming a light shielding film without requiring additional steps. The liquid crystal display device of the invention has a structure in which liquid crystal is injected and sealed between an active matrix substrate over which a pixel portion including a plurality of TFTs, wires, first electrodes (pixel electrodes) and the like are formed and a counter substrate over which a second electrode (counter electrode), a colored film and the like are formed. A part of a conductive film forming electrodes of the TFTs, the wires and the like formed over the active matrix substrate functions as a light shielding film in the pixel portion.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: August 18, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kunio Hosoya
  • Patent number: 7561221
    Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention relates to forming a flexible active matrix display along a length of flexible substrate. Another embodiment of the invention relates to forming multiple flexible displays along a continuous flexible substrate. Another embodiment of the invention relates to forming a flexible display along a flexible reflective substrate. Another embodiment of the invention relates to using FSA generally with a flexible web process material. Another embodiment of the invention relates to using FSA and a deterministic method such as “pick and place” to place objects onto a rigid substrate or onto a web process material. Another embodiment of the invention relates to using web processing to deposit and/or pattern display material through an in-line process.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: July 14, 2009
    Assignee: Alien Technology Corporation
    Inventors: Jeffrey Jay Jacobsen, John Stephen Smith, Mark A. Hadley
  • Patent number: 7542102
    Abstract: Pixel structures of a color filter substrate, an active device array substrate and a liquid crystal display panel are provided. The pixel structure of the color filter substrate includes a first and second electrode patterns electrically connected to different voltage input terminals. The pixel structure of the active device array substrate includes a first and second pixel electrodes, a first and second gate-drain capacitances and a first and second storage capacitances. The areas of the first and the second pixel electrodes are different, the first and the second gate-drain capacitances are different, and the first and the second storage capacitances are different. In addition, the pixel structure of the liquid crystal display panel includes the pixel structure of the color filter substrate the pixel structure, the active device array substrate and a liquid crystal layer therebetween.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: June 2, 2009
    Assignee: Au Optronics Corporation
    Inventor: An-Hsu Lu
  • Patent number: 7518666
    Abstract: A TFT substrate having a storage capacitor with an increased capacitance and aperture ratio, and a simplified method of fabricating the same, includes gate and data lines crossing each other to define pixel areas; a gate insulating film between the gate and data lines; TFTs connected to the gate and data lines; a semiconductor pattern defining a channel of the TFTs and overlapped by the data lines; a passivation film covering the data lines and the TFTs; and at least one pixel electrode connected to a TFT and provided within a pixel hole that is arranged within a pixel area. The pixel hole is formed through the passivation film and partially through the gate insulating film. Further, a storage capacitor includes a portion of the pixel electrode that overlaps with an underlying gate line with a portion of the gate insulating film that defines the pixel hole.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: April 14, 2009
    Assignee: LG Display Co., Ltd.
    Inventors: Tae Yong Jung, Ji No Lee, Hee Young Kwack
  • Patent number: 7483091
    Abstract: In a liquid crystal display device, a first substrate includes electrical wirings and a semiconductor integrated circuit which has TFTs and is connected electrically to the electrical wirings, and a second substrate includes a transparent conductive film on a surface thereof. A surface of the first substrate that the electrical wirings are formed is opposite to the transparent conductive film on the second substrate. the semiconductor integrated circuit has substantially the same length as one side of a display screen (i.e., a matrix circuit) of the display device and is obtained by peeling it from another substrate and then forming it on the first substrate. Also, in a liquid crystal display device, a first substrate includes a matrix circuit and a peripheral driver circuit, and a second substrate is opposite to the first substrate, includes a matrix circuit and a peripheral driver circuit and has at least a size corresponding to the matrix circuit and the peripheral driver circuit.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: January 27, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Setsuo Nakajima, Yasuyuki Arai
  • Patent number: 7470604
    Abstract: The present invention, the quality of the surface of a substrate is improved and the wettability thereof is controlled by light irradiation from the reverse side with respect to the substrate having the conductive layer. A conductive material or an insulating material is adhered on the modified surface by discharging it (including jetting, etc.), or the like to form a conductive layer and an insulating layer. The processing efficiency by the light can be enhanced by function of the light absorption and energy radiation of the photocatalytic substance. Furthermore, the mask layer is formed selectively on the conductive layer and the wettability of the region on the conductive layer that is a non-irradiation region is also controlled.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: December 30, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Gen Fujii
  • Patent number: 7411639
    Abstract: Provided is a method for fabricating a liquid crystal panel, comprising: coating a thermal sensitive adhesive on an outer surface of a plastic substrate; attaching a glass substrate on the thermal sensitive adhesive; performing a liquid crystal cell process on an inner surface of the plastic substrate; and separating the glass substrate from the plastic substrate.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: August 12, 2008
    Assignee: LG Display Co., Ltd.
    Inventor: Teak Sung Kim
  • Patent number: 7271858
    Abstract: In a liquid crystal display device, a first substrate includes electrical wirings and a semiconductor integrated circuit which has TFTs and is connected electrically to the electrical wirings, and a second substrate includes a transparent conductive film on a surface thereof. A surface of the first substrate on which the electrical wirings are formed is opposite to the transparent conductive film on the second substrate. The semiconductor integrated circuit has substantially the same length as one side of a display screen (i.e., a matrix circuit) of the display device and is obtained by peeling it from another substrate and then forming it on the first substrate. Also, in a liquid crystal display device, a first substrate includes a matrix circuit and a peripheral driver circuit, and a second substrate is opposite to the first substrate, includes a matrix circuit and a peripheral driver circuit and has at least a size corresponding to the matrix circuit and the peripheral driver circuit.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: September 18, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Setsuo Nakajima, Yasuyuki Arai
  • Patent number: 7245331
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: July 17, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 7242441
    Abstract: To lower the cost of manufacturing a display device, the present invention comprises a step of forming on a first substrate a release layer that releases when subjected to a specific energy, a step of forming on the release layer a plurality of pixel circuits for driving the pixels of the electro-optical device, a step of causing at least one of the pixel circuits formed on the first substrate to face the position on a second circuit, used for disposing the pixel circuits, where the pixel circuits are to be disposed, and electrically connecting that pixel circuit to the second substrate, and a step of imparting energy to a part of the release layer where the pixel circuits to be released are provided, and releasing the one pixel circuit from the first substrate along with the second substrate.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: July 10, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Mutsumi Kimura, Hiroyuki Hara
  • Patent number: 7151578
    Abstract: A wiring structure includes: a plurality of linear conductors extending generally parallel to one another; a first input terminal for inputting an electrical signal to a first group of linear conductors selected from among the plurality of linear conductors; and a second input terminal for inputting an electrical signal to a second group of linear conductors, different conductors, selected from among the plurality of linear conductors, the second input terminal being adjacent to the first input terminal. A plurality of the linear conductors are present between the first group of linear conductors and the second group of linear conductors.
    Type: Grant
    Filed: July 4, 2003
    Date of Patent: December 19, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hideki Uchida
  • Patent number: 7113250
    Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention relates to forming a flexible active matrix display along a length of flexible substrate. Another embodiment of the invention relates to forming multiple flexible displays along a continuous flexible substrate. Another embodiment of the invention relates to forming a flexible display along a flexible reflective substrate. Another embodiment of the invention relates to using FSA generally with a flexible web process material. Another embodiment of the invention relates to using FSA and a deterministic method such as “pick and place” to place objects onto a rigid substrate or onto a web process material. Another embodiment of the invention relates to using web processing to deposit and/or pattern display material through an in-line process.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: September 26, 2006
    Assignee: Alien Technology Corporation
    Inventors: Jeffrey Jay Jacobsen, John Stephen Smith, Mark A. Hadley
  • Patent number: 7050138
    Abstract: A method of fabricating a driver circuit for use with a passive matrix or active matrix electrooptical display device such as a liquid crystal display. The driver circuit occupies less space than heretofore. A circuit (stick crystal) having a length substantially equal to the length of one side of the matrix of the display device is used as the driver circuit. The circuit is bonded to one substrate of the display device, and then the terminals of the circuit are connected with the terminals of the display device. Subsequently, the substrate of the driver circuit is removed. This makes the configuration of the circuit much simpler than the configuration of the circuit heretofore required by the TAB method or COG method, because conducting lines are not laid in a complex manner. The driver circuit can be formed on a large-area substrate such as a glass substrate. The display device can be formed on a lightweight material having a high shock resistance such as a plastic substrate.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: May 23, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Setsuo Nakajima, Yasuyuki Arai
  • Patent number: 7050125
    Abstract: A method of manufacturing an active matrix substrate comprises forming a plurality of elements on an element formation substrate, forming wirings on a final substrate, transferring some elements selected from the elements, and selectively connecting some elements to the wirings on the final substrate. According to this method, it is possible to manufacture an active matrix substrate providing a high definition image on a large substrate or a non-glass substrate, at a low cost.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: May 23, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiko Akiyama
  • Patent number: 7045816
    Abstract: The present invention provides a thin film transistor, wherein the semiconductor channel region is patterned. Gate electrodes 102, gate insulating film 103, source electrodes 104, and drain electrodes 105 are formed on a glass substrate 101. A patterned insulating film is formed thereon, and a part of the film in the region 110 on the gate electrode is removed. An organic semiconductor film is formed thereon by vapor deposition. The organic semiconductor film 107 in the region 110, where the patterned insulating film is removed, becomes a channel region, and is separated from the organic semiconductor film 108 on the patterned insulating film 106. Therefore, the organic semiconductor channel region is patterned to have the same size as the gate electrode. In accordance with the present invention, a thin film transistor, wherein the semiconductor region is patterned precisely, becomes available.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Shingo Ishihara, Masatoshi Wakagi, Masahiko Ando