Abstract: A display panel and a liquid crystal display device are disclosed. The display panel includes a first substrate and a second substrate disposed opposite to each other, a display layer, and a sealant coating area defined in the display panel. Part of the display panel corresponding to the sealant coating area of a first side portion, a second side portion, and a third side portion includes a circuit unit, a first via hole and a second via hole defined on the circuit unit, a first insulating layer disposed in the first via hole, a second insulating layer disposed in the second via hole, a conductive electrode disposed in the first via hole and contacting the circuit unit, and spacers disposed on the first insulating layer and the second insulating layer.

Abstract: According to one embodiment, a display device includes a first substrate, a second substrate opposed to the first substrate, a sealing member bonding the first substrate with the second substrate, and a liquid crystal layer between the first substrate and the second substrate. From an aspect, the sealing member includes a first sealing member surrounding a display area including a plurality of pixels, and a second sealing member formed of a same material as the first sealing member and arranged in the display area.

Abstract: A display device includes an array substrate including a display region arranged with pixels and a peripheral region outside the display region, a counter substrate facing the array substrate, and a liquid crystal layer between the array substrate and the counter substrate. The display region includes a plurality of scanning signal lines extending in a first direction and arranged in a second direction intersecting the first direction, and a plurality of data signal lines extending in the second direction and arranged in the first direction. The peripheral region includes a first wiring pattern arranged with a plurality of first wirings connecting a scanning signal line driver circuit and the plurality of scanning signal lines, and a second wiring pattern arranged with a plurality of second wirings being supplied with a certain electric potential.

Abstract: A display device includes: a substrate temperature obtainer that obtains a substrate temperature of a substrate of a display panel; a power obtainer that obtains an amount of power used by a plurality of segmented regions of the display panel, based on image data displayed on the display panel; a first increased temperature deriver that derives an increased temperature of a panel surface of the display panel based on the amount of power used by the plurality of segmented regions; and a surface temperature estimator that estimates a temperature of the panel surface based on the substrate temperature and the increased temperature.

Abstract: A display panel and a display terminal are provided. The display panel includes a first base plate, a second base plate, and a frame sealing adhesive layer. An electrical connection component is disposed in the frame sealing adhesive layer. The first base plate includes a first type of signal line at least partially disposed in a non-display region and an elevated conductive part. The elevated conductive part is electrically connected to the first type of signal line. A first end of the electrical connection component is connected to the elevated conductive part, and a second end of the electrical connection component is connected to a common electrode layer of the second base plate.

Abstract: A display device according to an aspect of the disclosure includes a first metal protrusion being in contact with a first power-source trunk wire, and a second metal protrusion being in contact with a second power-source trunk wire. A first bank defining the end of an organic sealing film includes the first metal protrusion, the second metal protrusion, and a first resin protrusion. The first resin protrusion overlaps the first and second metal protrusions. The first resin protrusion has a frame shape.

Abstract: An LCoS display pixel structure is disclosed. According to at least one embodiment, the present disclosure provides an LCoS display pixel structure which implements a pattern or geometry having an analog pixel structure in a display having micro-display LCoS structures.

Abstract: An electronic panel includes a first substrate; a conductive line disposed on the first substrate and extending along a first direction; a conductive element extending along a second direction perpendicular to the first direction; and an active layer disposed between the conductive element and the first substrate. In a top view, the active layer includes a first overlapping region overlapping a portion of the conductive line; a first contact region electrically connected to a connecting portion of the conductive element through a first via hole; and a turning region between the first overlapping region and the first contact region. The turning region doesn't extend along the first direction and the second direction.

Abstract: A display device includes a display module including a first non-folding area, a second non-folding area, and a folding area disposed between the first non-folding area and the second non-folding area and a support layer disposed under the display module. The support layer includes a first support plate, a second support plate disposed under the first support plate, and a spacer disposed between the first support plate and the second support plate. The spacer includes a main spacer and a sub-spacer alternately arranged with the main spacer in a first direction, the main spacer has a thickness greater than a thickness of the sub-spacer, and a length of the spacer in a second direction crossing the first direction is greater than a length of the first support plate in the second direction.

Abstract: An array substrate and a liquid crystal display panel are disclosed. In the array substrate, a shared common electrode and a gate scanning line are disposed on a same layer, and a drain electrode of a third thin film transistor is electrically connected to the shared common electrode by a conductive film layer. Therefore, the shared common electrode only exists in a non-display area between a primary pixel electrode and a sub pixel electrode and does not need to pass the primary pixel electrode and the sub pixel electrode, thereby improving an aperture ratio of pixel electrodes and transmittances.

Abstract: Disclosed herein is an organic light emitting diode display, including a substrate, a first thin film transistor including a first active pattern on the substrate and a first gate electrode on the first active pattern, a data wire on the first gate electrode, a first interlayer insulating layer between the first gate electrode and the data wire, a second interlayer insulating layer positioned the first interlayer insulating layer and the data wire, and an organic light emitting diode positioned on the data wire and connected to the first active pattern.

Abstract: A display device is provided and includes a plurality of drive electrodes; a mesh-patterned first shield electrode comprising a plurality of first openings and a first electrode portion located between the first openings adjacent to each other, an area of the first electrode portion being greater than an area of the first openings; and a first power line provided with a predetermined voltage, wherein the first openings and the first electrode portion overlap the first power line.

Abstract: The present invention provides a liquid crystal display panel and a display device. The liquid crystal display panel includes an array substrate, a counter substrate, and a liquid crystal layer. The array substrate includes a first alignment layer and a second alignment layer. The second alignment layer is arranged on one side of the first alignment layer away from the liquid crystal layer. A dielectric constant of the first alignment layer is less than a dielectric constant of liquid crystal molecules, and a dielectric constant of the second alignment layer is greater than the dielectric constant of the liquid crystal molecules. Accordingly, the present invention not only ensures high light transmittance, but also prevents residual images.

Abstract: A thin film transistor substrate includes a substrate, a first conductive element and a semiconductor. The first conductive element is disposed on the substrate and includes a trace portion extending along a first direction and a protrusive portion extending from the trace portion. The semiconductor is disposed on the substrate. The trace portion has a first edge and a second edge opposite to the first edge, and the protrusive portion has at least one curved edge connecting with the second edge. In a top view, a virtual extending line disposes between the trace portion and the protrusive portion, the virtual extending line overlaps the second edge. At least a part of the semiconductor extends beyond the virtual extending line along a second direction vertical to the first direction.

Abstract: A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.

Abstract: A pixel arrangement structure and a display panel are provided by the present disclosure. The pixel arrangement structure includes at least one pixel group, and the pixel group includes a plurality of sub-pixels arranged in an array. In the pixel group, a ratio of a number of high-grayscale subpixels to a number of low-grayscale subpixels is 1:2 or 1:3. The low-grayscale subpixels include a plurality of first low-grayscale subpixels, and among adjacent N rows of the subpixels, the number of the high-grayscale subpixels equals to a number of the first low-grayscale subpixels, and N is an integral multiple of 2, an integral multiple of 3, or 1.

Abstract: An array substrate and a liquid crystal display panel are provided. By arranging scan lines on a second metal layer in the array substrate, a width of a channel of a thin-film transistor is not related to a width of a scan line, so that the width of the scan line can be increased to reduce resistance of the scan line. In addition, the impedance of the second metal layer is relatively small, so that the impedance of the scan line can be reduced. Furthermore, a channel width of the thin-film transistor is relatively small, which improves charging efficiency of the array substrate and reduces the distortion difference of scan signals.

Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a flexible display device, and belongs to the technical field of display. Among them, the display substrate includes: a base substrate; a metal pattern located on the base substrate, and an anti-reflection pattern located on a surface of the metal pattern proximate to the base substrate; in which a material of the anti-reflection pattern includes molybdenum oxide doped with a refractory metal, and a melting point of the refractory metal is greater than a temperature threshold. The technical solution of the present disclosure is capable of reducing the reflection of ambient light by the display substrate.

Abstract: According to one embodiment, a display device includes a gate line extending in a first direction, first and second source lines crossing the gate line and arranged in the first direction, a first light-shielding layer having first and second openings, and an oxide semiconductor layer crossing the gate line, and in the display device, the first opening and the second opening are arranged in a second direction crossing the first direction between the first source line and the second source line, the gate line is located between the first opening and the second opening, and the oxide semiconductor layer has a first overlapping portion overlapping the first opening.

Abstract: A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.

Abstract: Disclosed are an array substrate, a display panel and a display apparatus. The array substrate includes: gate lines, data lines, and pixel units. The gate lines and the data lines are arranged between at least part of the adjacent pixel units. The array substrate further includes: common electrode lead wires and common electrode layers. The common electrode lead wires are arranged on a same layer as the data lines, extend in a same direction as the data lines, and are located between at least part of the adjacent pixel units. The common electrode layers are insulated from the common electrode lead wires through insulating layers and are connected with the common electrode lead wires through via holes in the insulating layers. The via holes are located in a region where the gate lines and the common electrode lead wires intersect.

Abstract: An array substrate of a display device includes a pixel electrode layer on a substrate, which includes active pixel electrodes in an active display region; outermost active pixel electrodes include a first active pixel electrode including a first pixel electrode edge and a second pixel electrode edge; in a first direction, the first pixel electrode edge is between the second pixel electrode edge and a frame region. One of the array substrate and an opposite substrate of the display device includes a common electrode layer including a first extended common electrode which includes a first extended portion extending beyond the first active pixel electrode; a first extended portion edge of the first extended portion and a first substrate edge of the substrate respectively extend in a second direction; in the first direction, the first extended portion edge is located between the first substrate edge and the first pixel electrode edge.

Abstract: A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.

Abstract: The present disclosure provides a mask plate, a display panel and a display device. The mask plate comprises: a transparent substrate; an opaque film layer, the opaque film layer being disposed on the transparent substrate. The opaque film layer includes a plurality of first regions and a plurality of second regions, a first sub-region in the first region and the second region are transmissive, and the remaining portion in the first region is semi-transmissive. The mask plate is used to form via holes in the planarization layer of the display panel by exposure, so that the angles between the metal electrode layers disposed in the via holes and the source/drain layers of the display panel are small and diversified, decreasing the visibility of the metal electrode layers.

Abstract: A display device includes: a substrate; a first scan line arranged along a first direction on the substrate; a shield electrode overlapping a part of the first scan line in a direction that is perpendicular to a plane of the substrate; a second connection electrode on the shield electrode; and a data line arranged along a second direction on the second connection electrode, and connected with the second connection electrode, wherein the shield electrode overlapping the first scan line and the second connection electrode in a direction that is perpendicular to a plane of the substrate.

Abstract: A liquid crystal display device includes a liquid crystal layer provided between a first substrate and a second substrate, a detection electrode configured to detect an external proximity object, a plurality of pixels overlapping the detection electrode in plan view, and a detection circuit configured to detect a detected capacitance value generated in the detection electrode. A liquid crystal capacitance value generated between each of the pixels and the detection electrode includes a first capacitance value at a first gradation and a second capacitance value at a second gradation smaller than the first gradation, and the detection circuit corrects the detected capacitance value based on a ratio between number of pixels with the first gradation and number of pixels with the second gradation out of the pixels.

Abstract: A display device may include: a substrate including a display area and a non-display area; pixels in the display area, each of the pixels including first to fourth electrodes, and light emitting elements connected with the first to fourth electrodes; first pads in a pad area of the non-display area; first to third lines provided in the non-display area; and a circuit board overlapping with the pad area of the substrate and including second pads electrically connected with the first pads. The first pads may include a 1-1th pad connected to the first line, a 1-2th pad connected to the second line, and a 1-3th pad connected to the third line. An identical driving voltage may be applied to at least two lines of the first to third lines. The first to third lines may apply alignment signals to the first to fourth electrodes.

Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

Abstract: A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.

Abstract: A display device includes a substrate, a semiconductor layer disposed on the substrate, and including a first channel portion, a second channel portion, a connecting portion disposed between the first channel portion and the second channel portion, and electrode regions, a first insulating layer disposed on the semiconductor layer, a gate conductor disposed on the first insulating layer and including a first gate electrode overlapping the first channel portion and a second gate electrode overlapping the second channel portion, signal lines disposed on the substrate, a first electrode electrically connected to at least one of electrode regions of the semiconductor layer, an emission layer disposed on the first electrode, and a second electrode disposed on the emission layer, and the first channel portion and the second channel portion of the semiconductor layer each have a first width greater than a second width of the connecting portion.

Abstract: The present application provides a pixel driving circuit and a liquid crystal display panel. The pixel driving circuit comprises a main pixel electrode driving module, a sub-pixel electrode driving module, a first potential regulation module, and a second potential regulation module.

Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that avow improved reliability under high current operation.

Abstract: An electronic device includes a first substrate, a drain, an organic layer, a pixel electrode, a second substrate, a common electrode layer and a spacer. The drain is disposed on the first substrate. The organic layer is disposed on the drain and has a contact hole. The pixel electrode is disposed on the organic layer and electrically connected to the drain via the contact hole. The second substrate is disposed opposite to the first substrate. The common electrode layer is disposed on the organic layer. The spacer is disposed between the organic layer and the second substrate, wherein the spacer is directly in contact with the common electrode layer and overlaps with the contact hole.

Abstract: A display device may include a source electrode disposed on a substrate; a drain electrode disposed on the substrate; an insulating layer disposed on the source electrode and the drain electrode, the insulating layer including an opening overlapping the drain electrode; and a first electrode disposed on the insulating layer and electrically contacting the drain electrode in the opening of the insulating layer, wherein an angle between a side surface of the opening of the insulating layer and a plane parallel to the substrate is in a range of about 70 degrees to about 85 degrees.

Abstract: According to one embodiment, a display device includes a display area, a peripheral area, a pixel electrode disposed, a switching element, a scanning line, a signal line, a metal layer which overlaps at least one of the signal line and the scanning line, an antireflection layer which covers the metal layer, a common electrode which covers the antireflection layer and a power supply line disposed in the peripheral area, to which a common voltage is supplied. The common electrode and the metal layer are connected to the power supply line in the peripheral area.

Abstract: A liquid crystal display apparatus switches modes from a normal display mode to a stop preparation mode when a main power source voltage drops. In the display mode, a gate drive circuit sequentially applies a first gate-on pulse to gate bus lines so as to select pixel rows sequentially, and applies a second gate-on pulse to buffer capacitor scanning lines, each of which is associated with a pixel row selected by the first gate-on pulse, during a period that does not overlap a period during which the first gate-on pulse is applied, and a source drive circuit applies a display signal voltage to source bus lines.

Abstract: Provided is a display device including a display module including a curvature area configured to be folded about an axis substantially parallel to a first direction, a first flat area, and a second flat area spaced from the first flat area in a second direction crossing the first direction with the curvature area therebetween, and a support member below the display module, and including a first plate, a second plate below the first plate, and a first spacer pattern between the first plate and the second plate, and including main spacers and sub spacers, the main spacers being longer than the sub spacers.

Abstract: A display apparatus includes a substrate, a first thin-film transistor including a first semiconductor layer on the substrate, and a first gate electrode on the first semiconductor layer, the first gate electrode being insulated from the first semiconductor layer by a first gate insulating layer, an organic interlayer insulating layer covering the first gate electrode, a first conductive layer on the organic interlayer insulating layer, a first contact hole exposing a top portion of the first semiconductor layer by penetrating through the organic interlayer insulating layer and the first gate insulating layer, and a first protruding portion protruding from a top surface of the substrate between the substrate and the first semiconductor layer, the first protruding portion corresponding to the first contact hole, wherein the first conductive layer contacts the first semiconductor layer through the first contact hole.

Abstract: The purpose of the present invention is to prevent an overhang in a through hole in the display area when through holes in the organic passivation film in the display area and in the terminal area are simultaneously formed. The structure to realize this purpose is as follows: the terminal area having a lead wire, formed from a first metal, and extending to the display area, a first insulating film covering the lead wire, a second metal formed on the first insulating film, and a third metal formed on the surface of the second metal, wherein the first insulating film has a first through hole and a second through hole, the second metal has a first portion that connects with the lead wire via the first through hole, the second metal has a second portion that overlaps the second through hole, the second portion is separated from the first portion.

Abstract: A display device includes a gate driving circuit and a driving circuit. The gate driving circuit outputs a clock signal. The driving circuit receives the clock signal for driving a display unit and comprises two transistors. Wherein one of the two transistors is an oxide transistor and the other one of the two transistors is a silicon transistor.

Abstract: A display device according to an embodiment of the present inventive concept includes: a substrate including a first region and a second region; and a plurality of pixels disposed on the substrate, wherein the plurality of pixels each include a first data line and a second data line overlapping a pixel electrode, a first capacitance between the first data line and the pixel electrode is smaller than a second capacitance between the second data line and the pixel electrode in a pixel disposed in the first region, and the first capacitance between the first data line and the pixel electrode is larger than the second capacitance between the second data line and a pixel electrode in the pixel disposed in the second region.

Abstract: An array substrate, a method for fabricating the same, and a display panel are provided. The array substrate includes a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer. The first metal layer includes a first data line and a first vertical scan line. The second metal layer includes a horizontal scan line. The third metal layer includes a second data line and a second vertical scan line. The second data line is connected to the first data line through a first via hole. The second vertical scan line is connected to the first vertical scan line through a second via hole. The second vertical scan line is connected to the horizontal scan line through a third via hole. The first via hole, the second via hole, and the third via hole are formed by a same manufacturing process.

Abstract: A crack detection chip includes a chip which includes an internal region and an external region surrounding the internal region, a guard ring formed inside the chip along an edge of the chip to define the internal region and the external region, an edge wiring disposed along an edge of the internal region in the form of a closed curve and a pad which is exposed on a surface of the chip and is connected to the edge wiring. The edge wiring is connected to a Time Domain Reflectometry (TDR) module which applies an incident wave to the edge wiring through the pad, and detects a reflected wave formed in the edge wiring to detect a position of a crack.

Abstract: Techniques are disclosed for forming thin-film transistors (TFTs) with low contact resistance. As disclosed in the present application, the low contact resistance can be achieved by intentionally thinning one or both of the source/drain (S/D) regions of the thin-film layer of the TFT device. As the TFT layer may have an initial thickness in the range of 20-65 nm, the techniques for thinning the S/D regions of the TFT layer described herein may reduce the thickness in one or both of those S/D regions to a resulting thickness of 3-10 nm, for example. Intentionally thinning one or both of the S/D regions of the TFT layer induces more electrostatic charges inside the thinned S/D region, thereby increasing the effective dopant in that S/D region. The increase in effective dopant in the thinned S/D region helps lower the related contact resistance, thereby leading to enhanced overall device performance.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate and a second substrate arranged oppositely. The first substrate includes a spacer. The second substrate includes: a second base substrate; a data line including, a body portion and a bending portion; and a sub-pixel including a light transmission region. An orthographic projection of the spacer on the second base substrate is adjacent to that of the light transmission region on the second base substrate, the orthographic projection of the spacer on the second base substrate is spaced apart from that of the data line on the second base substrate; an orthographic projection of the bending portion on the second base substrate is bent toward a direction away from the orthographic projection of the spacer on the second base substrate with respect to an orthographic projection of the body portion on the second base substrate.

Abstract: A display panel, a display module, and a display device are provided. The display panel includes a base substrate, a plurality of pixel units, and a liquid crystal layer. A pixel electrode of each pixel unit includes a trunk electrode, and first branch electrodes and second branch electrodes disposed on both sides of the trunk electrode, respectively. Each pixel unit is divided into a first sub-region and a second sub-region by the trunk electrode. The liquid crystal layer includes a first liquid crystal region and a second liquid crystal region corresponding to the first sub-region and the second sub-region.

Abstract: A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. The display device includes a display portion and a driver circuit portion. The display portion includes a liquid crystal element, a first transistor, a scan line, and a signal line. The driver circuit portion includes a second transistor. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. Each of the scan line and the signal line is electrically connected to the first transistor. The scan line and the signal line each include a metal layer. The structure of the first transistor is different from that of the second transistor. The first transistor is electrically connected to the pixel electrode. The first transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light.

Abstract: In an IPS-mode liquid crystal display device, the area of a terminal portion is decreased. A liquid crystal display device includes a TFT substrate and a counter substrate attached to the TFT substrate with a sealing material, and includes a display region and a terminal portion formed on the TFT substrate. A shielding transparent conductive film is formed on the outer side of the counter substrate. On the terminal portion, an earth pad formed with a transparent conductive film is formed on an organic passivation film. The shielding transparent conductive film is connected to the earth pad through a conductor. Below organic passivation film of the terminal portion, a wire is formed.

Abstract: A display device is provided. The display device includes a display panel and a visible angle adjustment panel. The visible angle adjustment panel has a liquid-crystal layer. The liquid-crystal layer has a plurality of cell gaps, wherein the thicknesses of the cell gaps are different from each other, and the thicknesses of the cell gaps gradually increase along a direction.

Abstract: The present disclosure provides an array substrate, a display panel, and a display device. The array substrate includes: a substrate; and a first conductive structure, an interlayer insulation layer, and a second conductive structure sequentially disposed on the substrate. The first conductive structure has a first connection portion, the second conductive structure has a second connection portion, and the first connection portion is electrically coupled to the second connection portion through a via penetrating through the interlayer insulation layer. At least one of the first connection portion and the second connection portion is provided with an opening, and an orthographic projection of the opening on the substrate does not overlap an orthographic projection of the via on the substrate.