Detail Of Free Layer Or Additional Film For Affecting Or Biasing The Free Layer Patents (Class 360/324.12)
  • Patent number: 10319398
    Abstract: A junction shield (JS) structure is disclosed for providing longitudinal bias to a free layer (FL) having a width (FLW) and magnetization in a cross-track direction between sidewalls in a sensor. The sensor is formed between bottom and top shields and has sidewalls extending from a front side at an air bearing surface (ABS) to a backside that is a stripe height (SH) from the ABS. The JS structure has a lower layer (JS1) with a magnetization parallel to that of the FL, and a tapered top surface such that JS1 has decreasing thickness with increasing height from the ABS. As aspect ratio or AR (SH/FLW) increases above 1, longitudinal bias increases proportionally to slow an increase in asymmetry as AR increases, and without introducing a loss in amplitude for a reader with low AR. The JS1 layer may be antiferromagnetically coupled to an upper JS layer for stabilization.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: June 11, 2019
    Assignee: Headway Technologies, Inc.
    Inventors: Urmimala Roy, Yan Wu
  • Patent number: 10312433
    Abstract: A ferromagnetic layer is capped with a metallic oxide (or nitride) layer that provides a perpendicular-to-plane magnetic anisotropy to the layer. The surface of the ferromagnetic layer is treated with a plasma to prevent diffusion of oxygen (or nitrogen) into the layer interior. An exemplary metallic oxide layer is formed as a layer of metallic Mg that is plasma treated to reduce its grain size and enhance the diffusivity of oxygen into its interior. Then the plasma treated Mg layer is naturally oxidized and, optionally, is again plasma treated to reduce its thickness and remove the oxygen rich upper surface.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: June 4, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Guenole Jan, Ru-Ying Tong
  • Patent number: 10199569
    Abstract: A magnetic element is provided. The magnetic element includes a free magnetization layer having a surface area that is approximately 1,600 nm2 or less, the free magnetization layer including a magnetization state that is configured to be changed; an insulation layer coupled to the free magnetization layer, the insulation layer including a non-magnetic material; and a magnetization fixing layer coupled to the insulation layer opposite the free magnetization layer, the magnetization fixing layer including a fixed magnetization so as to be capable of serving as a reference of the free magnetization layer.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: February 5, 2019
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Patent number: 10170689
    Abstract: The present invention provides a magnetoresistive effect element which performs writing by a novel method. In a state in which a current does not flow in a magnetization free layer MFR, the magnetization free layer MFR has a magnetic wall MW1 on the side of a magnetization fixed layer MFX1. A magnetic wall MW2 is moved to the magnetic wall MW1 side by causing current to flow from the formed side of the magnetic wall MW1. Thus, an electrical resistance RMTJ between a reference layer REF and the magnetization free layer MFR changes from a low state to a high state.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: January 1, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Hironobu Tanigawa, Tetsuhiro Suzuki, Katsumi Suemitsu, Takuya Kitamura, Eiji Kariyada
  • Patent number: 10147871
    Abstract: A magnetic memory device may include a magnetic tunnel junction pattern that comprises a tunnel barrier pattern, a first magnetic pattern and a second magnetic pattern, a tunnel barrier pattern between the first and second magnetic patterns, a non-magnetic pattern on the second magnetic pattern, and a magnetic material between at least a distal portion of the non-magnetic pattern and the second magnetic pattern. The magnetic material may include a set of fine magnetic patterns between the second magnetic pattern and the non-magnetic pattern, the set of fine magnetic patterns including a pattern of fine magnetic patterns spaced apart from each other in a direction parallel to an interface between the second magnetic pattern and the non-magnetic pattern. The magnetic material may include magnetic atoms, and the non-magnetic material may include a proximate portion that is proximate to the second magnetic pattern, the proximate portion doped with the magnetic atoms.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: December 4, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sungmin Ahn
  • Patent number: 10141501
    Abstract: A magnetoresistive element includes a channel layer, a first ferromagnetic layer, a second ferromagnetic layer, and a reference electrode. The first ferromagnetic layer, the second ferromagnetic layer, and the reference electrode are apart from each other and are electrically connected to each other through the channel layer. The effective cross-sectional area of a sixth region according to a plane perpendicularly intersecting a spin-polarized carrier transport path in the sixth region is smaller than the effective cross-sectional area of a seventh region according to a plane perpendicularly intersecting a voltage detection path in the seventh region.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 27, 2018
    Assignee: TDK CORPORATION
    Inventor: Hayato Koike
  • Patent number: 10134808
    Abstract: Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: November 20, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jimmy Jianan Kan, Chando Park, Matthias Georg Gottwald, Seung Hyuk Kang
  • Patent number: 10090459
    Abstract: A magnetoresistive element includes a storage layer as a ferromagnetic layer which has magnetic anisotropy perpendicular to film planes, and in which a magnetization direction is variable, a reference layer as a ferromagnetic layer which has magnetic anisotropy perpendicular to film planes, and in which a magnetization direction is invariable, a tunnel barrier layer as a nonmagnetic layer formed between the storage layer and the reference layer, and a first underlayer formed on a side of the storage layer, which is opposite to a side facing the tunnel barrier layer, and containing amorphous W.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: October 2, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke Watanabe, Youngmin Eeh, Kazuya Sawada, Koji Ueda, Toshihiko Nagase
  • Patent number: 10060941
    Abstract: The present invention discloses a magnetoresistive gear tooth sensor, which includes a magnetoresistive sensor chip and a permanent magnet. The magnetic sensor chip is comprised of at least one magnetoresistive sensor bridge, and each arm of the sensor bridge has at least one MTJ element group. The magnetoresistive gear tooth sensor has good temperature stability, high sensitivity, low power consumption, good linearity, wide linear range, and a simple structure. Additionally, the magnetoresistive gear tooth sensor has a concave soft ferromagnetic flux concentrator, which can be used to reduce the component of the magnetic field generated by the permanent magnet along the sensing direction of the MTJ sensor elements, enabling a wide linear range. Because it is arranged as a gradiometer, the magnetoresistive gear tooth sensor bridge is not affected by stray magnetic field; it is only affected by the gradient magnetic field generated by gear teeth in response to the permanent magnet bias.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: August 28, 2018
    Assignee: MultiDimension Technology Co., Ltd.
    Inventors: Jianmin Bai, James Geza Deak, Hua Iv, Weifeng Shen
  • Patent number: 9947865
    Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 17, 2018
    Assignee: Everspin Technologies, Inc.
    Inventors: Renu Whig, Jijun Sun, Nicholas Rizzo, Jon Slaughter, Dimitri Houssameddine, Frederick Mancoff
  • Patent number: 9941469
    Abstract: A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventor: Daniel C. Worledge
  • Patent number: 9940956
    Abstract: Aspects of the present disclosure provide a magnetic reader and methods for fabricating the same. The magnetic reader has a capping layer structure that can reduce or impede the corrosion and/or recession of a shield layer of the magnetic reader. In a particular embodiment, the capping layer structure includes a ruthenium (Ru) layer that is configured to impede oxygen interdiffusion between an IrMn antiferromagnetic layer and a Ta cap layer.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: April 10, 2018
    Assignee: Western Digital (Fremont), LLC
    Inventors: Rong R. Cao, Yung-Hung Wang, Lifan Chen, Haifeng Wang, Chih-Ching Hu
  • Patent number: 9922673
    Abstract: A magnetoresistance element has a pinning arrangement with two antiferromagnetic pinning layers, two pinned layers, and a free layer. A spacer layer between one of the two antiferromagnetic pinning layers and the free layer has a material selected to allow a controllable partial pinning by the one of the two antiferromagnetic pinning layers.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: March 20, 2018
    Assignees: Allegro MicroSystems, LLC, Commissariat A L'Energie Atomique et Aux Energies Alternatives
    Inventors: Paolo Campiglio, Bryan Cadugan, Claude Fermon, Rémy Lassalle-Balier
  • Patent number: 9882122
    Abstract: According to one embodiment, a memory device includes a stacked structure and a controller. The stacked structure includes a first magnetic layer, a second magnetic layer stacked with the first magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The second magnetic layer includes a first portion and a second portion stacked with the first portion. A magnetic resonance frequency of the first portion is different from a magnetic resonance frequency of the second portion. The controller is electrically connected to the stacked structure and causes a pulse current to flow in the stacked body in a first period. A length of the first period is not less than 0.9 times and not more than 1.1 times the absolute value of an odd number times of the reciprocal of a magnetic resonance frequency of the second magnetic layer.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: January 30, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Saida, Naoharu Shimomura
  • Patent number: 9876164
    Abstract: A magnetic junction and method for providing the magnetic junction are described. The magnetic junction resides on a substrate and is usable in a magnetic device. The magnetic junction includes free and pinned layers separated by a nonmagnetic spacer layer. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The free layer has a free layer perpendicular magnetic anisotropy energy greater than a free layer out-of-plane demagnetization energy. The free layer includes an alloy. The alloy includes [CoxFeyBz]uMgt, where u+t=1 and x+y+z=1.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: January 23, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Xueti Tang, Mohamad Towfik Krounbi, Dustin Erickson, Donkoun Lee, Gen Feng
  • Patent number: 9871191
    Abstract: The present invention is directed to an MRAM device comprising a plurality of MTJ memory elements. Each of the memory elements includes a magnetic free layer and a first magnetic reference layer with an insulating tunnel junction layer interposed therebetween; a second magnetic reference layer formed adjacent to the first magnetic reference layer opposite the insulating tunnel junction layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the first magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic free layer has a variable magnetization direction substantially perpendicular to the layer plane thereof. The first and second magnetic reference layers have a first fixed magnetization direction substantially perpendicular to the layer planes thereof.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: January 16, 2018
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Yiming Huai, Zihui Wang, Xiaojie Hao, Huadong Gan, Xiaobin Wang
  • Patent number: 9857435
    Abstract: A sensor package includes a magnetic field sensor and a corruption detection and reset subsystem. The magnetic field sensor has a magnetic sense element and a ferromagnetic structure characterized by a baseline magnetic state. The subsystem includes a detector element, a processor, and current carrying structure positioned in proximity to the ferromagnetic structure. Methodology performed by the subsystem entails detecting at the detector element an altered magnetic state of the ferromagnetic structure, where the altered magnetic state differs from the baseline magnetic state. Methodology further entails determining, at the processor, when a reset action is needed in response to the altered magnetic state and applying a reset magnetic field to the ferromagnetic structure to reset the ferromagnetic structure from the altered magnetic state to the baseline magnetic state.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: January 2, 2018
    Assignee: NXP USA, Inc.
    Inventors: Paige M. Holm, Lianjun Liu
  • Patent number: 9841444
    Abstract: According to one embodiment, a current sensor includes a first sensor element and a power line. The first sensor element includes a first electrode, a second electrode, and a first stacked body. The first stacked body is provided between the first electrode and the second electrode. The first stacked body includes a first magnetic layer, a second magnetic layer and a first intermediate layer. The second magnetic layer is provided between the first magnetic layer and the second electrode. The first intermediate layer is provided between the first magnetic layer and the second magnetic layer. The first intermediate layer is nonmagnetic. A magnetization of the second magnetic layer changes according to a magnetic field generated by a current flowing through the power line. At least a portion of the second magnetic layer is amorphous.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: December 12, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Fukuzawa, Yoshihiko Fuji, Shiori Kaji, Yoshihiro Higashi
  • Patent number: 9799383
    Abstract: According to one embodiment, the magnetic memory device includes a first magnetoresistive element and a second magnetoresistive element which are adjacent to each other. Each of the first and second magnetoresistive elements includes a first magnetic layer, a first non-magnetic later on the first magnetic layer, a second magnetic layer on the first non-magnetic layer, a second non-magnetic layer on the second magnetic layer, and a third magnetic layer on the second non-magnetic layer. Furthermore, the magnetic memory device further includes a fourth magnetic layer being in contact with the first and second magnetoresistive elements or in contact with conductive layers on the first and second magnetoresistive elements.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: October 24, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Keiji Hosotani, Tatsuya Kishi
  • Patent number: 9761254
    Abstract: A MR sensor is disclosed that has a free layer (FL) with perpendicular magnetic anisotropy (PMA), which eliminates the need for an adjacent hard bias structure to stabilize free layer magnetization, and minimizes shield-FL interactions. In a TMR embodiment, a seed layer, free layer, junction layer, reference layer, and pinning layer are sequentially formed on a bottom shield. After forming a sensor sidewall that stops in the seed layer or on the bottom shield, a conformal insulation layer is deposited. Thereafter, a top shield is formed on the insulation layer and includes side shields that are separated from the FL by a narrow read gap. The sensor is scalable to widths <50 nm when PMA is greater than the FL self-demag field. Effective bias field is rather insensitive to sensor aspect ratio, which makes tall stripe and narrow width sensors viable for high RA TMR configurations.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: September 12, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Yuchen Zhou, Kunliang Zhang, Zhi Gang Bai
  • Patent number: 9678178
    Abstract: Disclosed is a magnetoresistive magnetic field gradient sensor, comprising a substrate, a magnetoresistive bridge and a permanent magnet respectively disposed on the substrate; the magnetoresistive bridge comprises two or more magnetoresistive arms; each magnetoresistive arm consists of one or more magnetoresistive elements; each magnetoresistive element is provided with a magnetic pinning layer; the magnetic pinning layers of all the magnetoresistive elements have the same magnetic moment direction; the permanent magnet is disposed adjacent to each magnetoresistive arm to provide a bias field, and to zero the offset of the response curve of the magnetoresistive element; the magnetoresistive gradiometer includes wire bonding pads that can be electrically interconnected using wire bonding to an ASIC or to the lead frame of a semiconductor chip package.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: June 13, 2017
    Assignee: MultiDimension Technology Co., Ltd.
    Inventors: Jianmin Bai, James Geza Deak, Mingfeng Liu, Weifeng Shen
  • Patent number: 9666789
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee
  • Patent number: 9577184
    Abstract: A TMR sensor that includes a free layer having at least one B-containing (BC) layer made of CoFeB, CoFeBM, CoB, CoBM, or CoBLM, and a plurality of non-B containing (NBC) layers made of CoFe, CoFeM, or CoFeLM is disclosed where L and M are one of Ni, Ta, Ti, W, Zr, Hf, Tb, or Nb. One embodiment is represented by (NBC/BC)n where n?2. A second embodiment is represented by (NBC/BC)n/NBC where n?1. In every embodiment, a NBC layer contacts the tunnel barrier and NBC layers each with a thickness from 2 to 8 Angstroms are formed in alternating fashion with one or more BC layers each 10 to 80 Angstroms thick. Total free layer thickness is <100 Angstroms. The free layer configuration described herein enables a significant noise reduction (SNR enhancement) while realizing a high TMR ratio, low magnetostriction, low RA, and low Hc values.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: February 21, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Tong Zhao, Hui-Chuan Wang, Yu-Chen Zhou, Min Li, Kunliang Zhang
  • Patent number: 9564580
    Abstract: A mechanism relates to magnetic random access memory (MRAM). A free magnetic layer is provided and first fixed layers are disposed above the free magnetic layer. Second fixed layers are disposed below the free magnetic layer. The first fixed layers and the second fixed layers both comprise a rare earth element.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guohan Hu, Daniel C. Worledge
  • Patent number: 9559144
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: January 31, 2017
    Assignee: Avalanche Technology, Inc.
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Zihui Wang, Xiaobin Wang, Bing K. Yen
  • Patent number: 9530959
    Abstract: A method of forming a magnetic electrode of a magnetic tunnel junction comprises forming non-magnetic MgO-comprising material over conductive material of the magnetic electrode being formed. An amorphous metal is formed over the MgO-comprising material. Amorphous magnetic electrode material comprising Co and Fe is formed over the amorphous metal. The amorphous magnetic electrode material is devoid of B. Non-magnetic tunnel insulator material comprising MgO is formed directly against the amorphous magnetic electrode material. The tunnel insulator material is devoid of B. After forming the tunnel insulator material, the amorphous Co and Fe-comprising magnetic electrode material is annealed at a temperature of at least about 250° C. to form crystalline Co and Fe-comprising magnetic electrode material from an MgO-comprising surface of the tunnel insulator material. The crystalline Co and Fe-comprising magnetic electrode material is devoid of B. Other method and non-method embodiments are disclosed.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: December 27, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Manzar Siddik, Witold Kula, Gurtej S. Sandhu
  • Patent number: 9520553
    Abstract: A method of forming a magnetic electrode of a magnetic tunnel junction comprises forming non-magnetic MgO-comprising material over conductive material of the magnetic electrode being formed. An amorphous metal is formed over the MgO-comprising material. Amorphous magnetic electrode material comprising Co and Fe is formed over the amorphous metal. The amorphous magnetic electrode material is devoid of B. Non-magnetic tunnel insulator material comprising MgO is formed directly against the amorphous magnetic electrode material. The tunnel insulator material is devoid of B. After forming the tunnel insulator material, the amorphous Co and Fe-comprising magnetic electrode material is annealed at a temperature of at least about 250° C. to form crystalline Co and Fe-comprising magnetic electrode material from an MgO-comprising surface of the tunnel insulator material. The crystalline Co and Fe-comprising magnetic electrode material is devoid of B. Other method and non-method embodiments are disclosed.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: December 13, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Manzar Siddik, Witold Kula, Gurtej S. Sandhu
  • Patent number: 9515253
    Abstract: A TMR stack or a GMR stack, ultimately formed into a sensor or MRAM element, include insertion layers of Fe or iron rich layers of FeX in its ferromagnetic free layer and/or the AP1 layer of its SyAP pinned layer. X is a non-magnetic, metallic element (or elements) chosen from Ta, Hf, V, Co, Mo, Zr, Nb or Ti whose total atom percent is less than 50%. The insertion layers are between 1 and 10 angstroms in thickness, with between 2 and 5 angstroms being preferred and, in the TMR stack, they are inserted adjacent to the interfaces between a tunneling barrier layer and the ferromagnetic free layer or the tunneling barrier layer and the AP1 layer of the SyAP pinned layer in the TMR stack. The insertion layers constrain interdiffusion of B and Ni from CoFeB and NiFe layers and block NiFe crystalline growth.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: December 6, 2016
    Assignee: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Hui-Chuan Wang, Junjie Quan, Yewhee Chye, Min Li
  • Patent number: 9508365
    Abstract: A magnetic read apparatus has an air-bearing surface (ABS) and includes a shield, a crystal decoupling structure on the shield and a read sensor on the crystal decoupling structure. The crystal decoupling structure includes at least one of a magnetic high crystalline temperature amorphous alloy layer and a combination of a high crystalline temperature amorphous layer and an amorphous magnetic layer. The high crystalline temperature amorphous layer has a crystalline temperature of at least three hundred degrees Celsius. The amorphous magnetic layer is amorphous as-deposited.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 29, 2016
    Assignee: WESTERN DIGITAL (FREMONT), LLC.
    Inventors: Yuankai Zheng, Qunwen Leng, Xin Jiang, Tong Zhao, Zhitao Diao, Christian Kaiser, Zhipeng Li, Jianxin Fang
  • Patent number: 9478730
    Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the pinned layer and the free layer includes a magnetic substructure. The magnetic substructure includes at least two magnetic layers interleaved with at least one insertion layer. Each of the at least one insertion layer includes at least one of Bi, W, I, Zn, Nb, Ag, Cd, Hf, Os, Mo, Ca, Hg, Sc, Y, Sr, Mg, Ti, Ba, K, Na, Rb, Pb, and Zr. The at least two magnetic layers are magnetically coupled.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: October 25, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Roman Chepulskyy, Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy
  • Patent number: 9472596
    Abstract: Some embodiments relate to an integrated circuit device including an array of memory cells disposed over a semiconductor substrate. An array of first metal lines are disposed at a first height over the substrate and are connected to the memory cells of the array. Each of the first metal lines has a first cross-sectional area. An array of second metal lines are disposed at a second height over the substrate and are connected to the memory cells of the array. Each of the second metal lines has a second cross-sectional area which is greater than the first cross-sectional area.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 18, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yang Tsai, Yu-Wei Ting, Kuo-Ching Huang
  • Patent number: 9460737
    Abstract: The use of supermalloy-like materials for the side and top shields of a magnetic bit sensor is shown to provide better shielding protection from stray fields because of their extremely high permeability.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: October 4, 2016
    Assignee: Headway Technologies, Inc.
    Inventors: Yewhee Chye, Kunliang Zhang, Min Li
  • Patent number: 9450178
    Abstract: A method for manufacturing a magnetoresistive sensor may include the following steps: forming a trench structure in a substrate, wherein the step of forming the trench structure comprises performing a wet etching process on a substrate material member, wherein the trench structure has a first side, a second side, and a third side, wherein the second side is connected through the first side to the third side, wherein the second side is at a first obtuse angle with respect to a side of the substrate, and wherein the third side is at a second obtuse angle with respect to the side of the substrate; forming a first magnetic element on the first side of the trench structure; forming a second magnetic element on the second side of the trench structure; and forming a third magnetic element on the third side of the trench structure.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: September 20, 2016
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Wei Xu, Guoan Liu
  • Patent number: 9429633
    Abstract: A magnetic sensor that utilizes Rashba effect to generate spin polarization. The sensor eliminates the need for a pinned layer structure and therefore, greatly reduces the gap thickness of the sensor allowing for greatly improved data density. The sensor includes a two dimensional conductor adjacent to a magnetic free layer, that can also be separated from the free layer by a non-magnetic, electrically insulating barrier layer and that can also be constructed with or without side shields. A current flow through the two-dimensional conductor in a direction parallel with the air bearing surface causes a spin polarization oriented perpendicular to the air bearing surface. The voltage output of the sensor changes with changing magnetization direction of the free layer relative to spin polarization in the two dimensional conductor.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: August 30, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Goran Mihajlovic, Petrus A. Van Der Heijden
  • Patent number: 9406322
    Abstract: Embodiments of the present invention generally include magnetoresistive heads, such as read heads, having a sensor structure and side shields disposed adjacent to the sensor structure. The distance between the side shields and the sensor structure increase in a direction from an ABS in the off-track direction. The magnetoresistive heads may include tapered surfaces on the side shields or sensor structure, or may include stepped surfaces on the side shields or sensor structure.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: August 2, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Jun Aoyama, Masahiko Hatatani, Hiroyuki Katada, Masato Shiimoto
  • Patent number: 9396743
    Abstract: Systems and methods for controlling a thickness of a soft bias layer in a tunnel magnetoresistance (TMR) reader are provided. One such method involves providing a magnetoresistive sensor stack including a free layer and a bottom shield layer, performing contiguous junction milling on the sensor stack, depositing an insulating layer on the sensor stack, depositing a spacer layer on the insulating layer, performing an angled milling sub-process to remove preselected portions of the spacer layer, depositing a soft bias layer on the sensor stack, and depositing a top shield layer on the sensor stack and the soft bias layer. The method can further involve adjusting an alignment of a top surface of the spacer layer with respect to the free layer. In one such case, the top surface of the spacer layer is adjusted to be below the free layer.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: July 19, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Yi Zheng, Ming Jiang, Anup G. Roy, Guanxiong Li, Ming Mao, Daniele Mauri
  • Patent number: 9396742
    Abstract: A magnetic read transducer including a magnetoresistive sensor is described, as well as a fabrication method thereof. The magnetoresistive sensor includes a cap layer overlaying a free layer. The cap layer is situated with a first thickness to absorb boron from the free layer. The magnetoresistive sensor is annealed, and boron is diffused from the free layer and absorbed by the cap layer, improving the magnetic performance of the free layer. The cap layer thickness is then reduced to a second thickness, thereby reducing the shield-to-shield (SS) stack spacing of the magnetoresistive sensor and allowing for increased areal recording density.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: July 19, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Cheng-Han Yang, Chen-Jung Chen, Christian Kaiser, Yuankai Zheng, Qunwen Leng, Mahendra Pakala
  • Patent number: 9384763
    Abstract: A method and system provide a magnetic read apparatus having an air-bearing surface (ABS). The read apparatus includes a read sensor, a side bias structure and a rear magnetic bias structure. The read sensor includes first and second free layers, a spacer layer and a rear surface opposite to the ABS. The spacer layer is nonmagnetic and between the first and second free layers. The side bias structure is adjacent to the side surface(s) and magnetically biases the first and second free layers to be antiferromagnetically aligned. The rear magnetic bias structure biases the free layers in a scissor mode. The read sensor is between the ABS and the rear magnetic bias structure. The rear magnetic bias structure includes a rear soft magnetic bias structure having a saturation magnetization-thickness product of at least one milli-emu/cm2 and not more than three milli-emu/cm2.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: July 5, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Feng Liu, Daniele Mauri
  • Patent number: 9383268
    Abstract: According to one embodiment, a strain sensor includes: a base; a strain sensing element; a magnetic field sensing element; and a processing unit. The strain sensing element includes a first magnetic layer having a first magnetization; a second magnetic layer having a second magnetization; and a first intermediate layer. In the strain sensing element an angle between a direction of the first magnetization and a direction of the second magnetization changes in accordance with a strain. The magnetic field sensing element includes a third magnetic layer having a third magnetization; a fourth magnetic layer having a fourth magnetization; and a second intermediate layer. In the magnetic field sensing an angle between a direction of the third magnetization and a direction of the fourth magnetization changes in accordance with a magnetic field.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: July 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Higashi, Hideaki Fukuzawa, Yoshihiko Fuji, Michiko Hara, Masayuki Kii, Akio Hori, Tomohiko Nagata
  • Patent number: 9373663
    Abstract: The present invention is directed to a memory device having a via landing pad in the peripheral circuit that minimizes the memory cell size. A device having features of the present invention comprises a peripheral circuit region and a magnetic memory cell region including at least a magnetic tunnel junction (MTJ) element. The peripheral circuit region comprises a substrate and a bottom contact formed therein; a landing pad including a first magnetic layer structure formed on top of the bottom contact and a second magnetic layer structure separated from the first magnetic layer structure by an insulating tunnel junction layer, wherein each of the insulating tunnel junction layer and the second magnetic layer structure has an opening aligned to each other; and a via partly embedded in the landing pad and directly coupled to the first magnetic layer structure through the openings.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: June 21, 2016
    Assignee: Avalanche Technology, Inc.
    Inventors: Kimihiro Satoh, Yiming Huai
  • Patent number: 9373781
    Abstract: A method for providing a dual magnetic junction usable in a magnetic device and the dual magnetic junction are described. First and second nonmagnetic spacer layers, a free layer and pinned are provided. The first pinned layer, free layer and nonmagnetic spacer layer may be annealed at an anneal temperature of at least three hundred fifty degrees Celsius before a second pinned layer is provided. The second pinned layer may include Co, Fe and Tb. The nonmagnetic spacer layers are between the pinned layers and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: June 21, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Xueti Tang, Jang Eun Lee
  • Patent number: 9356229
    Abstract: Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced from one another by a coupler sub-region, exhibit oppositely-directed magnetic orientations. The magnetic and coupler sub-regions may each be of a thickness tailored to form the magnetic region in a compact structure. Interference between magnetic dipole fields emitted from the magnetic region on switching of a free region in the memory cell may be reduced or eliminated. Also disclosed are semiconductor device structures, spin torque transfer magnetic random access memory (STT-MRAM) systems, and methods of fabrication.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: May 31, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Wayne I. Kinney, Witold Kula, Stephen J. Kramer
  • Patent number: 9343090
    Abstract: A magnetic sensor having an Ir seed layer for improved pinning robustness and improved sensor performance. The sensor includes an Ir seed layer formed directly beneath and in contact with a layer of antiferromagnetic material (AFM). The Ir seed layer improves the grain structure and smoothness of the above applied layers to significantly improve the performance and pinning robustness of the sensor. The use of the Ir seed layer reduces interlayer magnetic coupling of the layers, reduces surface roughness and increases the temperature at which the pinned layer looses it's pinning (i.e. raises the mean blocking temperature Tc of the pinned layer structure).
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: May 17, 2016
    Assignee: HGST Netherlands B.V.
    Inventor: Kouichi Nishioka
  • Patent number: 9343129
    Abstract: A magnetic memory according to an embodiment includes: a first MTJ element including a first storage layer including a first magnetic film having a changeable magnetization direction, a first reference layer including a second magnetic film having a fixed magnetization direction, and a first tunnel barrier layer provided therebetween; and a second MTJ element including a second storage layer including a third magnetic film having a changeable magnetization direction and magnetically connected to the first storage layer, a second reference layer including a fourth magnetic film having a fixed magnetization direction parallel to the magnetization direction of the first reference layer, and a second tunnel barrier layer provided therebetween, the second MTJ element being arranged in parallel with the first MTJ element in a direction perpendicular to a stacking direction of the first MTJ element.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: May 17, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Naoharu Shimomura
  • Patent number: 9342179
    Abstract: According to one embodiment, a strain sensing element includes a film unit, and a sensing unit. The film unit has a film surface and is capable of being deformed. The sensing unit includes a first sensing element and a second sensing element. The first sensing element is provided between a part of the film unit and the second sensing element. The first sensing element includes a first magnetic layer having a changeable magnetization with a deformation of the film unit, a second magnetic layer provided apart from the first magnetic layer, and a first spacer layer provided between the first and second magnetic layers. The second sensing element includes a third magnetic layer having a changeable magnetization with the deformation of the film unit, a fourth magnetic layer provided apart from the third magnetic layer, and a second spacer layer provided between the third and fourth magnetic layers.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: May 17, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshihiko Fuji, Hideaki Fukuzawa, Tomohiko Nagata, Akio Hori, Yoshihiro Higashi
  • Patent number: 9318133
    Abstract: In one general embodiment, a device includes an antiferromagnetic layer; a first stitch layer exchange coupled with the antiferromagnetic layer, the first stitch layer having a magnetic orientation substantially parallel to a magnetic orientation of the antiferromagnetic layer; a second stitch layer exchange coupled with the first stitch layer and having a magnetic orientation substantially antiparallel to the magnetic orientation of the first stitch layer; a pinned layer structure exchange coupled with the second stitch layer; a free layer; and a spacer layer between the free layer and the pinned layer structure. An end of the antiferromagnetic layer facing a sensing face of the device is recessed from the sensing face.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: April 19, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: James M. Freitag, Zheng Gao, Chando Park
  • Patent number: 9305576
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer as a reference layer, a second magnetic layer as a storage layer, a nonmagnetic insulating layer between the first and second magnetic layers, and an antiferromagnetic conductive layer which is adjacent to a side opposite to the nonmagnetic insulating layer side of the second magnetic layer in a vertical direction in which the first and second magnetic layers are stacked. The second magnetic layer includes an area which is magnetically coupled with the antiferromagnetic conductive layer and which has a magnetization direction parallel with a magnetization direction of the second magnetic layer.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji Noma
  • Patent number: 9293159
    Abstract: A data sensor may be configured with a magnetic stack disposed between first and second magnetic shields. The magnetic stack can have a non-magnetic spacer layer disposed between first and second magnetically free laminations respectively coupled to the first and second magnetic shields via first and second electrode laminations. The first magnetically free lamination may have a first sub-layer constructed of a transition metal material and disposed between a second sub-layer constructed of a negative magnetostriction material and a third sub-layer constructed of a positive magnetostriction material.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: March 22, 2016
    Assignee: Seagate Technology LLC
    Inventors: Wonjoon Jung, Dimitar V. Dimitrov, Mark T. Kief
  • Patent number: 9245548
    Abstract: Embodiments of the present invention help to reduce mag-noise in a magnetoresistive head without deterioration in reproduced output and improve the signal/noise ratio (SNR) of the magnetoresistive head. According to one embodiment, the magnetoresistive head uses a synthetic ferri free layer and it is arranged such that the magnetic field which is applied to an end of a free layer with smaller film thickness and saturation magnetization in the track width direction by a coupling field is larger than the magnetic field which is applied to it by a bias layer.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: January 26, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Masato Shiimoto, Hiroyuki Katada, Kazuhiro Nakamoto, Hiroyuki Hoshiya
  • Patent number: 9246082
    Abstract: Provided is a method of forming a magnetic memory device. A first magnetic layer, a tunnel barrier, and a second magnetic layer are deposited on a substrate. The second magnetic layer, the tunnel barrier, and the first magnetic layer are etched to form magnetic tunnel junction structures. An ion beam etching process is performed using an oxygen-containing source gas to remove etching by-products on sidewalls of the magnetic tunnel junction structure and to oxidize the sidewalls of the magnetic tunnel junction structures.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: January 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ken Tokashiki