Abstract: A disc drive with on-the-fly verification of an enabled condition of the write element, comprising a rotatable disc having a magnetic recording surface, and a data reading and writing assembly. The data reading and writing assembly comprises a read/write head comprising a write element and a read element, both adjacent the recording surface; a preamplifier comprising a write driver applying a series of write currents for writing data to the recording surface and a read amplifier for reading stored data from the recording surface; and an interconnect joining the write driver to the write element so as to generate time-varying magnetic fields selectively magnetizing the recording surface in response to the write currents, and joining the read amplifier to the read element so as to transduce magnetization vectors on the recording surface associated with stored data.

Abstract: A head apparatus which is tough against disturbing noise and superior in the S/N ratio and which can cope with an increase of the capacity of a recording medium is disclosed. A first playback amplifier for amplifying the playback signal of a MR head and a register circuit for setting the bias current to the MR head are formed as a COS IC. The COS IC is mounted on a suspension together with the MR head. A feeble playback signal outputted from the MR head is amplified by the first playback amplifier once and then transmitted to a mother IC over a pair of signal lines. The amplified playback signal is tough against disturbing noise during transmission.

Abstract: A signal is read out from a two-layered perpendicular magnetic recording medium by a composite head formed from a single-pole perpendicular recording head and magnetoresistance effect type reproduction head. The read-out signal is amplified by a head amplifier, passed through a low-pass filter, and converted into a digital signal by an analog/digital converter. A DC restoring circuit restores a DC component removed by the head amplifier using the output signal from the analog/digital converter. An adder adds the restored DC component to the output signal from the analog/digital converter, thereby restoring the head output terminal signal. A servo demodulation circuit generates a position error signal on the basis of the restored signal.

Abstract: A remodulator embodied in an integrated circuit (IC), a method for remodulating bits and a controller and disk drive incorporating the IC or the method. In one embodiment, the IC includes: (1) a remodulator that processes incoming bits to yield remodulated outgoing bits, the remodulator including a selected one of a decision feedback loop and an error feedback loop and (2) a feedforward loop coupled to an input of the remodulator and having a baseline wander filter, the baseline wander filter cooperating with the selected one of the decision feedback loop and the error feedback loop to reduce a bit error rate of the remodulated outgoing bits.

Abstract: The invention concerns digital audio precompensation, and particularly the design of digital precompensation filters. The invention proposes an audio precompensation filter design scheme that uses a novel class of design criteria. Briefly, filter parameters are determined based on a weighting between, on one hand, approximating the precompensation filter to a fixed, non-zero filter component and, on the other hand, approximating the precompensated model response to a reference system response. For design purposes, the precompensation filter is preferably regarded as being additively decomposed into a fixed, non-zero component and an adjustable compensator component. The fixed component is normally configured by the filter designer, whereas the adjustable compensator component is determined by optimizing a criterion function involving the above weighting.

Abstract: Provides a magnetic recording and reproducing apparatus having an amplified apparatus, which is switched from a recording state to a readout state based on a control signal; reads out a signal containing a servo signal by the signal readout means; and includes the amplifier apparatus for amplifying the signal with an amplifier and outputting the amplified signal; and filters the signals by the filtering means that allows high frequency part of signals to pass through with the first cutoff frequency during the first prescribed time period after the readout state has been initiated; the second cutoff frequency that is lower than the first cutoff frequency during the second prescribed time period after the first prescribed time period has passed; and the third cutoff frequency that is lower than the second cutoff frequency after the second prescribed time period has passed.

Abstract: An extra-HDA record reproducing circuit for outputting write data comprising parallel data is provided outside a disk assembly, and a intra-HDA record reproducing circuit comprising a parallel-to-serial conversion circuit for receiving write data comprising parallel data and converting the write data to serial data, a write amplifier for switching a polarity of a recording current to be supplied to a head according to the write data converted to serial data, and a preamplifier for amplifying a read signal detected by the head is provided within the disk assembly, and the write data is transferred at a high speed at least from the extra-HDA record reproducing circuit to the intra-HDA record reproducing circuit.

Abstract: The present invention provides a novel method and apparatus for decoding digital information transmitted through the communication channel or recorded on a recording medium. The method and apparatus are preferably applied in the systems where data is encoded using regular LDPC codes with parity check matrices composed from circulants (a matrix is called a circulant if all its column or row are cyclic shifts each other).

Abstract: Time-based servopositioning systems, methods, formats, and data recording media used in association with the same, employing full amplitude recording signals to improve the available signal as media thicknesses decrease.

Abstract: Embodiments of the present invention relate to an impedance-matched write driver circuit which comprises a voltage source, a write driver circuit electrically coupled to the voltage source, a signal input coupled so as to effect the output of the write driver circuit, and an impedance matching circuit electrically coupled to the write driver circuit, wherein the impedance matching circuit is enabled to damp the output oscillations in the output of the write driver circuit. Importantly, the impedance of the impedance-matched write driver circuit is selectable by component selection or by logic. Another embodiment of the present invention is directed to a system, e.g., a magnetic disk storage unit that makes use of the write driver as described herein.

Abstract: The invention relates to control systems for data storage media. More particularly, the invention relates to a system, method and apparatus for forming various frequency modulation patterns on storage media for providing position error signals. The invention also relates to forming various frequency modulation patterns on storage media for providing position error signals having a continuously varying frequency that is proportional to the position of a read/write transducer head within a track defined on a storage medium. The invention also relates to providing a demodulated signal that is proportional to a continuously varying position error signal frequency and thus to the position of the read/write head within a track defined on a storage medium.

Abstract: A method of correcting erroneous data due to thermal asperity and a device therefor is provided. A magnetic disc device equipped with such error correction device is also provided. The correction device includes a comparator for comparing data signal reproduced from a magnetic disc with a predetermined threshold signal; and circuitry for generating an error signal based on the signal output from the comparator and the data signal. Using the error signal, the location and the length of erroneous data included in the data signal are determined. The erroneous data may be corrected, irrespective of the length thereof, by selective use of hardware ECC on the fly and software ECC. An alternative error signal may be generated by a technique based on the run lengths of the data.

Abstract: The present invention relates to a method of enhancing a preamplifier read recovery in a hard disk drive system and comprises the steps of determining whether the hard disk drive system is transitioning from a non-read state to a read state and initiating a non-read state to a read state transition sequence when a transition from the non-read state to the read state is determined. The transition sequence is independent of a type of non-read state prior to the transitioning. After the non-read state to read state transition sequence is complete the read mode is initiated. In addition, the invention comprises a system for controlling a transition from a non-read state to a read state associated with a preamplifier in a hard disk drive system.

Abstract: A magnetic recording disk drive having an interline crosstalk amplitude detection unit 36 within its preamplifier 20 is provided. The detection unit 36 is used for detection coil malfunctions. The interline crosstalk amplitude detection unit 36 includes an interline crosstalk amplitude detection circuit 31 which is branched from a branch circuit 30 within the read circuit in the preamplifier 20. The interline crosstalk amplitude detection unit 36 is provided with the capability to determine occurrence of a write condition abnormality when the amplitude has exceeded a threshold value, making it possible to ensure the recording function of the preamplifier 20. Likewise, the inductance is reduced when a circulatory shunt has occurred in a line near the head, making it possible to detect a write condition abnormality.

Abstract: A method, apparatus and computer program product are provided for head crash predictive failure analysis based upon slider track misregistration measurement using the readback signal. A transducer head is selected. Then the transducer head is positioned off-track. A readback signal is obtained from the transducer head positioned off-track. The readback signal is processed and compared with historical values to identify head disk interference. The processing of the readback signal includes amplifying the readback signal using arm electronics. The amplified readback signal is demodulated to provide a demodulated signal that is proportional to its amplitude. The demodulated signal is bandpass filtered using a bandpass filter having a selected center frequency for the selected transducer head.

Abstract: A common mode transient reduction circuit for use with an operational transconductance amplifier having a main amplifier and a common mode feedback amplifier coupled to a common bias voltage is disclosed. The common mode transient reduction circuit includes a delay circuit, coupled between the common bias voltage and the main amplifier, that reduces a magnitude of the main amplifier's common mode voltage output transient when the common bias voltage is changed. In an advantageous embodiment, the delay circuit includes a resistance and a capacitance.

Abstract: A circuit for use in a phase lock loop including a first phase detector to detect a first phase error between input signals, the first phase detector obtaining the first phase error during a first time period, a second phase detector to detect a second phase error between the input signals, the second phase detector obtaining the second phase error during a second time period, the second time period being longer than the first time period, and a compensation circuit to compensate the first phase error with a portion of the second phase error signal.

Abstract: A preamplifier circuit of a preamp configured for measuring microwave noise of a magnetoresistive element biased by a pair of current sources is disclosed. In a preferred embodiment, the preamplifier circuit includes a differential amplifier disabled from the preamplifier circuit by a amplifier bypass switch, one of the pair bias current sources disabled from the preamplifier circuit and referenced to ground by a current bypass switch, a test point communicating with the amplifier bypass switch providing single ended access to the biased magnetoresistive element for measuring the microwave noise of the biased magnetoresistive element relative to the ground reference and a ground point communicating with the ground reference providing the ground reference for measuring the microwave noise of the biased magnetoresistive element.

Abstract: An open write head detection circuit is provided comprising a write head driver circuit, a programmable reference voltage source, a comparator and a pulse width filter. The write head driver circuit generates an voltage sense signal. The comparator compares the voltage sense signal with a reference voltage from the programmable reference voltage source and generates a comparator output signal indicative of whether the voltage sense signal is greater than or less than the reference voltage. The comparator output signal is input to the pulse width filter which generates a latched open head signal in response the voltage sense signal being less than the reference level for a predetermined time measured as a programmable number of write clock cycles.

Abstract: A method and apparatus for obtaining optimum parameter values for a read channel employed in a disc drive storage system are provided in which data having a known pattern is written on a disc surface of the disc drive storage system. The data written on the disc surface is then read to obtain a readback signal. The readback signal is passed through the read channel. A readback signal response is obtained at an output test point of the read channel. The readback signal response at the output test point is compared with a target response of the read channel at the output test point. The comparison is carried out using frequency spectral analysis. At least one parameter of the read channel is adjusted if the readback signal response substantially differs from the target response.

Abstract: A method and circuit for selectively timing amplifier stages of a multi-stage reader amplifier for a hard disk drive system. The reader amplifier includes a first stage, second stage and third stage coupled in series. The method includes the steps of powering the first stage, delaying the enabling of the second stage, and delaying the enabling of the third stage, in order to reduce excursions on the third stage output signal. The circuit includes a logic circuit for successively enabling the second and third amplifier stages.

Abstract: A write drive circuit (40) for a hard disk drive selectively providing a current mode operation for high speed data write of a single channel, and selectively providing a voltage mode operation during a servo write operation. A central buffer has a first circuit (50) providing a current mode drive signal to a head during a single channel write operation, and a second circuit (52) providing a voltage mode drive signal for multi-channel servo write operation. The outputs of both circuits (50, 52) is provided over a common differential connection (T1) feeding a pre-driver circuit (70) adapted to drive one or many heads, as determined by head select control lines (72). The circuit provides >1.6 Gb/s data write speed in single channel write operation, and has an architecture utilizing only two signal lines for four channels.

Abstract: A method and system for calibrating the write current of a current mode write driver having a first PFET coupled to a first NFET at a first node which is connected to a first side of a write head of the write driver, and a second PFET coupled to a second NFET at a second node which is connected to a second side of the write head. The current mode write driver also defines an INODE where a source of the first NFET is coupled to a source of the second NFET, and the current mode write driver is put in a state where all four FET devices are in an off condition. A precision resistor R is connected from the INODE I/O pin of the write driver to a positive potential VDD I/O pin of the write driver, such that a current I1 is caused to flow. Then the actual value of I1 is calculated by first measuring the voltage V across the precision resistor and then calculating the precise current from I1=V/R.

Abstract: A dual mode write driver providing both a voltage mode of operation and a current mode of operation by combining the required topology in a write driver circuit to allow either current mode operation or voltage mode operation. A logic control signal is applied to an input to the dual mode write driver to cause the circuit to configure for either voltage mode operation or current mode operation. The dual mode write driver is typically used in a tape or disk drive system to write data onto a tape or disk recording medium. The dual mode write driver has a first PFET (P3) coupled to a first NFET (N1) at a first node which is connected through a resistor (R1) to a first side of a write head (L1) of the write driver, and a second PFET (P4) coupled to a second NFET (N2) at a second node which is connected through a resistor (R2) to a second side of the write head.

Abstract: A method and apparatus for providing quadrature biasing for coupled-pair circuits. A QBCP-circuit for quadrature amplifiers provides a new input common-mode sense point that separates the inputs for the differential-and-common mode feedback-control loops. The QBCP circuit biases all four transistors equivalently and reduces the feedback-loop interaction, thereby simplifying the bias control system and improves the voltage-transfer frequency-response performance.

Abstract: Bi-Variant Coupled Pair (BVCP) circuits suitable for use in channel front-end low noise preamplifiers of magnetic storage devices are described. In a magnetic storage device, a BVCP circuit provides a DC bias voltage for a read transducer, low-noise amplification performance, and relatively small AC coupling capacitor values for reducing the cost of an integrated circuit (IC) in which the BVCP circuit may be embodied. The BVCP circuit also has a controllable input impedance for matching a transmission line impedance for high data rate applications.

Abstract: In a magnetic recording writing circuit, a current having a higher level than a write current is supplied for a period of time during rise and fall of the write current, and a current having a lower level than the write current is supplied for a period of time during overshoot at the rise and fall of the write current. Accordingly, the write current can recover quickly from overshoot.

Abstract: Here is disclosed an information recording and reproducing apparatus comprising a multi-phase quadrature angular modulator for subjecting a signal to be written on a recording medium to multi-phase quadrature angular modulation to generate a modulated signal expressing information in phase difference and frequency difference, a quantizer for generating a discrete signal by making discrete the amplitude of the modulated signal generated by the quadrature angular modulator with reference to a certain level, a write head for writing the output signal of the quantizer onto the recording medium, a read head for reading information written on the recording medium, a read compensate circuit for compensating the phase and amplitude of a signal readout of the read head, and a multi-phase quadrature angular demodulator for demodulating a signal supplied from the read compensate circuit by subjecting it to multi-phase quadrature angular demodulation.

Abstract: A method and apparatus to optimize a bit error rate for a partial response, maximum likelihood (“PRML”) read/write channel is disclosed. A channel margining circuit that is configured to carry out an embodiment for a method of optimizing the bit error rates of a read/write channel is described. The margining circuit derives an interference signal to stress a read/write channel for optimizing the bit error rate. The signal is derived from bit errors inherent with the read/write channel. The circuit reduces the time to optimize the channel by providing an amplified interference signal that increases a bit error rate during optimization.

Abstract: The invention is directed to patterned magnetic media for use in magnetic recording and data storage, and various conditioning techniques that can be used to magnetically condition the patterns. For example, a medium can be formed to exhibit a pattern of surface variations defined by patterned areas and non-patterned areas. Techniques are described for magnetically conditioning the patterned areas. The techniques may be useful for perpendicular patterned media, i.e., media having patterns formed on the media surface and having a magnetic anisotropy that is perpendicular to the plane of the medium. In particular, perpendicular magnetic anisotropy has been found to be an important factor that allows effective conditioning of patterned features having relatively small widths.

Abstract: An impedance controlling circuit (152) is connected across an MR head (42) and has two current paths, each including a control transistor (154,156), a current path resistor (160,158), and a biasing circuit (162,164) in series. Each side of the MR head 42 is connected between a respective one of the current path resistors (158,160) and the biasing circuits (162,168). A shunt resistor (170) is connected between the control transistors (154,156) and the current path resistors (158,160) in each of the current paths. When the control transistors (154,156) are not conducting, the current path resistors (158,160) and the shunt resistor (170) shunt the MR head (42).

Abstract: A disc drive storage system and device is provided in which distortion in a drive signal due to a mismatch between a signal source impedance and a write head impedance is minimized. A write head that writes on a disc surface and a signal source that provides a drive signal to the write head are coupled by an electrical interconnect path. A connection device that minimizes the mismatch between the signal source impedance and the write head impedance is introduced in the electrical interconnect path. In addition, a method of coupling a signal source to a write head in a disc drive storage system is provided.

Abstract: A data detecting method and its apparatus for equalizing an input signal reproduced from magnetic recording media by partial response by employing at least one of partial response class 4 (PR4) and extended partial response class 4 (EPR4), and decoding the input signal. The input signal is equalized by PR4, and a first equalized signal is obtained. First decoded data is obtained from the first equalized signal. The input signal is equalized by EPR4, and a second equalized signal is obtained. Second decoded data is obtained from the second equalized signal. From the first equalized signal and second equalized signal, the signal condition of the input signal is judged, and the optimum data detecting method is discriminated. Thus, either the first decoded data or second decoded data is selected as detected data.

Abstract: A method for the adaptive dampening of a peak amplitude of a thermal asperity signal in a disc drive to minimize loss of read data integrity, including the steps of determining a peak-to-peak preamble signal amplitude for identifying an amplitude signal range of the peak amplitude of the thermal asperity signal; measuring the peak amplitude of the thermal asperity signal; separating the peak-to-peak preamble signal amplitude into substantially even portions for use in calculating a value of the amplitude signal range of the peak amplitude of the thermal asperity signal; calculating the value of the amplitude signal range of the peak amplitude of the thermal asperity signal for use in determining a dampening resistance used by a dampening circuit to adaptively dampen the peak amplitude of the thermal asperity signal; and activating the dampening circuit to dampen the peak amplitude of the thermal asperity signal.

Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data from the disk by maintaining the voltage bias and a feedback circuit having a feedback pole to sense deviations in the voltage and to adjust the voltage in response to the deviations. The read circuit pole is separated from the feedback pole in frequency.

Abstract: A technique for presenting an optimally timed control signal to an upper H-switch driver in a fashion capable of achieving a very fast transition of the current in the inductive recording head. The technique also provides a current boost during the transition while resulting in minimized power consumption at other times.

Abstract: A read/write system for reading information from a magnetic storage medium using a magnetoresistive head and for providing an output signal representative of the information read includes a differential pair circuit, an input voltage offset compensation circuit, and an input current offset compensation circuit. The differential pair circuit is ac coupled to first and second input signal nodes and includes first and second transistors, first and second load resistors, and a current generator. The input voltage offset compensation circuit is coupled to the differential pair circuit and includes a switch network and a Gm stage. The input current offset compensation circuit is coupled to the differential pair circuit and includes an integrator circuit and first and second biasing resistors.

Abstract: A hard disk is provided with tools for limiting the duty cycle (a group of variations of load with time). The write current is controlled by, e.g., limiting the duration of a given write cycle. The write cycle may involve writing data continuously along adjacent portions of the disk media (e.g., writing of data in adjacent segments of a track in the outer diameter (OD) region of a platter), with an intermittent duty write current.

Abstract: A recording/reproducing apparatus capable of switching over among a plurality of heads with high precision, wherein the apparatus is provided with: a recording/reproducing unit for recording/reproducing signals onto/from a recording medium with a plurality of heads; a generating unit for generating control data for controlling the recording/reproducing unit; and a transmitting unit for transmitting control data generated by the generating unit to the recording/reproducing unit, wherein priority is given in transmission to data for controlling the switching of the plurality of heads over other data.

Abstract: A disk drive utilizes a unique write condition for each of the transducers within the drive. Each write condition is determined based upon the specific properties of the corresponding transducer. The write condition information is preferably stored within a memory within the disk drive. When a write operation is performed, the appropriate write condition for the corresponding transducer is used to determine when to write data to the disk. A write condition will typically include one or more individual write criteria. For example, a write condition can specify a write threshold value to be used during a write operation. Similarly, a write condition can involve a combination of a write threshold and a radial transducer velocity. Other write criteria are also possible.

Abstract: A plurality of patterns are formed beforehand so that each of those patterns is deviated slightly from another in each sector in the track width direction, then the pattern is followed up, thereby obtaining both full-track profile and micro-track profile. A variation of a position signal is detected from this profile, thereby creating a table for correcting the non-linearity error of the position signal. Consequently, the distribution of the write/read-back property is measured, thereby enabling the track density to be improved. Furthermore, a variation of the position signal caused by a property variation of the head read-back element is detected and corrected, thereby enabling a high reliability and a high track density to be realized for the object magnetic recording disk apparatus.

Abstract: A symmetrical read element circuit for reducing electrical and magnetic noise using signal processing, such as a differential preamplifier. The circuits are symmetrically created on both sides of the read element so that the noise is balanced on both leads of the sensor element allowing substantial noise reduction by the signal processing. That is, the present invention provides symmetrical leads and pads designed for equal noise pickup, and for cancellation of the balanced noise.

Abstract: An adjustable impedance boosting circuit for a magneto-resistive head in a gain stage beyond the input gain stage. The boosting circuit compensates for a frequency pole of the head leads by introducing a zero in proportion to the resistance of the magneto-resistive element and with selectable circuit parameters to further adjust the pole compensation. The invention includes selectively adjusting the sensitivity of the pole compensation to changes in the resistance of the head, selectively adjusting the peak compensation, and adjusting the frequency of the compensating zero.

Abstract: A disc drive includes a base and a disc rotatably attached to the base. The disc drive also includes an actuator assembly rotatably attached to the base and a device for moving the actuator assembly. The actuator assembly includes an arm carrying a write head in a transducing relationship with respect to the disc. The write head further includes a preamp current driver circuit. A data pulse circuit is operatively coupled to the preamp current driver circuit to provide a write current impulse based on an input data pattern. The preamp current driver circuit further includes a plurality transistors to receive the write current impulse and provide a sequence of write current impulses of opposite polarity to the write head for effecting magnetic recording on the disc of the disc drive based on the input data pattern.

Abstract: A circuit device for restoring the symmetry of an analog signal originated by the reading of data from magnetic supports, including at least one differential cell multiplier whose cell includes a pair of input MOS transistors having respective conduction terminals linked together at a circuit node. Advantageously, provided in parallel with each of the cell input transistors, are a plurality of transistors individually connectable to and disconnectable from each of the input transistors by corresponding switches.

Abstract: A preamplifier system is connected through an interconnect to a read head. The preamplifier system includes a voltage-sense preamplifier having at least one input connected through the interconnect to the read head and having at least one output, and also includes a current-sense preamplifier having at least one input connected through the interconnect to the read head and having at least one output. A summing circuit is connected to combine the outputs of the voltage-sense preamplifier and the current-sense preamplifier. For optimal performance, the preamplifier system is impedance matched to the interconnect. The preamplifier system achieves excellent response due to impedance matching with acceptably low noise levels, since the correlated noise associated with the current-sense preamplifier is canceled at the summing circuit.

Abstract: To obtain a large capacity magnetic recording medium capable of recording at a super high density of 3 Gbit or more per one square inch and a magnetic storage apparatus, a magnetic recording medium is prepared by disposing orientation control layers 31, 31′ having at least a B2 (CsCl) structure on a substrate 30, disposing a first underlayer comprising Cr and a second underlayer containing at least one element selected from Cr, Nb, Mo, Ta, W and Ti and having a lattice constant greater than that of the first underlayer and then forming a magnetic layer comprising Co as the main ingredient.

Abstract: A method of preprocessing low frequency components of a perpendicular read-back signal in a data storage system in order to reduce low frequency noise includes introducing a dominant known perturbation, to the perpendicular read-back signal, which masks the effects of other low frequency noise sources and leaves the read-back signal with one dominant low frequency noise component. The method then further includes removing the dominant known perturbation from the read-back signal to recover low frequency portions of the read-back signal in order to determine values of bits read from a storage medium. A perpendicular recording data storage system configured to implement the method is also disclosed.

Abstract: In a coding method which does not restrict a run length of “1” while data is recorded/reproduced, there are such a drawback that when an error correction is carried out, a total number of error data to be corrected is increased, and also errors of not-detectable data are increased. While data is coded, a continuous number of “1” contained in a code word is limited, and then an error correction is carried out inside a coding/decoding process operation. Thus, a recording/reproducing apparatus having a small number of decoding errors is available.

Abstract: A system and method provide overshoot protection to facilitate driving a load by output circuitry in response to a transition from a first operating mode to a second operating mode. The overshoot protection occurs by masking an input bias from biasing the output circuitry for an initial part of the second operating mode based on a transition to the second operating mode, and then allowing the input bias to bias the output circuitry in a desired manner in a subsequent part of the second operating mode.