Abstract: A system for regulating high speed voltage surges, particularly as a result of lightning strikes, which includes a transistor, an isolated voltage provider, and an array of voltage regulating electrical components, where the isolated voltage provider maintains the transistor in a fully on mode unless a voltage surge occurs. In the case of a voltage surge the array of voltage regulating electrical components switches the transistor to linear mode thus providing protection equal to its rating. A method of determining the voltage rating of individual Zener diodes contained within a Zener diode array consisting of shorting out individual diodes from the array and measuring the total voltage rating, then comparing the total voltage rating of the array with no diodes shorted out to the voltage rating of the array with the one diode shorted out.

Abstract: An output circuit preventing damage by electrostatic discharge current is provided, comprising a voltage source, a power-clamp ESD circuit, a PMOS transistor, an NMOS transistor, and a diode. The voltage source provides a voltage. The power-clamp ESD circuit is coupled to the voltage source and directs the electrostatic current to flow in a current direction. The PMOS transistor is coupled to the voltage source. The NMOS transistor is coupled to the PMOS transistor. The diode is coupled to the voltage source. The output unit is coupled to the diode and the PMOS transistor.

Abstract: A circuit fault detector and interrupter which consists of parallel current conduction paths, including a path through a mechanical contactor and a path through a power electronics switch. A fault can be detected by a fault detection circuit within 50 microseconds of the occurrence of the fault, causing the mechanical contactor to be opened and the fault current to be commutated via a laminated, low-inductance bus through the power electronics switch. The power electronics switch is thereafter turned off as soon as possible, interrupting the fault current. The fault current can be interrupted within 200 microseconds of the occurrence of the fault, and the device reduces or eliminates arcing when the mechanical contactor is opened.

Abstract: An inrush current higher than a second anomaly threshold current ILfc passes through a power MOSFET 14, when a control signal S1 of low level is applied to a gate driver 28 so that the power MOSFET 14 and the like turn to a conductive state. A first forcing shutoff operation for the power MOSFET 14 is then prevented, because a first anomaly threshold current ILoc is set to an initial level higher than the inrush current. A fuse time counter 73 starts a count-up operation in response to the occurrence of the inrush current, and continues to increment its count value until a load current IL falls below the second anomaly threshold current ILfc. According to the count value, the first anomaly threshold current ILoc is decreased stepwise with time.

Abstract: A load abnormality detecting system and method for detecting the burnout and short circuit of a load are provided. A voltage generator (10) generates a specified voltage Vs in accordance with a load current IL. A judging device (4) compares a signal corresponding to this voltage (Vs) with a specified reference value (T1, T2) to judge whether a load (2) has any abnormality. A selector (6) causes the burnout reference value (T1) to be inputted to the judging device (4) and controls the voltage generator (10) to use a first resistance value when checking the burnout of the load (2) while causing the short-circuit reference value (T2) to be inputted to the judging device (4) and controlling the voltage generator (10) to use a second resistance value when checking the short circuit of the load (2).

Abstract: Self-powered supplies are presented for powering a power converter switch driver with power obtained from an associated snubber circuit, in which a supply circuit and a snubber circuit are connected in a series path across the switch terminals with the supply circuit receiving electrical power from the snubber and providing power to the switch driver.

Abstract: In one embodiment, an in-rush limiter is configured to control an output voltage to increase at a rate that is independent of the load that is powered by the in-rush limiter.

Abstract: To improve the ESD protection of a circuit receiving a signal. An inverter circuit INV1 is connected to ground wiring GND1 for supplying power, and is connected to power supply wiring VDD1 via a PMOS transistor MP5. An inverter circuit INV2 is connected to ground wiring GND2 and power supply wiring VDD2 for supplying power, and its input node is connected to an output node of the inverter circuit INV1. Further, the ground wiring GND1 and the ground wiring GND2 are connected via a protection element PE0. During normal operation, the output of an inverter circuit INV3 goes to an H level, the output of an inverter circuit INV4 goes to an L level, and the PMOS transistor MP5 is turned on. When ESD is applied, the power supply wiring VDD2 is place in a floating state, the output of the inverter circuit INV4 goes to an H level, the PMOS transistor MP5 is turned off, and a current that occurs when EDS is applied does not flow into the inverter circuit INV2.

Abstract: A constant voltage circuit including an input terminal to receive an input voltage, an output terminal configured to output a constant voltage converted from the input voltage to a load and an overcurrent protection circuit portion to perform an overcurrent protection operation of restricting an output current from the output terminal within a threshold current and to generate and provide logic signals including information on an operation state of the overcurrent protection operation to a control device disposed outside the constant voltage circuit to control the load based on the information.

Abstract: A selectively protected electrical system includes or operates with a power source, a load, a power driver circuit for controllably transferring power from the power source to the load, the power driver circuit being encapsulated in a potting material, and a controller for enabling and disabling the power driver circuit, the controller being un-encapsulated by the potting material. If a contaminant induced electrical fault occurs in the selectively protected electrical system, the electrical fault is more likely to occur in the un-encapsulated controller, such that the selectively protected electrical system is disabled. The contaminant is inhibited from contacting and inducing an electrical fault in the power driver circuit, thus providing for a controlled failure of the selectively protected electrical system.

Abstract: A load driving device for controlling a driving and a stop of a load through on/off switching of a semiconductor device under the control of a driving circuit, includes an overcurrent detecting unit that compares, with a prescribed judgment voltage, an inter-electrode voltage which is generated when a current flows between a first electrode and a second electrode of the semiconductor device, and judges that an overcurrent is flowing through the semiconductor device when the inter-electrode voltage is higher than the judgment voltage, and a diagnosing unit that performs a diagnosis as to whether the overcurrent detecting unit is operating normally in a state that the semiconductor device is a on-state. When the diagnosing unit judges that the overcurrent detecting unit is not operating normally, the diagnosing unit outputs an instruction signal for turning off the semiconductor device, to the driving circuit.

Abstract: In a load-driving apparatus with a FET between a battery and a load, an overcurrent detection circuit has a function generation circuit with a voltage divider circuit and a comparator. The voltage divider circuit has a pair of resistors connected to a drain of the FET, and a Zener diode connected to a connection point in parallel to the second resistor. The comparator compares a reference voltage at the connection point with a variable voltage of the FET, and outputs an overcurrent detection signal when the variable voltage becomes lower than the reference voltage. When no overcurrent exists and the battery voltage is not decreasing, the connection point is kept at a breakdown voltage of the Zener diode, and the difference with respect to the source voltage of the FET becomes particularly large. The comparator therefore does not erroneously output an overcurrent detection signal even when noise enters the system.

Abstract: The present invention relates to an protection device of a surge protector, which comprises: a first fuse; a resistor; a switching circuit; a second fuse; and a surge protector; thereby the switching circuit can be turned ON and make the resistor be heated when the sensing end senses a low potential, and then makes the first fuse be opened due to sense heat, so as to cut off the power source.

Abstract: The invention relates to a safety switching device, with which a safety-related device, preferably an electric drive, can be set into a safe state. The safety switching device (900) has a microprocessor or microcontroller (822), which can set, for example, an electric drive to be protected into a safe state both if an emergency circuit breaker, protective door switch, and/or two-hand switch is activated and also if there is faulty operation of the safety-related device or electric drive. For this purpose, the microprocessor (822) is preferably implemented such that it can determine from at least one analog signal to be measured whether a predetermined parameter, preferably the amplitude of the analog signal, lies outside a predetermined operating range. In addition, the microprocessor (822) can be a component of a safety device (810) which is constructed for multiple-channel control of a safety-related electric drive.

Abstract: The document specifies a method for fault handling in a converter circuit for switching three voltage levels, in which the converter circuit has a converter subsystem provided for each phase (R,S,T), in which a top fault current path (A) or a bottom fault current path (B) in the converter subsystem is detected, the top fault current path (A) running through the first, second, third and sixth power semiconductor switches in the converter subsystem or through the first and fifth power semiconductor switches (S1, S5) in the converter subsystem, and the bottom fault current path (B) running through the second, third, fourth and fifth power semiconductor switches in the converter subsystem or through the fourth and sixth power semiconductor switches in the converter subsystem, and in which the power semiconductor switches are switched on the basis of a fault switching sequence.

Abstract: A method consistent with an embodiment may include selecting one of a plurality of components of a power supply system of a cordless power tool to be a protected weak link element. The method may also include configuring the protected weak link element to fail from an overload condition before failure of a remainder of the plurality of components from the overload condition, monitoring a power condition of the protected weak link element, and protecting the protected weak link element from the overload condition to thereby also protect the remainder of the components from the overload condition. A battery pack and a cordless power tool are also provided.

Abstract: An improved switching apparatus and method are disclosed. In at least some embodiments, the apparatus includes first and second ports, a first switching device such as a contactor coupled between the ports, and a second switching device coupled in parallel with the contactor between the ports, where the second switching device can be or include a solid-state semiconductor device. The second switching device is operated to become conductive at a first time prior to a second time when the contactor switches between a conductive state and a non-conductive state, and remains conductive up to a third time subsequent to the second time. In at least some further embodiments, the apparatus also includes one or both of a voltage sensing capability and a current sensing capability and switches the second switching device to become conductive based upon voltage and/or current information.

Abstract: In the case of a protective device in a controller which contains at least one processor and is connected to a sensor via a sensor ground line and at least one further line, the invention provides that a ground in the controller is connected to the sensor ground line via a semiconductor switch which disconnects or connects the ground and the sensor ground line as a function of whether the current through the sensor ground line and/or the voltage between ground and the sensor ground line are/is in each case greater or less than a predetermined value, and that the voltage which is applied to ground or is applied to the sensor ground line can be applied to an internal ground, which is used for measurement purposes, controlled by the processor with the aid of two further semiconductor switches.

Abstract: A single state detector circuit can quickly detect short-circuit and open-circuit abnormalities of a load controlled by a power transistor. A DC power supply, the load and the power transistor are serially connected with one another, so that a switching terminal voltage of the power transistor is binarized into high and low levels by the state detector. The power transistor is linearly controlled by a constant-current control circuit so as to suppress an excessive current, and power supplied to the power transistor is interrupted by an overheat interruption circuit. Upon occurrence of a short-circuit in the load during generation of an energization command, a switching terminal voltage of the power transistor becomes stabilized at a high level without intermittent operation, which is detected by the state detector. Upon occurrence of an open-circuit during generation of a deenergization command, a low switching terminal voltage is detected by the state detector.

Abstract: A FET monitoring and protecting system (10) that includes a FET switch device (20). The FET switch device (20) includes a FET (22), a logic device (57), and a feedback status output (26). The logic device (57) is electrically coupled to the FET (22) and generates a feedback status signal. A counter (60) is incremented in response to an actual short circuit condition of the FET switch device (20). A controller (18) is electrically coupled to the feedback status output (26). The controller (18) permits the activation of the FET (22) in response to the feedback status signal and a value of the counter (60).

Abstract: A method for driving a semiconductor switch with load current limiting and thermal protection whose maximum load current is limited and which switches off when a predetermined upper temperature is exceeded and switches on again when a predetermined lower temperature is crossed. The semiconductor switch is operated in a normal mode and a fault mode. The semiconductor switch is driven in the fault mode once the predetermined temperature is exceeded; and the load current is limited to a first maximum value in a normal mode and a second maximum value, which is lower than the first maximum value, in a fault mode. Such a circuit configuration with a semiconductor switch has a protection circuit and a sensor circuit.

Abstract: A power switching circuit supplying electrical power to a load comprising a power MOSFET semiconductor switch having a gate electrode and two main current carrying electrodes and a back biased body zener diode, an active clamp for clamping a voltage between one of the main current carrying electrodes provided with a supply voltage and the gate electrode at a first specified voltage when the supply voltage increases beyond a predetermined voltage; and a circuit for disconnecting the active clamp when the supply voltage increases a predetermined amount above the predetermined voltage, allowing the body zener diode to avalanche at a second specified voltage that is greater than the first specified voltage thereby to clamp the voltage across the power semiconductor switch.

Abstract: A method of controlling a solid state power controller includes selectively allowing a transient current through a solid state power control switch in response to the transient current exceeding at least one threshold.

Abstract: A transistor is coupled to a load so that an input voltage is applied to the load therethrough. A comparator compares a load-side voltage of the transistor with a reference voltage. A control circuit is operable to deactivate the transistor when the comparator detects that the load-side voltage is lower than the reference voltage. The transistor is so configured as to operate in a non-saturated region when an overcurrent flows in the load, so that the load-side voltage thereof becomes lower than the reference voltage.

Abstract: In order to compensate fluctuation of the characteristics of a field effect transistor and detect capacitive change of a capacitive element for measurement with high precision, the electronic circuit of the present invention includes; a transistor outputting current in response to voltage change, which is supplied from a variable voltage source to a current control terminal by capacitive coupling via the capacitive element for measurement; and the constant current source to output reference current; and the current detection circuit to detect output current outputted from the transistor. After making the reference current pass through the transistor and compensating fluctuation of threshold voltage, a switching element is turned “OFF” so as to make the current path between the gate and the drain of the transistor to be non conductive.

Abstract: In an integrated circuit, a diode is interposed between the semiconductor substrate and the contact pad to an external bias voltage, and the substrate is biased at an internal voltage reference. Between each contact pad of the integrated circuit and semiconductor substrate, there is positioned a protection device against permanent overloads and a protection device against electrostatic discharges. By isolating the semiconductor substrate from the external voltages source and by placing a protection device between each contact pad and the substrate, a broad, general protection of the integrated circuit is obtained against all the destructive phenomena such as overloads, positive and negative overvoltages, polarity reversal and electrostatic discharges.

Abstract: The process for controlling an electronic power component for piloting an opening and/or closure of this component. The piloting process includes a plurality of steps for controlling the application of a succession of different commutation voltages on a control electrode of the electronic power component between an instant when the piloting process begins and an instant when either the opening or the closure of the electronic power component is to stop. Passage from one commutation voltage to a successive commutation voltage in this piloting process is automatically effected as soon as a corresponding condition of passage is satisfied. The process further includes a step of interrupting the piloting process and immediately triggering off a process for safeguarding the integrity of the electronic power component if the component does not react to a commutation voltage within a predetermined time for the commutation voltage.

Abstract: An electrical system includes a solid state relay (1) and an electrical connector (2) that connects solid state relay (1) to a load (4). The solid state relay (1) includes a power MOSFET (Q1) for switching power to the load (4). A PNP transistor (Q2) monitors the voltage drop across the power MOSFET (Q1), and shuts the power MOSFET off when the voltage drop exceeds a reference level. The solid state relay circuitry floats when the power MOSFET is commanded OFF so there is no leakage to ground. The relay (1) can be used with an electrical connector that includes a short pin (34) or shunt (16) that is disconnected before male and female terminals (12, 22) are unmated. Disconnection of the shunt (16) or the short pin (34) causes the power MOSFET to be commanded OFF so that there is no current flowing through the male and female terminals (12, 22) when they reach an arc susceptible position. The solid state relay (1) and the connector (2) are suitable for use in a 42 Volt automotive electrical system.

Abstract: A triac including on its front surface side an autonomous starting well of the first conductivity type containing a region of the second conductivity type arranged to divide it, in top view, into a first and a second well portion, the first portion being connected to a control terminal and the second portion being connected with said region to the main front surface terminal.

Abstract: In an overcurrent prevention system for a robot having links connected by joints and an electrical system including electric motors installed at the joint, a power circuit connecting the electric motors to a power source, and drive circuits to supply current to the electric motors, there are provided a switching device installed in the power circuit, a current sensor detecting the current supplied to the electric motors, and the output of the current sensor is compared with a threshold value and the switching device is operated to execute a switching action to cut off the power circuit intermittently during a first predetermined period when the output of the current sensor exceeds the threshold value, thereby protecting the electrical system when overcurrent is detected, without causing functional disablement and/or posture instability of the robot.

Abstract: An insulated gate bipolar transistor and a protective circuit are incorporated. The protective circuit has first and second Zener diodes connected in series in directions opposite to each other between the gate and the current sense terminal of the insulated gate bipolar transistor, and third and fourth Zener diodes connected in series in directions opposite to each other between the gate and the emitter of the insulated gate bipolar transistor.

Abstract: In one embodiment of the invention, a reverse phase control power switching circuit for controlling the flow of current through a load from an AC source comprises a sensing bridge in series with the load and the AC source. The conductive state of the sensing bridge is responsive to a pulse generator and a zero crossing detection and overload protection means. Phase control means coupled to the pulse generator determines turn off of the sensing bridge is reset by the zero crossing detection and overload protection means. Responsive to a load current condition exceeding a maximum current caused by an overload or a short, the zero crossing detection and overloading protection network terminates conduction of current through the sensing bridge. The sensing bridge starts conducting current to the load at the beginning of the AC cycle and continues to conduct to a desired AC voltage phase angle or earlier if an excessive current condition caused by an overload condition or a short occurs.

Abstract: Method for preventing a high voltage circuit form generating excessive high voltage, wherein the method comprises the following steps: a) reading a digital representation of a reference value associated with one of a plurality of operation modes stored in a memory; b) verifying the integrity of the representation of the reference value; c) providing a sensed signal representing the output voltage of the high voltage circuit; d) comparing the sensed signal with the reference value; e) inhibiting the generation of the high voltage output if the comparison in step (d) indicates excessive high voltage.

Abstract: A highly efficient line transient protection circuit is provided for high power loads that are designed to operate through a high line transient. The transient protection circuit for high power loads is provided with a primary leg circuit, a load circuit and a secondary circuit. The load circuit may be a switching regulator circuit, a load circuit containing an oscillator, a push-pull circuit, a boost converter circuit, a buck converter circuit or the like. The transient protection circuit is provided with a simple driver circuit to turn on a bypass n-channel MOSFET. It operates at a higher efficiency; I.E., conduction losses are minimized during normal input voltage conditions. Furthermore, the transient protection circuit provides a programmable voltage clamp which is implemented through selecting zener diode VR1. The transient protection may be used to protect medium to large current circuits from line transients.

Abstract: A selectively protected electrical system includes or operates with a power source, a load, a power driver circuit for controllably transferring power from the power source to the load, the power driver circuit being encapsulated in a potting material, and a controller for enabling and disabling the power driver circuit, the controller being un-encapsulated by the potting material. If a contaminant induced electrical fault occurs in the selectively protected electrical system, the electrical fault is more likely to occur in the un-encapsulated controller, such that the selectively protected electrical system is disabled. The contaminant is inhibited from contacting and inducing an electrical fault in the power driver circuit, thus providing for a controlled failure of the selectively protected electrical system.

Abstract: In an overcurrent protection circuit for a switching power supply having multiple voltage supply sections, an overcurrent in a low voltage supply section is detected to make it possible to take a countermeasure against overload in a transformer winding, using a simple and low cost circuit design. The circuit comprises: a current detection resistor 33 to detect a current in secondary side of the transformer; transistors 53 and 52 to be turned on by the current detection; a photocoupler 50 to be turned on and off by the transistors; and a switching power supply controller 7 to control on-duty of a power MOSFET 6 for removing the overcurrent. The current detection resistor 33 is provided in the line of a secondary winding 30 so as to be able to individually limit a current flowing through the secondary winding 30.

Abstract: A solid-state direct replacement relay assembly, and a method for installing and using it to replace the mechanical-style relays in the electrical cabinets of a locomotive. Solid-state relay components are substituted to upgrade locomotive relay systems, and to improve train controls. Normally solid-state relays cannot directly handle standard locomotive voltages without an external power supply that requires modification to the original train design and wiring. The solid-state relay assembly is coupled to a D.C./D.C. converter, which steps 75 volts down to approximately 5–32 volts, and is used to control the solid-state relay assembly. The use of the solid-state relay assembly device requires no modification to the existing electrical wiring system of any new or old locomotive.

Abstract: A substrate for mounting an electronic component, including a baseplate having a main surface formed with or without a recess. A ceramic substrate is provided on the main surface of the baseplate and has a smaller size than the baseplate. A metal layer is provided to cover both of the baseplate and the ceramic substrate. The metal layer has a surface remote from the baseplate and the ceramic substrate is made flat, the baseplate is made of a metal-ceramic composite of a metallic material and a ceramic material, and the metallic material in the composite and the metal layer have different compositions. Thereby, an integral ceramic circuit board, which is resistant to repeated thermal stress and is superior in reliability, can be realized.

Abstract: A load control device having a power control element connected in series to a series circuit of a load and an alternating power supply and a snubber circuit comprises suppressing means for suppressing current flowing through the snubber circuit when the load is not in operation and for suppressing current flowing through the snubber circuit during a predetermined period which begins when the power control element shifts from an ON state to an OFF state.

Abstract: A surge current prevention circuit and DC power supply for preventing surge current in various operation applications with a small circuit configuration. A power switch connects an external power supply and a load. A first PMOS transistor is connected to a constant current supply. A second PMOS transistor, which forms a current mirror, is connected to a first and second NMOS transistor. A third PMOS transistor is connected to the first and second NMOS transistor, a third NMOS transistor, and fourth and fifth NMOS transistors. A control input is connected to the third NMOS transistor. The first NMOS transistor is connected to the fourth NMOS transistor. An external power supply is connected to the second NMOS transistor. The load is connected to the fourth NMOS transistor.

Abstract: A power supply apparatus has a regulator and a regulator protection circuit. On detecting an abnormality, an abnormality detection circuit in the regulator protection circuit turns the regulator off. Based on the output of the abnormality detection circuit, an abnormality detection incidence checking circuit in the regulator protection circuit checks whether or not an abnormality has been detected a predetermined number of times within a predetermined length of time. When the abnormality detection incidence checking circuit recognizes that an abnormality has been detected the predetermined number of times within the predetermined length of time, an abnormality detection level setting circuit in the regulator protection circuit decreases the detection level of the abnormality detection circuit. This helps reduce the incidence of malfunctioning of the load to which the regulator feeds its output due to repeated detection of an abnormality and recovery therefrom.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A half-bridge circuit has first and second semiconductor switches, which have load paths connected in series and which are driven in dependence on an input signal that is applied to an input terminal. At least one first drive circuit is provided, which is connected to the control connection of the first semiconductor switch and which makes a first drive signal available. The first drive signal is dependent on the input signal and on a current from or to the control connection of the second semiconductor switch.

Abstract: A multi-output electric power source device has at least two channels for producing a constant voltage and a constant voltage from a single input voltage. Each channel is provided with a switching regulator in the input stages thereof and a series regulator in the next stage thereof. An over-heat detector circuit is provided in common for both channels. When the over-heating of either one of switching transistors in the channels is detected, the switching regulators turn off both switching transistors thereby to interrupt both output voltages from being supplied to an external circuit. When an over-voltage is detected, series regulators also interrupt the output voltages from being supplied to the external unit.

Abstract: An electronic fuse comprising an integrated circuit having a control output terminal coupled to a control electrode of a power semiconductor switching device, the power semiconductor switching device being coupled in series with a load between first and second potentials, the integrated circuit further comprising a current sense input for sensing the current through the power semiconductor switching device, the integrated circuit further comprising a driver circuit for driving the power semi-conductor switching device, the driver circuit being coupled to a current limiting circuit responsive to the sensed current in the power semiconductor switching device, the current limiting circuit controlling the driver circuit whereby if the current through the power semiconductor switching device exceeds a predetermined threshold, the current limiting circuit generates a command to pulse the power semiconductor switching device on and off in a period of pulsed operation to maintain the current in the power semiconducto

Abstract: A power supply clamp circuit for preventing damage to an integrated circuit due to electrostatic discharge. The power supply clamp circuit includes a voltage generator electrically connected to a first node for generating a voltage; a first PMOS transistor having a source electrically connected to the first voltage source, a gate electrically connected to the first node, and a drain electrically connected to a second node; a first NMOS transistor having a drain electrically connected to the second node, a gate electrically connected to the first node, and a source connected to ground; a second NMOS transistor having a drain electrically connected to the first voltage source, a gate electrically connected to the second node, and a source connected to ground; and a second PMOS transistor having a source electrically connected to the second node, a gate and a drain commonly electrically connected to the first node.

Abstract: A fault detection system detecting malfunctions or deteriorations, which may result in an inverter fault, is provided. The system has a temperature sensor installed on a semiconductor module to monitor a temperature rise rate. It is judged that an abnormal condition has occurred if the thermal resistance is increased by the deterioration of a soldering layer of the semiconductor module or by drive circuit malfunctions and, as a result, the relation between an operation mode and the temperature rise rate falls outside a predetermined range.

Abstract: A failure detecting device is provided, which includes the transistor for driving the excitation coil of the relay connected to the battery, the power supply monitors for monitoring an output of the relay, the EEPROM for storing failure presence or absence information, and the microcomputer for writing the failure presence or absence information in the EEPROM at the time of power OFF, reading the failure presence or absence information from the EEPROM at the time of power ON, and judging a failure state based on a voltage value detected by the power supply monitor in the case in which a failure is present.

Abstract: An electrostatic discharge (ESD) MOS transistor including a plurality of interleaved fingers, where the MOS transistor is formed in an I/O periphery of and integrated circuit (IC) for providing ESD protection for the IC. The MOS transistor includes a P-substrate and a Pwell disposed over the P-substrate. The plurality of interleaved fingers each include an N+ source region, an N+ drain region, and a gate region formed over a channel region disposed between the source and drain regions. Each source and drain includes a row of contacts that is shared by an adjacent finger, wherein each contact hole in each contact row has a distance to the gate region defined under minimum design rules for core functional elements of the IC. The Pwell forms a common parasitic bipolar junction transistor base for contemporaneously triggering each finger of the MOS transistor during an ESD event.

Abstract: A Vplex polling loop device is disclosed which can automatically detect and isolate shorted or overloaded sections of a polling loop, before or after polling loop power and signaling is switched to the output of the device, permitting normal operation of the remaining portion of the polling loop. The Vplex short and overload isolator (VSOI) is usable on former, existing, and future polling loop systems without the need for any software or hardware changes to the associated controls, and may also be used on 2-wire DC voltage distribution systems within the voltage and current limits of the VSOI. It is capable of multiple use anywhere on a polling loop while requiring minimum power from the polling loop. Finally, in the process of detecting and isolating a short or overload on its output, it prevents that short or overload from causing other VSOI devices on the loop to erroneously disconnect their protective branches of the loop.