With Semiconductor Circuit Interrupter (e.g., Scr, Triac, Tunnel Diode, Etc.) Patents (Class 361/100)
  • Patent number: 6342997
    Abstract: A temperature control circuit provides for optical isolation, dry start protection, dedicated load control, manual reset, and relay control in hot water heaters and related applications. The control circuit removes power from a load at a first temperature, and includes a first optical isolation device, a first diode temperature sensor, and a first switching mechanism. The first optical isolation device controls operation of a power source, where the power source is provided to the load, such as a hot water heater heating element. The first diode temperature sensor is biased to provide a switching signal at the first temperature. The first switching mechanism is disposed between the first diode temperature sensor and the first optical isolation device, where the first switching mechanism disengages operation of the first optical isolation device in response to the switching signal.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: January 29, 2002
    Assignee: Therm-O-Disc, Incorporated
    Inventors: Prasad S. Khadkikar, James A. Tennant, Bernd D. Zimmerman, David W. Reynolds, Thomas C. Anderson
  • Publication number: 20010053055
    Abstract: A monitor for detecting failures in the installation of neon gas sign transformers has an electronic circuit in the transformer compartment to turn the transformer off in the event any failure occurs. The monitor uses a programmed digital micro-controller connected to the transformer and supplies an exciting current to a “TRIAC” that turns on/off the primary coil of the transformer under an AC voltage of the distribution network and also supplies a current to turn on a red LED when failures occur and a green LED that indicates if any power is being fed from the distribution network. When the sign lights properly, the TRIAC is activated, the transformer remains activated and the red LED remains inactivated while the green LED remains activated. When there is any failure the monitor detects the failure immediately and the transformer is turned off and six seconds later it is automatically turned on again. If the cause of the failure disappears, the transformer continues operating regularly.
    Type: Application
    Filed: May 23, 2001
    Publication date: December 20, 2001
    Inventor: Jose Carlos Guedes
  • Patent number: 6320283
    Abstract: An advanced power switching apparatus that is suitable for use in spacecraft and provides miniaturization, weight reduction, and improved reliability of power switching and protection functions. The apparatus provides greatly increased functionality, and is capable of switching power, isolating faults, and limiting in-rush and fault currents. The apparatus comprises a plurality of power switching circuits.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: November 20, 2001
    Assignee: Lockheed Martin Corporation
    Inventors: Abbas A. Salim, James W. Jud, James F. Mulvey
  • Patent number: 6292341
    Abstract: A protection circuit of a diagnostic output line (K-line) of a control unit for protection of the control unit in the event of a ground disconnection or of a “below ground” condition is provided. The diagnostic output line includes a first interface DMOS transistor with a source connected to ground and a drain coupled to the diagnostic output line through a second DMOS transistor with a source connected to the output line and a drain connected to the source of the first DMOS transistor. The protection circuit also includes a comparator for the voltage of the diagnostic output line with the potential of the ground node, and a two-input logic gate, whose output controls a current generator forcing a current, limited by a resistor, on the diagnostic output line.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: September 18, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Milanesi, Stefania Chicca, Marco Morelli, Vanni Poletto
  • Patent number: 6271759
    Abstract: A system for controlling and monitoring operation of an electrical system is described. The system includes a fault protection device, for example, a circuit breaker, that is connected to the electrical system to provide fault isolation. The system also includes a protection system that includes an interface and a logic system connected to the electrical system. The logic system is connected to the interface and controlled by a processor to receive input from the electrical system and input from a user through the interface. The logic system operates the fault protection device when the received input from the electrical system indicates a fault event. Additionally, the logic system indicates information relating to operation of the electrical system through the interface.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: August 7, 2001
    Assignee: McGraw-Edison Company
    Inventors: David Weinbach, Henry W. Painchaud, Veselin Skendzic
  • Patent number: 6219214
    Abstract: A switching circuit protection technique includes detecting the self-firing of at least one switching element due to an over-voltage in a switching circuit having multiple parallel circuits, applying a firing pulse to all switching elements and the switching circuit in response to the detected self-firing and firing all of the switching elements at the same time in response to a firing pulse.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: April 17, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeo Kanai
  • Patent number: 6215634
    Abstract: A drive circuit for driving a power device is provided which includes a first ground that provides a current path of drive current that flows when the power device is driven, and a second ground that is used by a protection circuit that monitors an operating state of the power device.
    Type: Grant
    Filed: April 10, 1999
    Date of Patent: April 10, 2001
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 6201677
    Abstract: There is disclosed a semiconductor apparatus such as a power MOSFET, an IGBT, or the like having therein a control circuit such as an over-heating protection circuit and an over-current protection circuit, which realizes both of high-speed operation and prevention of erroneous operation caused by a parasitic device. In order to prevent erroneous operation of a power MOSFET 30 and a protection circuit 21 caused by a parasitic npn transistor 29 of an MOSFET 32, a control circuit 20 controls so that when the voltage of a gate terminal 2 is positive relative to that of a source terminal 3, a switch circuit SW3 is turned on, when the voltage of the gate terminal 2 is negative relative to that of the source terminal 3, a switch circuit SW2 is turned on, and when the gate terminal 2 and the source terminal 3 have an almost same potential and a drain terminal 1 has a high potential, the switch circuit SW2 is turned on.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: March 13, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kozo Sakamoto, Isao Yoshida
  • Patent number: 6178077
    Abstract: The switching functions of switching a load on and off in normal operation and in fault operation are implemented in a simple manner in an electronic branch circuit switch, which is advantageously made with silicon carbide semiconductor switching elements and has a potential-free control device, a device for detection and immediate shutoff in the event of a short-circuit, and a protection device for detection and shutoff against overload currents, as well as an overvoltage limiting device.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: January 23, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Peter Kaluza, Reinhard Maier, Heinz Mitlehner, Christian Schreckinger, Gerhard Schröther
  • Patent number: 6160696
    Abstract: An electrical power system includes an inverter having a plurality of insulated gate bipolar transistors (IGBTs) and capacitors for converting DC power to AC power and at least one power bus bar including an interconnecting bus bar and a plurality of extension bus bars. The area between the conductors of the interconnecting bus bar and the extension bus bars is minimized to reduce the inductance between the IGBTs and the capacitors. The extension bus bars are each coupled to the interconnecting bus bar and a respective one of the IGBTs and capacitors. An IGBT can be removed from the inverter without removing the interconnecting bus bar or any other IGBT. The capacitors can be positioned at ninety degree angles with respect to the interconnecting bus bar. In one embodiment, the IGBTs are additionally positioned at ninety degree angles with respect to the interconnecting bus bar. In an alternate embodiment, the IGBTs are positioned parallel with respect to the interconnecting bus bar.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: December 12, 2000
    Assignee: General Electric Company
    Inventors: Ronald Barry Bailey, Dimitrios Ioannidis
  • Patent number: 6104149
    Abstract: A simple, off-chip circuit and method for endowing high efficiency IGBTs with short-circuit capability, that is essentially transparent to the user. The invention involves adding an external common emitter resistor to reduce the effective gain of an IGBT under short circuit. Under normal operating conditions, the voltage across the resistor is small, such that the modifying effect on the normal operating gate-emitter voltage is almost negligible.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: August 15, 2000
    Assignee: International Rectifier Corp.
    Inventor: Brian R. Pelly
  • Patent number: 6081412
    Abstract: An output driver prevents gate oxide breakdown and reverse charge leakage from a bus to the internal power supply. When the voltage on the bus exceeds the internal supply voltage or when the driver is powered down, a reference voltage generator provides intermediate voltages to prevent the development of excessive gate-source, gate-drain, and gate-backgate voltages in the driver. An upper protection circuit and a lower protection circuit multiplex the intermediate voltages to ensure driver protection and proper operation. A buffering circuit turns off a buffering transistor to block charge leakage to the internal power supply when the bus voltage is greater than the internal power supply voltage. A logic protection circuit prevents the bus voltage from appearing at the control terminal of the driver.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: June 27, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Richard L. Duncan, Joseph D. Wert
  • Patent number: 6072681
    Abstract: The present invention provides a simple, low cost power line protection device and method suitable for protecting data bus and power lines such as in the USB (Universal Serial Bus) configurations and other power management circuits. In one embodiment of the invention, an improved protection device, controllable by a control circuit, for protecting a power line is provided. The device includes a switch for switching on and off power supplied on the power line, and a detector for detecting a fault condition, such as an overload condition, on the power line. The detector includes a positive temperature coefficient (PTC) resistor thermally coupled to the switch for causing the fault condition to be reported to the control circuit. In this way, when a fault condition occurs, the control circuit activates the switch to switch off power supplied on the power line.
    Type: Grant
    Filed: August 3, 1998
    Date of Patent: June 6, 2000
    Inventors: Adrian I. Cogan, Ram G. Bommakanti
  • Patent number: 6069520
    Abstract: A current mirror circuit includes an input transistor and an output transistor. A first bipolar transistor has a collector terminal connected to a predetermined reference portion of a current supply path of a power source and an emitter terminal connected to a collector terminal of the output transistor for absorbing an electrical potential difference between the reference portion and the collector terminal of the output transistor. A second bipolar transistor has a base terminal connected to the emitter terminal of the first bipolar transistor and a collector terminal connected to a base terminal of the first bipolar transistor for fixing an electrical potential of the collector terminal of the output transistor to a base-emitter voltage of the second bipolar transistor.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: May 30, 2000
    Assignee: Denso Corporation
    Inventors: Tomohisa Yamamoto, Hiroyuki Ban
  • Patent number: 6061221
    Abstract: The electrical switch component has two temperature sensors. The first temperature sensor is provided at that location of the component which is warmest during operation. The first sensor switches the component off when a first, upper threshold value is reached, and switches the component on when the temperature falls below a second, lower threshold value. The oscillation owing to the first temperature sensor is switched on and off by the second temperature sensor, which is arranged remote from the first temperature sensor at a location that is less warm than the first temperature sensor. The second sensor has lower threshold values than the first temperature sensor.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: May 9, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jenoe Tihanyi
  • Patent number: 6021036
    Abstract: A method and a device for controlling a switching operation consisting of a turn on or a turn off operation in a voltage controlled power transistor is provided. At least one current source is arranged at the control electrode of the power transistor. The at least one current source controls the recharging of at least one of the capacitances which occurs between the control electrode of the power transistor and the main electrode of the power transistor to determine the time rate of change of at least one of the voltage and current.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: February 1, 2000
    Assignee: ABB Research Ltd.
    Inventors: Bo Bijlenga, Peter Lundberg, Anders Persson, Lennart Zdansky
  • Patent number: 6008972
    Abstract: A short circuit protection circuit which has a first short circuit protection circuit in parallel with a second short circuit protection circuit is disclosed. The first short circuit protection circuit includes a sense resistor and a comparator for detecting the short circuit, and a transistor and current source for turning off the low side driver when the short circuit is detected. The second short circuit protection circuit includes a current mirror, zener diode, transistor, and current source connected in series. The second short circuit protection circuit is in parallel with the first short circuit protection circuit. The second short circuit protection circuit accelerates the turn-off of the low-side driver with out affecting the stability of the circuit.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: December 28, 1999
    Assignee: STMicroelectronics, Inc.
    Inventor: Giovanni Pietrobon
  • Patent number: 6002566
    Abstract: An overcurrent protective circuit includes a N-type depletion mode FET, a P-type depletion mode FET, and a switch. The sources of the N-type depletion mode FET and the P-type depletion mode FET are connected to each other. The gate of the N-type depletion mode FET is connected through a resistor to the drain of the P-type depletion mode FET. The gate of the P-type depletion mode FET is connected through a resistor to the drain of the N-type depletion mode FET. The drain of the N-type depletion mode FET is a positive external terminal of the circuit, while the drain of P-type depletion mode FET is a negative external terminal of the circuit. A switch electrically connects and disconnects between the gate of the N-type depletion mode FET and the gate of the P-type depletion mode FET.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: December 14, 1999
    Assignee: SOC Corporation
    Inventors: Hiroo Arikawa, Masaya Maruo
  • Patent number: 5986866
    Abstract: A self-powered multiple phase circuit protection device including a plurality of current transformers connected in parallel with each other and associated with one phase of a multiple phase load for providing signals representative of the current flowing in an associated phase. A first switch can be actuated to interrupt power to the multiple phase load, and a fault determining circuit is connected to the circuit transformers and to the first switch for actuating the switch during at least one predetermined condition of the current signals. A second switch can be automatically actuated to reconnect power to the multiple phase load. The fault determining circuit has a timer for delaying the actuation of the first switch, and a warning signal can be issued prior to actuation of the first switch so that the user can take corrective action.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: November 16, 1999
    Assignee: Siemens Energy & Automation, Inc.
    Inventor: Daniel Zuzuly
  • Patent number: 5982594
    Abstract: An intrinsically safe power supply unit is provided for conditioning power supplied by a power source. An input power converter connected to the power source receives current from the power source. A direct output crowbar and discrete impedance elements dissipate and limit the energy in the power supply unit that would otherwise be delivered to an external fault. In addition, the direct output crowbar extracts energy from any external storage elements. An adaptive shut down circuit distinguishes nominal load conditions including load changes from an external fault. A multistage LC power filter is used to minimize the stored energy that would be deliverable to an external fault or dissipated by the direct output crowbar and discrete impedance elements. The combination of the direct output crowbar, discrete impedance elements, adaptive shut down detection circuitry and multistage LC power filter significantly improves the level and quality of intrinsically safe power delivered by the power supply unit.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: November 9, 1999
    Assignee: KH Controls, Inc.
    Inventor: Kevin M. Huczko
  • Patent number: 5977596
    Abstract: An input protection device is presented having a depletion controlled isolation stage. In one embodiment of the invention, a depletion controlled isolation resistor is formed between adjacent N+ diffused regions by N-well diffusion. One N+ diffused region electrically contacts an input bond pad and a primary protective device. The other N+ diffused region electrically contacts a second protective device and the internal circuit it is to protect. The depletion controlled isolation resistor limits the amount of current passing through the resistor to a safe level during an over-voltage condition. In another embodiment of the invention, a depletion controlled isolation stage includes a silicon controlled rectifier (SCR) as the primary protective device in combination with the depletion controlled isolation resistor.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: November 2, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Robert Rountree, Charvaka Duvvury, Tatsuroh Maki
  • Patent number: 5926354
    Abstract: A current interruption circuit for interrupting current flow from a source of DC power to a load includes: an electronically controllable primary switch device adapted to be series coupled between the DC power source and the load, the primary switch device having a voltage thereacross which is proportional to a current flowing therethrough when biased in an on state. The circuit also includes a voltage sensing circuit adapted to sense the voltage across the primary switch device and produce a control signal in response thereto; and a gate drive circuit adapted to receive the control signal and bias the primary switch in an off state when the control signal indicates that the voltage across the primary switch has exceeded a predetermined value.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: July 20, 1999
    Assignee: International Rectifier Corporation
    Inventor: Ray J. King
  • Patent number: 5912794
    Abstract: An abnormality detection and protection circuit is provided in association with a driving circuit for a semiconductor device, for detecting plural types of abnormalities and protecting the device from the abnormalities. The present circuit includes a plurality of abnormality detecting devices for detecting the plural types of abnormalities, respectively, a plurality of abnormality storage circuits each provided for the corresponding abnormality detecting devices for storing occurrence of the corresponding type of abnormality, and an abnormality transmitting circuit that transmits a signal representing the detected type of the abnormality to an overall control system for controlling a plurality of semiconductor devices.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: June 15, 1999
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Hiroaki Ichikawa
  • Patent number: 5903422
    Abstract: An overcurrent sensing circuit for sensing an overcurrent flowing through a power MOS transistor is described. A voltage drop equal to the voltage across the drain and source of a power MOS transistor that changes due to change in a load current is generated in a sensing resistor that is connected between the source of a sensing MOS transistor having its gate and drain connected in common with those of the power MOS transistor and the source of the power MOS transistor due to current that flows through the sensing MOS transistor. This voltage is inputted to a comparator that has an added offset voltage, and the comparator judges that the power MOS transistor is in an overcurrent condition when this inputted voltage exceeds an input offset voltage value that is set inside the comparator.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: May 11, 1999
    Assignee: NEC Corporation
    Inventor: Akio Hosokawa
  • Patent number: 5898557
    Abstract: To turn on or off semiconductor switches based on the current-duration product of a current flowing through them, the device of the present invention detects an ambient temperature of the harness and, based on thus detected ambient temperature, corrects a detected current value to compare the current-duration product of thus corrected current value to the threshold data, so that if that product value equals or exceeds that threshold data value, the semiconductor switches are turned off, thus avoiding the affection due to the heat from the engines or the semiconductor switches to effectively prevent the harness from fuming.
    Type: Grant
    Filed: July 28, 1997
    Date of Patent: April 27, 1999
    Assignee: Yazaki Corporation
    Inventors: Akira Baba, Hiroo Yabe, Takaaki Izawa
  • Patent number: 5894394
    Abstract: First threshold corresponding to a large electric current capable of breaking a MOS-FET even if the electric current flows even in a short period is provided for a difference amplifying circuit and second threshold lower than the first threshold is stored in a memory. If a detected electric current value is higher than the first threshold or if a CPU determines that an electric current higher than the second threshold has flowed continuously for a period longer than a predetermined period, the semiconductor switch is switched off.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: April 13, 1999
    Assignee: Yazaki Corporation
    Inventors: Akira Baba, Hiroo Yabe
  • Patent number: 5859757
    Abstract: An output transistor supplies a current based on a drive current to a load. An output voltage is divided by a feedback voltage, and an error amplifier outputs a voltage according to a difference in feedback voltage. Furthermore, the base drive circuit controls a drive current of the output transistor according to an output voltage of the error amplifier. The drive current flows into GND via only the drive current detecting resistor. The short-circuit overcurrent protecting circuit detects an overcurrent based on a terminal based voltage of the drive current detecting resistor, and detects an occurrence of a short circuit by observing a feedback voltage. According to the described arrangement, as the need of the short-circuit detection-use transistor to be biased by the drive current can be eliminated, variations in output voltage of the error amplifier can be suppressed, and improved transient response characteristics can be achieved.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: January 12, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koichi Hanafusa, Akio Nakajima
  • Patent number: 5844326
    Abstract: A managed electrical outlet includes a plurality of electrical receptacles, a current sensor, logic circuitry, a switch driver, and one or more switches. The electrical current provided to the managed electrical outlet is measured by the current sensor, which in turn sends an electrical signal to the logic circuit, representative of the amount of electrical current flowing through the outlet. The logic circuit compares the level of current flowing through the outlet with a reference current level to determine whether an over-current state exists. If the logic circuit determines the presence of an over-current state, the logic circuit sends a signal to the switch driver, causing the switch driver to trigger the switch into an open-circuit condition. In a two-receptacle outlet, one of the two receptacles is coupled to the switch while the other receptacle is unmanaged.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: December 1, 1998
    Assignee: Cruising Equipment Company, Inc.
    Inventors: Richard L. Proctor, Scott R. Schaper
  • Patent number: 5838043
    Abstract: A circuit for protecting a bonding pad of a semiconductor device from ESD voltages is located under the pad to permit the space otherwise used for a protection circuit to be used for normal operating components. The protection circuit has a compact layout that provides maximum ability to handle an ESD current within this limited space. The semiconductor structure for the circuit has separate parts for two SCR circuits, one for each polarity of ESD current. Each SCR circuit comprises two symmetrical SCR structures.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: November 17, 1998
    Assignee: United Microelectronics Corp.
    Inventor: Lee Chung Yuan
  • Patent number: 5831807
    Abstract: An overcurrent and short circuit protection device for a power semiconductor component is responsive to output current signals representing the actual output current(s) of the semiconductor component. A short-circuit window comparator receives the output current signals and produces an error signal when the sum of all output current signals is less than a minimum allowable value or more than a maximum allowable value. An overcurrent window comparator receives the same output current signals, determines a positive maximum instantaneous value and a negative maximum instantaneous value, and produces an error signal when either one of these exceeds a maximum allowable value. An error signal from either window comparator interrupts operation of the power semiconductor component and locks out all higher level control signals to the power semiconductor component.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: November 3, 1998
    Assignee: Semikron Elektronik GmbH
    Inventors: Juergen Masannek, Ernst Schimanek
  • Patent number: 5828539
    Abstract: A method and a device for control of a switching operation consisting of a turn-on or turn-off operation in a voltage-controlled power transistor (T1), wherein at least one current source (S1, S2) is arranged at the control electrode (G) of the power transistor for controlling the recharging of at least one of the capacitances which occurs between the control electrode (G) of the power transistor and the main electrodes (C, E) of the power transistor and thus to determine the time rate of change of at least one of the quantities voltage and current.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: October 27, 1998
    Assignee: ABB Research Ltd.
    Inventors: Bo Bijlenga, Peter Lundberg, Anders Persson, Lennart Zdansky
  • Patent number: 5818669
    Abstract: A circuit that utilizes a Zener diode to protect elements of a circuit from an over-voltage condition. When a fault occurs, causing an over-voltage condition, the voltage applied to the elements of the circuit is limited by the Zener diode. In addition, the circuit senses the over-voltage condition. Upon sensing the over-voltage condition, the circuit gradually reduces the power applied to that portion of the circuit to a minimum level. If the over-voltage condition persists for a predetermined amount of time, power is shut down to that portion of the circuit until the circuit is re-started. Because the amount of time that an over-voltage condition may occur is limited, the Zener diode may have a lower power rating than would otherwise be required. This is because the power dissipation capabilities of a Zener diode conducting current under a reverse bias are greater when the reverse bias is of a short duration than when the reverse bias is of a long duration.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: October 6, 1998
    Assignee: Micro Linear Corporation
    Inventor: Urs H. Mader
  • Patent number: 5815387
    Abstract: A power converter protective apparatus for protecting an AC-DC converter against an excess fault current by preventing the fault current of a power system from flowing into the AC-DC converter. The protective apparatus comprises a series transformer, whose primary winding is connected in series with a power system and whose secondary winding is connected to a voltage-type AC-DC converter, first current bypass means of a normally open-type connected in parallel with the primary winding, a current transformer for detecting a fault current in the power system, and a control unit for outputting a bypass control signal to the first current bypass means when the current transformer detects the fault current, whereby when the fault in the power system is detected, a fault current flowing through the primary winding is bypassed by the first current bypass means.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: September 29, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tomohiko Aritsuka
  • Patent number: 5786973
    Abstract: A semiconductor power module is configured to prevent concentration of load in a certain semiconductor power switching element. A diagnosis circuit (PC) of a module (10a or 10b) compares a sensing signal (SSE) for example, which is sent out from a sensing circuit (Se) and is proportional to the collector current of an IGBT element, with a reference voltage, and judges presence or absence of abnormality in the collector current. If abnormal, a shutdown signal (S.sub.SD) is sent out to a shutdown circuit (SD), and the IGBT element is cut off, and simultaneously an abnormality detection signal (S.sub.F01 or S.sub.F02) is sent out to the other module (10b or 10a). The diagnosis circuit (PC of the module (10b or 10a) receives the abnormality detection signal (S.sub.F01 or S.sub.F02), and sends out the shutdown signal (S.sub.SD) to the shutdown circuit (SD), thereby shutting down the IGBT element. Since the transmission timing of both shutdown signals (S.sub.
    Type: Grant
    Filed: April 9, 1996
    Date of Patent: July 28, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Takashi Marumo
  • Patent number: 5783999
    Abstract: A novel line-current protection circuit that is useable with a PCMCIA modem card is disclosed. The protection circuit is adapted to detect when an excessive voltage is present across the tip and the ring leads of a telephone subscriber loop by sensing the amount of line-current being supplied to line interface circuitry disposed on the PCMCIA modem card. The protection circuit includes a current sensing circuit portion that is placed in series with the tip lead and which detects when the line current exceeds a predetermined maximum amount. In the event the line current exceeds the maximum amount, the current sensing circuit asserts an excessive line current signal which is being monitored by a digital processor. The digital processor responds by causing a relay circuit to be opened, thereby causing the PCMCIA modem to be in an "on-hook" state.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: July 21, 1998
    Assignee: U.S. Robotice Mobile Communications Corp.
    Inventors: Tim Urry Price, Mark Lyle Gray, Paul Nagel
  • Patent number: 5774319
    Abstract: A self-powered circuit interrupter arrangement for interrupting current in a circuit path uses a current-blocking component to ensure that an insufficient amount of accumulated power for actuating and completing interruption of the circuit path is not misused in an unwarranted attempt to interrupt the current path. The arrangement includes a current inducer circuit for providing a current signal having a magnitude corresponding to the current in the circuit path and a power supply operating from the current signal to provide a voltage signal of a predetermined value relative to common. A trip command circuit, in response to a fault detected in the circuit path, sends an electrical signal commanding that the circuit path be interrupted by using the voltage signal. The electrical signal is sent to an electrical latch located electrically in series with a coil of a solenoid mechanism.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: June 30, 1998
    Assignee: Square D Company
    Inventors: Michael Baron Carter, Roger Alan Plemmons, Barry Noel Rodgers, Timothy Brian Phillips, George Marshall Horne
  • Patent number: 5767537
    Abstract: An SCR circuit formed on a semiconductor substrate includes a well region, a first diffusion region and a second diffusion region in the well region, and a third diffusion region in the substrate. The SCR circuit also includes a capacitor connected between the first diffusion region and the third diffusion region. The junction region between the well region and the diffusion region is forward biased when an electrostatic force is applied to the SCR circuit, thereby triggering the SCR circuit to discharge the electrostatic force.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: June 16, 1998
    Assignee: Winbond Electronics Corp.
    Inventors: Ta-Lee Yu, Konrad Kwang-Leei Young
  • Patent number: 5764466
    Abstract: A power circuit includes a high-side transistor, a low-side transistor and a current sensing resistor in series connection as well as a threshold detection circuit for turning off the transistors when the current in the current sensing resistor exceeds a predetermined level. The circuit further includes a driver circuit for providing a bias voltage to the low-side transistor and a voltage storing device, such as a capacitor, coupled from the low-side transistor to the driver circuit to maintain the bias voltage at a sufficient magnitude to momentarily keep the low-side transistor on during a fault condition.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: June 9, 1998
    Assignee: International Rectifier Corporation
    Inventors: Vijay Mangtani, Ajit Dubhashi
  • Patent number: 5751051
    Abstract: A semiconductor device has a semiconductor chip which is divided into a plurality of separate regions. In each of these regions, there are provided a plurality of common discharge lines which are independent from one another, a plurality of first bonding pads which are connected directly to the respective common discharge lines, a plurality of second bonding pads which are not connected directly to the common discharge lines, a plurality of protective elements which are connected between the second bonding pads and the common discharge lines, and an inner lead for discharging which is directly connected to the first bonding pads and is bonded to a surface of the semiconductor chip. In all embodiments of the invention. More than one common discharge line is provided. This arrangement permits the reduction of the chip area thus enhancing design freedom and improving electrostatic breakdown characteristics.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: May 12, 1998
    Assignee: NEC Corporation
    Inventor: Kiminori Hayano
  • Patent number: 5739712
    Abstract: An amplifying circuit has an amplifying section including an operational amplifier for receiving an input signal and a power transistor for receiving the output of the operational amplifier to drive a load resistor. The amplifying circuit further has an over-current protective section including a current detection transistor receiving the output signal of the operational amplifier and a comparator comparing the output voltage of the current detection transistor and a reference voltage to supply a control signal to the operational amplifier when the output level representing the load current for the load resistor exceeds a threshold. The source of the power transistor and the source of the current detection transistor are maintained at the same potential by connecting both the sources or by providing a feedback section. A wide range of the voltage signal and an accurate threshold for the load current can be obtained.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: April 14, 1998
    Assignee: NEC Corporation
    Inventor: Takashi Fujii
  • Patent number: 5726850
    Abstract: An electrical heating apparatus comprising a controller, fail safe protection circuit and resistance heating body embedded in a comfort device. The fail safe protection circuit is constructed to detect a break or short circuit in either of the conductors of a PTC type resistance heating body thereby shutting off the comfort device for preventing injury to the user and possible fires.
    Type: Grant
    Filed: July 24, 1996
    Date of Patent: March 10, 1998
    Inventor: William M. Rowe, Jr.
  • Patent number: 5696660
    Abstract: A novel line-current protection circuit that is useable with a PCMCIA modem card is disclosed. The protection circuit is adapted to detect when an excessive voltage is present across the tip and the ring leads of a telephone subscriber loop by sensing the amount of line-current being supplied to line interface circuitry disposed on the PCMCIA modem card. The protection circuit includes a current sensing circuit portion that is placed in series with the tip lead and which detects when the line current exceeds a predetermined maximum amount. In the event the line current exceeds the maximum amount, the current sensing circuit asserts an excessive line current signal which is being monitored by a digital processor. The digital processor responds by causing a relay circuit to be opened, thereby causing the PCMCIA modem to be in an "on-hook" state.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: December 9, 1997
    Inventor: Tim Urry Price
  • Patent number: 5696658
    Abstract: A short circuit protection circuit which has a first short circuit protection circuit in parallel with a second short circuit protection circuit is disclosed. The first short circuit protection circuit includes a sense resistor and a comparator for detecting the short circuit, and a transistor and current source for turning off the low side driver when the short circuit is detected. The second short circuit protection circuit includes a current mirror, zener diode, transistor, and current source connected in series. The second short circuit protection circuit is in parallel with the first short circuit protection circuit. The second short circuit protection circuit accelerates the turn-off of the low-side driver with out affecting the stability of the circuit.
    Type: Grant
    Filed: October 5, 1995
    Date of Patent: December 9, 1997
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Giovanni Pietrobon
  • Patent number: 5684663
    Abstract: A protection element (10) protects a battery pack (36) from potential faulty conditions in a load (38). The protection element (10) includes a switch (12), a control FET (14), and three resistors (16, 18, and 22). Under normal operating conditions, the switch (12) is conductive and the control FET (14) is non-conductive. If a short circuit is detected, the controller (14) becomes conductive and turns off the switch (12). The switch (12) remains non-conductive until the load (38) is disconnected from the protection element (10). The protection element (10) further includes a temperature sensor (24) that turns off the switch (12) at high temperatures and a current limiting element (28) that imposes an upper limit on the current flowing through the protection element (10). Control signals can be applied to the gate electrodes of the switch (12) and the control FET (14) to modulate the current in the protection element (10).
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: November 4, 1997
    Assignee: Motorola, Inc.
    Inventor: Chang Su Mitter
  • Patent number: 5680286
    Abstract: Apparatus for detecting certain load fault conditions of gaseous luminous tube loads connected to high voltage, high frequency power supplies including open-circuit, broken tube and other balanced load fault conditions. The detector includes a filter for emphasizing the harmonic content of the power supply output, an attenuator, a comparator or other detector/threshold device, and a delay circuit. A power supply shut-down switch may be included or the present fault detector may be interconnected to shut-down switch of a conventional ground fault interrupter. In one embodiment the filter and attenuator and, in another, the filter, attenuator, and delay circuit employ common components and may include a filter/attenuator capacitor defined by placement of metalization on the high frequency power supply transformer adjacent a high voltage output lead.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: October 21, 1997
    Assignee: Everbrite, Inc
    Inventor: David Pacholok
  • Patent number: 5670799
    Abstract: A high voltage protection circuit includes breakdown networks for providing a discharge path between a pair of terminals of a circuit to be protected. Each network conducts current between a supply terminal and another terminal at a low threshold voltage value when power is removed from the supply terminal. The network increases the threshold value when power is applied to the supply terminal to prevent conduction through the breakdown network during normal operation of the circuit to be protected. In one implementation, the protection circuit includes anti-latching circuitry connected to the breakdown network for preventing the breakdown network from latching on after or during the time power is applied to the supply terminals. To minimize the degradation of DC operating characteristics, the leakage currents, due to the protection circuit, between the first terminal and the positive supply terminal, and between the first terminal and the negative supply terminal cancel each other.
    Type: Grant
    Filed: August 26, 1994
    Date of Patent: September 23, 1997
    Assignee: Harris Corporation
    Inventor: Gregg D. Croft
  • Patent number: 5657195
    Abstract: An overcurrent protection device designed to be connected in series between a load and an electric supply includes a switch which is controlled by a voltage present across a current limiting device. The switch is formed by a GTO thyristor connected in series with the current limiting device. The output of the current limiting device is connected to the load.
    Type: Grant
    Filed: April 12, 1995
    Date of Patent: August 12, 1997
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Pierre Rault
  • Patent number: 5654859
    Abstract: A power distribution circuit is provided that isolates both power source and load faults. In one embodiment, the power distribution circuit includes two power MOSFETs connected with the channels of the power MOSFETs in series and having their gates electrically connected together. The body diode of one power MOSFET is aligned with the opposite polarity with respect to polarity of the body diode of the second power MOSFET. The power MOSFETs are adapted to be coupled between a first power source and a load. The power distribution circuit also includes a first sensor that detects when the power MOSFETs conduct too much current and switches the power MOSFETs off by discharging the gate voltage of both power MOSFETs during such overcurrent conditions. Accordingly, when both power MOSFETs are switched off, the opposing polarity of the body diodes in the power MOSFETs ensures that one of the body diodes will be reversed biased in case of a short circuit failure in either the load or the power source.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: August 5, 1997
    Assignee: The Boeing Company
    Inventor: Fong Shi
  • Patent number: 5650901
    Abstract: A circuit breaker for a distribution system includes a non-self-extinction type semiconductor switch, a current limiting element connected in series to the semiconductor switch for suppressing a fault current. The semiconductor switch and the current limiting element constitute a series circuit. A mechanical type high-speed switch is connected in parallel to the series circuit of the semiconductor switch and the current limiting element. Upon occurrence of a fault in the distribution system, an electric current flowing through the distribution system is commutated to the series circuit from the mechanical type high-speed switch.
    Type: Grant
    Filed: January 22, 1996
    Date of Patent: July 22, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroshi Yamamoto
  • Patent number: 5640300
    Abstract: A circuit and method for interrupting an AC load current includes a first MOS Controlled Thyristor (MCT) for selectively interrupting the load current. The current through the first MCT is reduced when the load current is to be interrupted by providing a pulse resonant commutation (PRC) current through the first MCT which flows in a direction opposed to the AC load current direction and which has a magnitude reducing the current through the first MCT to an MCT "off" condition (e.g., when a voltage across the MCT is reversed, when there is near zero current through the MCT, or when a current is within the MCT's SOA.) The first MCT turns itself off when MCT gate voltage is an "on" voltage and when reverse voltage is across the MCT. An MCT "off" voltage may then be provided by sensing MCT current and providing an "off" voltage to the MCT gate when the sensed current indicates that the MCT is an "off" condition.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: June 17, 1997
    Assignee: Harris Corporation
    Inventor: James K. Azotea