With Semiconductor Circuit Interrupter (e.g., Scr, Triac, Tunnel Diode, Etc.) Patents (Class 361/100)
  • Patent number: 6690559
    Abstract: There is provided a charge/discharge type power supply that includes a MOS transistor (normally called “four-terminal MOS transistor”) of which a source, a drain, a gate and a body are separated from each other as a switching element that controls both of the charge operation and the discharge operation, and provides a charge/discharge control circuit with a function of controlling the charge/discharge operation in accordance with a voltage of a secondary battery, a function of detecting a voltage that varies in accordance with a current that flows in the switching elements to control the charge/discharge operation, and a function of recognizing whether a charger or a load is connected to an external connection terminal to control the charge/discharge operation; wherein one signal line is used for controlling the on/off operation of the switching element, and both of the charge operation and the discharge operation can be controlled without any diode.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: February 10, 2004
    Assignee: Seiko Instruments Inc.
    Inventor: Shinichi Yoshida
  • Publication number: 20040008464
    Abstract: A fail open circuit that includes a controllable switch coupling a power source to a load. Control circuitry is provided that determines if the switch is in the proper conduction state based on a switch control signal and a signal indicative of power delivered to the load. If the switch is determined as improperly closed (conducting), the control circuitry diverts energy delivered to the load through fuse circuitry, thereby blowing a fuse and decoupling the load from the power source. In preferred embodiments, logic circuitry determines the relative states of the control switch and the load and generates a control signal to divert energy away from the load and blow a fuse.
    Type: Application
    Filed: February 19, 2003
    Publication date: January 15, 2004
    Inventor: Frederick Jerome Potter
  • Patent number: 6678129
    Abstract: The protection circuit comprises a clamping circuit with a switching element for reducing a supply voltage in case of an over voltage condition, and a holding circuit for providing a holding current for the clamping circuit. The clamping circuit comprises a threshold circuit, which provides a switching voltage for a switching element when the supply voltage reaches an upper voltage limit. The switching element is connected to a charge capacitor, which provides the switching-on voltage for the switching transistor, and by reducing this supply voltage, the switching of the switching transistor is disabled. The holding circuit comprises in particular a capacitor, which is coupled via a resistor to the clamping circuit for providing an additional current in case of an over voltage condition.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: January 13, 2004
    Assignee: Thomson Licensing S.A.
    Inventors: Kian Meng Koh, Seng Huat Ng, Kum Yoong Zee
  • Publication number: 20030223171
    Abstract: The instantaneous overcurrent element, used in a microprocessor-based protective relay for a power system, includes a finite impulse response filter which generally is a cosine filter and is responsive to the current waveform from the current transformer for fault determination unless the distortion in the current reaches a preselected threshold, at which point a peak detector circuit is used to provide the current magnitude values for fault determination.
    Type: Application
    Filed: May 31, 2002
    Publication date: December 4, 2003
    Inventors: Gabriel Benmouyal, Stanley E. Zocholl, Armando Guzman-Casillas
  • Patent number: 6657841
    Abstract: A circuit arrangement for overvoltage protection of a power transistor for controlling an inductive load includes a first varistor which bridges-over the supply connections. A second varistor is arranged parallel in relation to the switching path of the power transistor and in series with a switching transistor. The switching transistor can be controlled by a voltage divider which is connected to the supply voltage via a Zener diode.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: December 2, 2003
    Assignee: Moeller GmbH
    Inventors: Wilhelm Melchert, Gerd Schmitz
  • Publication number: 20030218847
    Abstract: The relay system of the present invention comprises a field effect device such as a MOSFET and a microprocessor that controls the on and off states of the field effect transistor. The processor monitors the current supplied to the field effect device and open circuits the device if the current exceeds a selected value. Importantly, the present invention uses a field effect device and microprocessor, as opposed to contacts, a coil and a downstream circuit breaker like conventional electromechanical relays. Unlike an electromechanical relay, the solid state relay is free of problems that arise from having mechanical parts. The solid state relay fuse is free of arcing, sparking, and there are no contact materials that can wear out or generate noise. Because of the use of a microprocessor, the solid state relay has a faster switching speed, and there are no switching voltage spikes from turning on a coil.
    Type: Application
    Filed: January 28, 2003
    Publication date: November 27, 2003
    Applicant: Vehicle Enhancement Systems, Inc.
    Inventors: Alan C. Lesesky, Bobby Ray Weant
  • Publication number: 20030218848
    Abstract: A control method and arrangement that monitors the condition and operating parameters of a power electronic system having power electronic devices and responds to various detected abnormalities to optimize operation of the power electronic system. The arrangement increases reliability of operation and optimizes the continuous supply of power to a load. The arrangement also includes the capability for diagnosing the parameters of the power electronic switches including drive current, drive voltage and operating temperature and for communicating the status information in a coordinated fashion.
    Type: Application
    Filed: March 19, 2003
    Publication date: November 27, 2003
    Inventors: Todd W. Klippel, Richard P. Mikosz, Ronald D. Atanus, Michael G. Ennis, Raymond P. O'Leary, Joseph W. Ruta, Gregory C. Mears
  • Publication number: 20030214770
    Abstract: Dynamic thresholds for power circuit switch operation are calculated in real-time using instantaneous operating parameter measurements. The dynamic thresholds are self-adapting and are used to provide shutdown criteria independent of switch control systems. A characteristics field containing information related to operation parameters is used to make overload evaluations in real-time. These dynamic overload evaluations allow complete protection against thermal overload for entire power circuits in addition to power components. Reserve load capacity can also be determined based on well known component characteristics, which permits the power circuit to be driven at optimal efficiency. The power circuit output profile can also be modified in response to dynamic overload evaluation, thus preventing overload shutdown or damage to components, while operating at optimal efficiency.
    Type: Application
    Filed: April 10, 2003
    Publication date: November 20, 2003
    Applicant: SEMIKRON ELEKTRONIK GMBH
    Inventors: Ernst Schimanek, Markus Billmann
  • Patent number: 6650522
    Abstract: Because a semiconductor relay system of this invention comprises an across-element voltage detecting circuit 116 which delivers an across-element voltage detection signal depending on the presence/absence of an across-element voltage exceeding a predetermined threshold; an element driving circuit 112 for delivering an element driving signal in response to a control input signal; a logic-based judgement circuit 119 for delivering a logic-based judgement signal depending on the presence/absence of an across-element voltage detection signal; and a filtration circuit for removing a logic-based judgement signal of external disturbing elements to produce an element safety check signal, it is possible to reliably detect the disorder of a triac 114.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: November 18, 2003
    Assignee: Omron Corporation
    Inventors: Kenji Horibata, Teruyuki Nakayama, Toshiyuki Nakamura, Takaaki Yamada, Yuji Hashimoto, Kazuhiro Harada
  • Publication number: 20030210504
    Abstract: A boost-type switching power device which obtains a dc output by connecting a rectifying diode to the output side of an inductance element, connected in series to a main switching element, the device including: a control circuit which controls the operation of the main switching element by using a feedback signal in accordance with the dc output; and a constant-current circuit comprising a plurality of active elements, which are provided between the the rectifying diode and the output terminal; and wherein, when there is an overload on the output side, the operation of the active elements comprising the constant-current circuit controls the control circuit, switching the main switching element off and thereby stopping the boost function, and, in addition, the output is controlled by the constant-current circuit.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 13, 2003
    Applicant: Toko Kabushiki Kaisha
    Inventor: Tetsushi Otake
  • Publication number: 20030202313
    Abstract: A voltage-controlled capacitor circuit and related circuitry. The voltage-controlled capacitor circuit includes a metal-oxide semiconductor (MOS) varactor, a diode varactor, and/or a capacitor with fixed capacitance. The MOS varactor, the diode varactor and the capacitor are electrically connected in parallel or in series to form a capacitor with a preferred characteristic of voltage-controlled capacitance.
    Type: Application
    Filed: July 4, 2002
    Publication date: October 30, 2003
    Inventors: Kuang-Yu Hsu, Chih-Hung Cheng
  • Publication number: 20030202307
    Abstract: The invention provides a semiconductor device with ESD protection including a guard ring and a MOS transistor array formed in a region surrounded by the guard ring. In the invention, the MOS transistor array includes a first MOS transistor and a second MOS transistor. The first MOS transistor is closer to the guard ring than the second MOS transistor is. The channel length of the second MOS transistor is greater than that of the first MOS transistor.
    Type: Application
    Filed: April 26, 2002
    Publication date: October 30, 2003
    Inventors: Kei-Kang Hung, Yi-Hwa Chang
  • Patent number: 6639782
    Abstract: First of all, a processing apparatus that is utilized in the semiconductor industry, a protecting circuit and an automatic running apparatus having the standardized mechanical interface (SMIF) are provided. The protecting circuit includes: a voltage-induction device, a logical device and two electric-lighting devices. The protecting circuit receives the signals from the processing apparatus by the voltage-induction device, and the protecting circuit utilizes the logical device to perform a logical calculation in accordance with the signals from the processing apparatus. Furthermore, the states of operating the processing apparatus are shown in two electric-lighting devices, and the logical signals are transported from the protecting circuit into the standardized mechanical interface (SMIF) to control the operation of the robotic arm in the automatic running apparatus.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: October 28, 2003
    Assignee: Macronix International Co., Ltd.
    Inventor: Wen-Yung Lin
  • Publication number: 20030197995
    Abstract: In one embodiment of the invention, a reverse phase control power switching circuit for controlling the flow of current through a load from an AC source comprises a sensing bridge in series with the load and the AC source. The conductive state of the sensing bridge is responsive to a pulse generator and a zero crossing detection and overload protection means. Phase control means coupled to the pulse generator determines turn off of the sensing bridge is reset by the zero crossing detection and overload protection means. Responsive to a load current condition exceeding a maximum current caused by an overload or a short, the zero crossing detection and overloading protection network terminates conduction of current through the sensing bridge. The sensing bridge starts conducting current to the load at the beginning of the AC cycle and continues to conduct to a desired AC voltage phase angle or earlier if an excessive current condition caused by an overload condition or a short occurs.
    Type: Application
    Filed: April 22, 2002
    Publication date: October 23, 2003
    Inventors: Jenkin P. Hua, Alfred J. Lombardi
  • Patent number: 6631065
    Abstract: An overcurrent interrupting device includes a power MOSFET (10) for controlling an electric current flowing from a power supply to a load; a current detection circuit (30) for detecting a current value of an electric current flowing from the power MOSFET (10) to a load (L); a determination value selection circuit (50) for selecting a determination value used for determining an overcurrent; an overcurrent determination circuit (40) for determining whether or not the current value represents occurrence of an overcurrent, on the basis of the current value detected by the current detection circuit (30) and the determination value selected by the determination value selection circuit (50); and a boosting and switching circuit (20) for controlling activation/deactivation of the power MOSFET (10) on the basis of a result of determination rendered by the overcurrent determination circuit (40).
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: October 7, 2003
    Assignees: Yazaki Corporation, Toyota Jidosha Kabushiki Kaisha
    Inventors: Kazuto Sugiyama, Keiichi Ito, Kazuyuki Shiraki, Isao Yoneyama
  • Patent number: 6608743
    Abstract: The delay locked operation is intermittently conducted only when a command or signal is supplied from outside, and a delay time changed in the delay locked operation is retained thereafter in the period that the command or signal is not supplied. Also, the dummy pattern used in conducting the phase comparison between internal clock ICK and external clock ECK is obtained through the output circuit that has the same characteristics as the output circuit from which data are actually output. Therefore, the accurate coincidence between internal clock ICK and external clock ECK can be obtained regardless of the parasitic inductive and capacitive loads that are influenced depending on the characteristic of package and the mounting conditions. Thereby, the delay locked operation can be always conducted accurately.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: August 19, 2003
    Assignees: NEC Corporation, NEC Electronics Corporation
    Inventor: Misao Suzuki
  • Patent number: 6597555
    Abstract: A signal pattern is generated to produce a current for driving a GCT thyristor. The current is produced by the use of a down converter. Also, a current limiter having an FET is used for protecting the down converter from being damaged by a negative voltage appearing at the gate of GCT when the GCT thyristor receives a reverse direction load current.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: July 22, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Horst Gruening, Taichiro Tsuchiya, Fumio Mizohata, Kenshi Takao
  • Publication number: 20030117758
    Abstract: A semiconductor integrated circuit of the present invention has an output field-effect transistor formed on a main surface of a semiconductor substrate; an overcurrent detection circuit detecting an overcurrent of the output field-effect transistor; and an overcurrent limiting circuit which is connected between the gate electrode terminal and the source electrode terminal of the output field-effect transistor, controls the detected current of the overcurrent detection circuit and varies its output voltage according to variation in threshold voltage of the output field-effect transistor.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 26, 2003
    Applicant: NEC Electronics Corporation
    Inventor: Mitsuru Yoshida
  • Patent number: 6583976
    Abstract: When first and second intelligent power module type semiconductor switching circuits configured by an IGBT respectively are connected in parallel, collectors of IGBT are connected to each other, and emitters of the IGBT are connected to each other. And, a resistor is connected to each of the emitters. Both of the resistors and have the same resistance value. Then, the emitters are connected to each other by an emitter auxiliary terminal connection line via this resistor and the auxiliary terminal. In addition, gates of the IGBT and the IGBT are connected to each other by a gate auxiliary terminal connection line via this resistor and a ferrite beads core that has a high impedance at a predetermined frequency.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: June 24, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akihiro Murahashi, Takeshi Tanaka
  • Patent number: 6577481
    Abstract: The electrostatic discharge protection circuit includes: at least two bipolar transistors Q1-Qn coupled in series; a top one Qn of the at least two bipolar transistors coupled to a protected node 10; a bottom one Q1 of the at least two bipolar transistors coupled to a common node 12; at least two resistors R1-Rn coupled in series; each of the at least two resistors is coupled to a corresponding base of one of the at least two bipolar transistors; and a bottom one R1 of the at least two resistors coupled between a base of the bottom one Q1 of the at least two bipolar transistors and the common node 12.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: June 10, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Robert Steinhoff, Jonathan Brodsky, Thomas A. Vrotsos
  • Patent number: 6556406
    Abstract: A solid state relay has a first external connection terminal which is conductive with one end of a main switching element, and a second external connection terminal which is conductive with another end of the main switching element, and is used with a load and a power source connected in series between the external connection terminals. A third external connection terminal is disposed in the solid state relay. The third external connection terminal is connected to the second external connection terminal via a capacitor. The load and the power source are connected in series between the first external connection terminal and the second external connection terminal, and a node of the load and the power source is connected to the third external connection terminal, thereby allowing the resistance of the load and the electrostatic capacitance of the capacitor to constitute an RC filter circuit for preventing noise leakage.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: April 29, 2003
    Assignee: Omron Corporation
    Inventors: Nobutomo Matsunaga, Hiroshi Hashimoto, Yasuo Hayashi
  • Patent number: 6556407
    Abstract: In order to drive it with compatible electromagnetic interference, a circuit breaker is charged with a high charging current until the drain current exceeds a current threshold. The circuit breaker is then charged further with a smaller charging current associated with the desired rate of rise, until the drain voltage falls below a predefined voltage threshold. The circuit breaker is then charged further with the high charging current for a predefined period. In order to close the circuit breaker, a nearly reverse sequence is followed.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: April 29, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Cyrille Brando, Mark Elliott, Johann Falter
  • Patent number: 6549386
    Abstract: The protection circuit for a switch has an energy-storage means, which is connected to a control input of the switch and which is charged with a delay via resistance means when a control voltage is present and is discharged via switching means when the control voltage is low or absent, and has a switching stage which is connected to a supply voltage, is switched on when a specific threshold voltage is present across the energy-storage means and in this way reduces the supply voltage. In one exemplary embodiment, when the switching stage is switched on, the charge which is dissipated from the supply voltage is at least partially routed to the energy-storage means via a diode which is connected in parallel with the said energy-storage means, so that the phase during which the switching stage is switched on is lengthened and the energy-storage means, in this case a capacitor, is completely discharged.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: April 15, 2003
    Assignee: Thomson Licensing SA
    Inventors: Reinhard Koegel, Eugen Kizmann, Jean-Paul Louvel
  • Publication number: 20030067728
    Abstract: A half-bridge circuit has first and second semiconductor switches, which have load paths connected in series and which are driven in dependence on an input signal that is applied to an input terminal. At least one first drive circuit is provided, which is connected to the control connection of the first semiconductor switch and which makes a first drive signal available. The first drive signal is dependent on the input signal and on a current from or to the control connection of the second semiconductor switch.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 10, 2003
    Inventor: Martin Feldtkeller
  • Patent number: 6541838
    Abstract: Provided is a power module capable of driving an SR motor, giving a small size and high versatility and reducing a manufacturing cost. A switching element 1a and a diode element 2b which are to be connected to a P power wiring 5 are provided to form a first line on the band-shaped P power wiring 5, a switching element 1b and a diode element 2a which are to be connected to an N power wiring 6 are provided to form a second line aligned with the first line, and first band-shaped portions 41 and 44 of output terminals 3 and 4 and a band-shaped portion 61 of the N power wiring 6 are provided therebetween. The first band-shaped portions 41 and 44 and the band-shaped portion 61 have a two-layer structure with an insulating layer interposed therebetween. The switching elements 1a and 1b and the diode elements 2a and 2b are arranged alternately.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: April 1, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eiji Suetsugu, Masakazu Fukada
  • Publication number: 20030058597
    Abstract: A power converter device includes a power part accommodated in a first casing, and an electronic part accommodated in a separate second casing. The power part and the electronic part are connected to one another through a signal transmission arrangement, e.g. a cable or a radio communication. The power converter device thus has spatially separated power and electronic parts to realize a thermal separation as well and to enable a more compact overall configuration.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 27, 2003
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Manfred Bruckmann, Max Beuermann, Jurgen Biela, Matthias Braun, Karl Fleisch, Hubert Schierling, Benno Weis
  • Patent number: 6538869
    Abstract: A protection switch architecture is disclosed for a digital cross-connect system having a main controller, a command interface, and at least one digital signal processing unit. The digital signal processing unit includes one or more signal processing service devices and one or more signal processing protection devices that correspond to the service devices. A unit controller includes the protection switch for switching signal processing responsibilities between the service devices and the protection devices. Advantageously, the protection switch is adapted to act independently of the main controller in reponse to autonomous switching requests from the service devices by completing all protection switching related to such protection requests without main controller involvement. The protection switch also acts in response to manual switching requests from the main controller.
    Type: Grant
    Filed: April 22, 2000
    Date of Patent: March 25, 2003
    Assignee: Lucent Technologies Inc.
    Inventors: Hung Lee, Nhat Quang Pham
  • Patent number: 6529359
    Abstract: A circuit for the protection of an output driver NMOS transistor during EOS/ESD stress includes an output driver NMOS transistor and an output driver PMOS transistor connected in series between a Vss line and a Vdd line with the gates of the output driver transistors being connected together. An I/O pad is connected to the junction of the output driver transistors. A pre-driver NMOS transistor and a pre-driver PMOS transistor are connected in series between the Vss line and the Vdd line with the gates of the out-put driver transistors being connected together with the output of the pre-driver transistors being connected to the gates of the output driver transistors. A gate clamp is connected between the Vss line, the I/O pad the junction between the pre-driver transistors and the gate of the output driver NMOS transistor. An ESD clamp is connected between the I/O pad, the Vss line and the gate clamp.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: March 4, 2003
    Assignee: Sarnoff Corporation
    Inventors: Koen Gerard Maria Verhaege, Leslie Ronald Avery
  • Patent number: 6525916
    Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: February 25, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Filippo Marino, Salvatore Capici
  • Patent number: 6521951
    Abstract: Inter power supply surge voltage transmitting diode element is formed by a buried layer formed in a semiconductor substrate, a well region formed on the buried layer with its bottom portion being in contact with the buried layer, and impurity regions of mutually different conductivity types formed apart from each other at the surface of the well region. One of the impurity regions is electrically coupled to a first power supply line on which a surge voltage generates, and the other is electrically coupled to a second power supply line absorbing the surge voltage. The surge transmitting element includes a plurality of elements arranged parallel to each other between the first and second power supply lines. The second power supply line supplies the power supply voltage to an internal circuitry which consumes relatively small current.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: February 18, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirotashi Sato, Shigeki Ohbayashi
  • Patent number: 6519127
    Abstract: A solid state safety relay comprises: a first driver circuit; a second driver circuit; a charge disconnect transistor coupled to the first driver circuit and configured to control the flow of current along a current path; a first discharge disconnect transistor coupled to the first driver circuit and configured to control the flow of current along the current path; and a second discharge disconnect transistor coupled to the second driver circuit and configured to control the flow of current along the current path. A method of isolating an energy source from a circuit current path, comprises: turning off a first discharge disconnect transistor coupled to the circuit current path; and turning off a second discharge disconnect transistor coupled to the circuit current path to permit isolation of the energy source from the circuit current path if either one of the first discharge disconnect transistor or the second discharge disconnect transistor fails.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: February 11, 2003
    Assignee: Compaq Computer Corporation
    Inventor: Kenneth A. Check
  • Patent number: 6515841
    Abstract: In the electrophotographic copying apparatus or printer, a current proportional to the output current of the high voltage output circuit for supplying the charger etc. with a high voltage is detected by a current detection circuit, and the detection output is supplied to a smoothing circuit and a peak hold circuit. The outputs of the smoothing circuit and the peak hold circuit are supplied to a comparator and are compared with a reference value. If the output of the smoothing circuit or the peak hold circuit exceeds the reference value, the output of the high voltage output circuit is lowered or terminated.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: February 4, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Doi
  • Patent number: 6515886
    Abstract: In an electronic apparatus including an electronic circuit device, a board and a control circuit device for controlling the electronic circuit device, a socket for mounting the electronic circuit device is mounted on the board. The socket incorporates a switch for electrically connecting the control circuit device to a reference voltage line when the electronic circuit device is not mounted in the socket and electrically connecting the control circuit device to the electronic circuit device when the electronic circuit device is mounted in the socket.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: February 4, 2003
    Assignee: NEC Corporation
    Inventor: Takumi Hasegawa
  • Patent number: 6501137
    Abstract: An electrostatic discharge protection circuit, comprising a semiconductor-controlled rectifier and a PMOS device. The semiconductor-controlled rectifier, coupled between two nodes, has an N-type semiconductor layer. The PMOS device, integrated with the semiconductor-controlled rectifier to share a first P-type doped region, has a PNP device located in the N-type semiconductor layer. When one of the nodes is coupled to the electrostatic discharge power, the PNP device will conduct to trigger the semiconductor-controlled rectifier.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: December 31, 2002
    Assignee: Winbond Electronics Corp.
    Inventors: Ta-Lee Yu, Shyh-Chyi Wong
  • Patent number: 6483683
    Abstract: A differential amplifier, of such as a comparator or operational amplifier, has two base input terminals. The base-emitter junctions in the two input transistors are protected by corresponding protective transistors connected as diodes, i.e., the emitter and base of each protective diode are connected. The effective pn-junction in the protective transistors is the junction between the base and collector which normally has a larger breakthrough voltage than the pn-junction between the base and emitter. The protective transistors may be made in substantially the same way as the input transistors with substantially the same electrical properties as the input transistors, and therefore, are quite practical for use in ICs.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: November 19, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Helge Stenström
  • Patent number: 6469575
    Abstract: A circuit for amplifying and outputting a pulse width modulated (PWM) signal corresponding to an input audio signal with at least one output transistor and at least one protection control circuit. The protection control circuit compares a detected voltage and a threshold voltage. The detection voltage is a potential difference between a source and a drain of the output transistor. When the detection voltage exceeds the threshold voltage, the protection control circuit outputs a short circuit detection signal to the gate of the output transistor. As a result, the output transistor is turned OFF.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: October 22, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Co., Ltd.
    Inventors: Masashi Oki, Kazuhiro Okamoto
  • Patent number: 6445561
    Abstract: A circuit arrangement, in particular for triggering an ignition output stage, having a power switching transistor and a switchable freewheeling circuit or an auxiliary channel. The freewheeling circuit or the auxiliary channel may be constituted by a triggerable four-layer element.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: September 3, 2002
    Assignee: Robert Bosch GmbH
    Inventor: Hartmut Michel
  • Publication number: 20020118503
    Abstract: A predetermined signal pattern is generated to produce current for driving the GCT thyristor. The current is produced by the use of a down converter. Also, a current limiter having an FET is used for protecting the down converter from being damaged by a negative voltage appearing at the gate of GCT when the GCT thyristor receives reverse direction load current.
    Type: Application
    Filed: August 23, 2001
    Publication date: August 29, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Horst Gruening, Taichiro Tsuchiya, Fumio Mizohata, Kenshi Takao
  • Patent number: 6438462
    Abstract: A semiconductor circuit for an electronic unit having at least one microcontroller comprises at least one voltage regulator for providing, from a first supply voltage, at least one second supply voltage for the microcontroller and for circuits of the unit which cooperate with the microcontroller. The circuit further comprises, in monolithic form, a transceiver unit having transmitting and receiving device for coupling a microcontroller to the two-wire bus. This monolithic construction may additionally comprise watchdog functions, various wake-up functions and an interface via which a serial data exchange with the at least one microcontroller is possible. Furthermore, it may have an apparatus for determining, throughout the network, bus subscribers having reference-ground potential faults and for quantifying such faults.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: August 20, 2002
    Assignee: DaimlerChrysler AG
    Inventors: Peter Hanf, Juergen Minuth, Juergen Setzer, Max Reeb
  • Patent number: 6430016
    Abstract: An adjustable setpoint ESD core clamp for ESD protection circuits is disclosed. The core clamp includes an SCR whose P+N trigger junction is referenced to a diode stack. The SCR is non-avalanche triggered into a low impedance state at a set value of VCC, as determined by the diode stack, which allows the ESD device to turn on at a lower voltage, thereby protecting internal circuitry.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: August 6, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Kenneth W. Marr
  • Patent number: 6424513
    Abstract: A short circuit protection device, which includes a comparator with a non-inverting input port, an inverting input port, and an output port, is used with first and second voltage reference signals obtained from a power supply to indicate a short-circuit condition in the power supply when the reference signals are the same. A first voltage divider is connected to the power plane of the power supply and provides the first reference signal to the non-inverting input port, and a second voltage divider is connected to the output port of the power supply and provides the second reference signal to the inverting input port, where the second reference signal is normally smaller than the first reference signal.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: July 23, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Daniel Wissell, Denise McAuliffe, Bernard Nolan
  • Patent number: 6404346
    Abstract: A method or system consistent with this invention for detecting if a thyristor failed open in an alternating current input phase of a load comprises measuring an instantaneous power delivered to the load during a cycle of the input; determining a peak power delivered to the load during the cycle of the input; calculating an average power delivered to the load during the cycle of the input; and determining if the thyristor failed open by comparing the magnitudes of the peak power and the average power.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: June 11, 2002
    Assignee: York International Corporation
    Inventors: Ivan Jadrić, Harold R. Schnetzka
  • Publication number: 20020064012
    Abstract: A Zener diode and at least one transistor are connected in series in a reverse direction between a drain of a field effect transistor and a gate thereof. The field effect transistor is turned on when an input of an overvoltage is transmitted to the Zener diode and the transistors.
    Type: Application
    Filed: November 26, 2001
    Publication date: May 30, 2002
    Applicant: SUMITOMO WIRING SYSTEMS, LTD
    Inventor: Sang Hee Chung
  • Publication number: 20020060894
    Abstract: Because a semiconductor relay system of this invention comprises an across-element voltage detecting circuit 116 which delivers an across-element voltage detection signal depending on the presence/absence of an across-element voltage exceeding a predetermined threshold; an element driving circuit 112 for delivering an element driving signal in response to a control input signal; a logic-based judgement circuit 119 for delivering a logic-based judgement signal depending on the presence/absence of an across-element voltage detection signal; and a filtration circuit for removing a logic-based judgement signal of external disturbing elements to produce an element safety check signal, it is possible to reliably detect the disorder of a triac 114.
    Type: Application
    Filed: November 15, 2001
    Publication date: May 23, 2002
    Applicant: OMRON CORPORATION
    Inventors: Kenji Horibata, Teruyuki Nakayama, Toshiyuki Nakamura, Takaaki Yamada, Yuki Hashimoto, Kazuhiro Harada
  • Patent number: 6392859
    Abstract: A bidirectional switching device has a first main semiconductor element and a second main semiconductor element. The first main semiconductor element has a first main electrode connected to an ungrounded side of an AC power source, and a second main electrode. The first main semiconductor element contains a first parasitic diode whose cathode region is connected to the first main electrode and whose anode region is connected to the second main electrode. The second main semiconductor element has a third main electrode connected to the second main electrode, and a fourth main electrode connected to a load. The second main semiconductor element contains a second parasitic diode whose anode region is connected to the third main electrode and whose cathode region is connected to the fourth main electrode.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: May 21, 2002
    Assignee: Yazaki Corporation
    Inventor: Shunzou Ohshima
  • Patent number: 6388855
    Abstract: A transistor protecting circuit for an H bridge circuit includes first to fourth buffers, and an enhancing circuit. The H bridge circuit includes a first P-channel transistor and a first N-channel transistor connected in series between a first power supply and a ground, and a second P-channel transistor and a second N-channel transistor connected in series between the first power supply and the ground. The first buffer inverts a first control signal to supply to a gate of the first P-channel transistor, and the second buffer inverts a second control signal to supply to a gate of the first N-channel transistor. Also, the third buffer inverts a third control signal to supply to a gate of the second P-channel transistor, and the fourth buffer inverts a fourth control signal to supply to a gate of the second N-channel transistor. The third and fourth control signals are inverted signals of the first and second control signals.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: May 14, 2002
    Assignee: NEC Corporation
    Inventor: Shigeki Ikezu
  • Patent number: 6385025
    Abstract: A semiconductor apparatus such as a power MOSFET, an IGBT, or the like is provided having therein a control circuit such as an over-heating protection circuit and an over-current protection circuit, which realizes both of high-speed operation and prevention of erroneous operation caused by a parasitic device. To prevent erroneous operation, the control circuit controls so that when the voltage of a gate terminal is positive relative to that of a source terminal, a first switch circuit is turned on, when the voltage of the gate terminal is negative relative to that of the source terminal, a second switch circuit is turned on, and when the gate terminal and the source terminal have an almost same potential and a drain terminal has a high potential, the second switch circuit is turned on, thereby reducing leakage current from the drain terminal to the gate terminal.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: May 7, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kozo Sakamoto, Isao Yoshida
  • Patent number: 6385028
    Abstract: A first Zener diode group, connected between drain and gate terminals of a power MOSFET, causes breakdown in response to a surge voltage applied to the drain terminal. A resistor, provided between the gate terminal of the power MOSFET and a gate control unit, prevents current from flowing from the drain terminal of the power MOSFET to the gate control unit in an event of the breakdown of the first Zener diode group. A second Zener diode group, connected between source and gate terminals of the power MOSFET, has a breakdown voltage lower than the gate withstand voltage of the power MOSFET. The second Zener diode group clamps the gate voltage against the breakdown of the first Zener diode group.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: May 7, 2002
    Assignee: Denso Corporation
    Inventor: Kenji Kouno
  • Patent number: 6373672
    Abstract: The present invention relates to a static and monolithic current limiter and circuit-breaker component including, between two terminals, a one-way conduction current limiter, a sensor of the voltage between the terminals, and a mechanism for inhibiting the conduction of the current limiter when the voltage sensed exceeds a given threshold.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: April 16, 2002
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Baptiste Quoirin, Jean-Louis Sanchez, Jean Jallade
  • Patent number: 6351360
    Abstract: An integrated circuit including one or more power devices, and circuitry which reliably (and independently) shuts down each power device that is detected to be in an undesired operating condition (e.g., one or both of an overcurrent condition and an overvoltage condition) that causes a thermal fault, but which does not shut down any power device that is not in such undesired operating condition. In typical implementations in which the integrated circuit has multiple power devices and an overvoltage detection circuit for each power device, the integrated circuit includes a thermal fault detection circuit and logic circuitry which receives the output of the thermal fault detection circuit and each overvoltage detection circuit. The logic circuitry generates signals which shut down appropriate ones of the power devices in response to the thermal fault detection and overvoltage detection signals it receives.
    Type: Grant
    Filed: September 20, 1999
    Date of Patent: February 26, 2002
    Assignee: National Semiconductor Corporation
    Inventors: Jeff Kotowski, James C. Schmoock, John P. Parry