Abstract: The plastic toy building block is provided with electrical contacts to determine its position. The block has a basic body having recesses extending from top to bottom in its interior. In these are each inserted, combined into packets, several discrete elastically resilient conductor wires clamped between plastic strips. Elastically resilient conductor wires protrude downward into the recess. Contact points protrude from the plastic strips at the top. Several electrical cables are led from each nub to the underside of a nub plate to discrete contact points. Except for the nub surfaces, the nub plate can be covered by a cover plate and hereafter can be placed with the nub plate on the basic body of the toy building block. The lower contact points on the film then make electrical contact with the upper stubs and thus with contact points of the conductor wires.

Abstract: An interlocking toy block display mount with a plurality of sides with multiple sides having mail interlocking members or female interlocking members disposed thereon. A plurality of bore holes pass through top, side and end sides of the mount along three axes and intersecting at the substantial center of the mount with a fastener inserted through one of the bore holes to secure the mount to a surface.

Abstract: A smart block control method, system, and computer program product, include capturing an intent of using one or more smart blocks and a domain of the smart blocks, determining an order of each of the smart blocks relative to each other, calculating an accuracy of a determined order of the smart blocks compared with the intent, and outputting an instruction via the one or more the smart blocks, in response to said calculating the accuracy of the determined order of the smart blocks compared with the predetermined order of the smart blocks.

Abstract: A modular construction kit includes modular construction blocks, each includes at least one interface face. The interface face includes a recess, a plurality of connection apertures disposed proximate to the edge of the recess, and a circular interface receptacle disposed in the center of the recess. The kit also includes modular construction connectors, each includes two opposite sides, wherein each side including a body, a plurality of connection studs extending outwardly from the body, and a protrusion extending outwardly from the body. Some modular construction blocks include predetermined functions. A modular system block includes at least a processor, storage, and wireless communication.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: A printed wiring board (PWB) including one or more embedded capacitors. The PWB defines a planar area and includes a plurality of first conductive plates that are substantially parallel to the planar area and extend from a first normal axis towards a second normal axis. The first normal axis and the second normal axis extend substantially perpendicularly through the planar area. The PWB also includes one or more second conductive plates that are substantially parallel to the planar area and extend from the second normal axis towards the first normal axis. The second conductive plates are positioned between the first conductive plates. A non-conductive material is positioned between the first and second conductive plates. At least one first conductive via extends substantially collinear with the first normal axis in contact with the first conductive plates. A plurality of second conductive vias extends substantially collinear with the second normal axis in contact with the second conductive plate.

Abstract: A compact driver device for driving an LED lighting device is provided. The driver device includes a substrate, power capacitor that provides LED driving current to drive the LED lighting device, and a power resistor. Advantageously, the power capacitor and the power resistor are attached to the substrate and are solderlessly connected to each other to provide a very compact driver device.

Abstract: A solid state storage device includes a printed circuit board assembly, a memory arranged on the printed circuit board assembly, and a storage medium arranged on the printed circuit board assembly. The storage device further includes a processor arranged on the printed circuit board assembly, wherein the processor is coupled to the memory and to the storage medium via the printed circuit board assembly, and wherein the processor is configured to store data in the memory and the storage medium and to read data from the memory and the storage medium. The storage device further includes a removable power pack comprising a plurality of capacitors serially arranged in a housing, wherein the plurality of capacitors is detachably connected to the printed circuit board assembly to supply backup power to the processor, the memory, and the storage medium when the removable power pack is mounted in the solid state storage device.

Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: An ultra-wideband assembly in an electrical circuit having a circuit board with a conductive micro-strip line is provided. The assembly includes a non-conductive tapered core having an outer surface, a distal end, and a proximate end. The distal end is being larger than proximate end. The assembly includes a conductive wire having a proximate end and a distal end and being wound about at least a portion of the non-conductive tapered core. The proximate end of the conductive wire extends away from the proximate end of the non-conductive tapered core and is being conductively coupled to the micro-strip line of the circuit board. The distal end of the conductive wire extends away from the distal end of the non-conductive tapered core. The conductive wire contacts at least a portion of the outer surface of the non-conductive tapered core. The assembly includes a supporting bracket coupled to the non-conductive tapered core. The bracket includes a base portion and a core attachment portion.

Abstract: Disclosed are a semiconductor integrated circuit chip, a multilayer chip capacitor, and a semiconductor integrated circuit chip package. The semiconductor integrated circuit chip includes a semiconductor integrated circuit chip body, an input/output terminal disposed on the outside of the semiconductor integrated circuit chip body, and a decoupling capacitor disposed at a side face of the semiconductor integrated circuit chip body and electrically connected to the input/output terminal. The semiconductor integrated circuit chip cab be obtained, which can maintain an impedance of a power distribution network below a target impedance in a wide frequency range, particularly at a high frequency, by minimizing an inductance between a decoupling capacitor and a semiconductor integrated circuit chip.

Abstract: A capacitor with a combined with a resistor and/or fuse is described. This safe capacitor can rapidly discharge through the resistor when shorted. The presence of a fuse in series with the capacitor and results in a resistive failure when this opens during and overcurrent condition. Furthermore, the presence of a resistor in parallel to the capacitor allows the energy to be rapidly dissipated when a failure occurs.

Abstract: A transponder includes an integrated circuit (1) and an antenna (5) which is electrically connected to the integrated circuit (1) in a removable manner, the removable electrical connection including at least one intermediate connection element (4). The removable connection, together with the intermediate connection element (4) between the antenna (5) and the integrated circuit (1), can be used to divide the transponder into two parts. Moreover, the intermediate connection element (4) can also be used, in one variant, to reinforce mechanically at least one part of the contact elements (40), while facilitating the precise fixing of the contact elements to the corresponding element of the object to be marked.

Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.

Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.

Abstract: A capacitor built-in substrate of the present invention includes; a base resin layer; a plurality of capacitors arranged side by side in a lateral direction in a state that the capacitors are passed through the base resin layer, each of the capacitors constructed by a first electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively such that the projection portion on one surface side of the base resin layer serves as a connection portion, a dielectric layer for covering the projection portion of the first electrode on other surface side of the base resin layer, and a second electrode for covering the dielectric layer; a through electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively; and a built-up wiring formed on the other surface side of the base resin layer and connected to the second electrodes of the capac

Abstract: A chip element according to this invention can reduce the influence of parasitic capacitance and parasitic inductance when used in a GHz band. A substrate is formed of a low permittivity material having a permittivity low enough to reduce parasitic capacitance in a GHz band. Parasitic capacitance inherent to the chip element is reduced.

Abstract: A capacitor built-in interposer of the present invention, includes a base resin layer, a capacitor first electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively whereby the projection portion on one surface side of the base resin layer serves as a connection portion, a capacitor dielectric layer for covering the projection portion of the first electrode on other surface side of the base resin layer, and a capacitor second electrode for covering the dielectric layer, wherein a plurality of capacitors each constructed by the first electrode, the dielectric layer, and the second electrode are arranged and aligned in a lateral direction in a state that the capacitors are passed through the base resin layer.

Abstract: Apparatus and program product for designing vertical parallel plate (VPP) capacitor structures in which the capacitor plates in different conductive layers of the capacitor stack have a different physical spacing. The methodology optimizes the physical spacing of the plates in each conductive layer to achieve a targeted electrostatic discharge protection level and, thereby, supply electrostatic discharge robustness.

Abstract: An integrated circuit module, decoupling capacitor assembly and method are disclosed. The integrated circuit module includes a substrate and integrated circuit die mounted on the substrate and having die pads and an exposed surface opposite from the substrate. A plurality of substrate bonding pads are positioned on the substrate adjacent the integrated circuit die. A decoupling capacitor assembly is mounted on each integrated circuit die and includes a capacitor carrier secured onto the exposed surface of the integrated circuit die and a decoupling capacitor carried by the capacitor carrier. A wire bond extends from the decoupling capacitor assembly to a die pad and from a die pad to a substrate bonding pad.

Abstract: A smart card includes a first interface configured to perform a first type interfacing operation with a host using a plurality of contact pads defined by a contact type smart card protocol, a second interface configured to perform a second type interfacing operation with the host using a subset of the plurality of contact pads, and a controller configured to determine a priority between the first and second interfaces.

Abstract: Through an improvement of module size increase due to mounting a single passive element on a substrate and an increase in the mounting cost, to provide a highly reliable, high performance and small sized electronic circuit component which permits to integrate a variety of electronic parts such as capacitors, inductors and resistors in a high density with low cost. The electronic circuit component comprises an insulator substrate, a plurality of electrodes having different areas provided on the insulator substrate, one or more elements selected from a capacitor element of dielectric material sandwiched between the electrodes, an inductor element and resistor element, a metal wiring connecting the elements, a metal terminal part of a part of the metal wiring and an organic insulator material covering the elements and the circumference of the metal wiring portion excluding the metal terminal portion.

Abstract: An apparatus comprising a printed circuit board having a front side and a back side, and having therein a plurality of conductive layers, each conductive layer including one or more signal channels; a stub extending from the front side to the back side, the stub being electrically coupled to at least one signal channel; and an impedance matching terminal electrically coupled to the stub and to a ground. A process comprising providing a printed circuit board including a front side and a back side, and having therein a plurality of conductive layers, each conductive layer including one or more signal channels, and a stub extending from the front side to the back side, the stub being electrically coupled to at least one signal channel and being designed to receive a signal from a component attached to the printed circuit board; and coupling an impedance matching terminal to the stub and to a ground.

Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.

Abstract: Low inductance capacitors include electrodes that are arranged among dielectric layers and oriented such that the electrodes are substantially perpendicular to a mounting surface. Vertical electrodes are exposed along a device periphery to determine where termination lands are formed, defining a narrow and controlled spacing between the lands that is intended to reduce the current loop area, thus reducing the component inductance. Further reduction in current loop area and thus component equivalent series inductance (ESL) may be provided by interdigitated terminations. Terminations may be formed by various electroless plating techniques, and may be directly soldered to circuit board pads. Terminations may also be located on “ends” of the capacitors to enable electrical testing or to control solder fillet size and shape. Two-terminal devices may be formed as well as devices with multiple terminations on a given bottom (mounting) surface of the device.

Abstract: A first insulating substrate is formed on a heat sink, and a semiconductor element is formed thereon. An insulating resin casing is formed so as to cover the first insulating substrate and the semiconductor element. A second insulating substrate is mounted inside the insulating resin casing apart from the first insulating substrate. On the second insulating substrate, a resistance element that functions as a gate balance resistance is fixed by soldering. The second insulating substrate on which the resistance element was thus mounted was made apart from the first insulating substrate on which the semiconductor element was mounted, and was mounted on the side of the insulating resin casing.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. Conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: A monolithic capacitor includes a laminate of ceramic layers, the laminate having first and second surfaces, at least one pair of first and second internal electrodes, first and second external electrodes disposed on the first surface, third and fourth external electrodes disposed on the second surface, a first via conductor that electrically connects the first external electrode to the first internal electrode and to the third external electrode and that contains a metal oxide, and a second via conductor that electrically connects the second external electrode to the second internal electrode and to the fourth external electrode and that contains a metal oxide, wherein, in each of the first and second via conductors, the metal oxide content at an end on the second surface side is higher than the metal oxide content at a center or at an end on the first surface side.

Abstract: According to some embodiments, a system includes an integrated circuit package to support an integrated circuit die. The integrated circuit package may include a plurality of conductive contacts and a decoupling capacitor. The decoupling capacitor may include a positive terminal contact pad coupled to a first one of the plurality of conductive contacts, the positive terminal contact pad comprising a first substantially non-conductive area, and a negative terminal contact pad coupled to a second one of the plurality of conductive contacts, the negative terminal contact pad comprising a second substantially non-conductive area.

Abstract: In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via conductors formed to pierce the insulating layers in the direction of thickness. A decoupling capacitor is electrically connected to a wiring layer used as a power supply line or a ground line in the vicinity of the wiring layer, and mounted such that, when a current is passed through the capacitor, the direction of the current is reversed to that of the current flowing through the relevant wiring layer.

Abstract: A conductor pattern is formed on a resin film which is made of a thermoplastic resin. Each single-sided conductor pattern film has via-holes filled with an electrically conductive paste. A printed conductor pattern and a printed resistor are formed on a ceramic substrate. The single-sided conductor pattern films are laminated on the ceramic substrate. Then, the multilayered assembly is heated and pressed from both sides thereof to obtain a printed circuit board. During the heat and press treatment, respective single-sided conductor pattern films and the ceramic substrate bond together while the interlayer connection is obtained between the conductor patterns as well as between the conductor pattern and the printed conductor pattern.

Abstract: A power module includes at least one carrier body for mounting at least one power component thereon, and at least one energy storage component. For this purpose, a hybrid circuit is arranged as a thick film circuit on at least one of the carrier bodies, and the hybrid circuit includes at least one thick film resistor as a discharging resistor for discharging the at least one energy storage component. The power module is adapted for use as a power converter for electric motors.

Abstract: The acute extender card makes the possibility for testing different electronic components (for example, video cards, sound cards and etc.) without limitation for plug in external cables to the test component at the same time the acute extender minimize the propagation delay for the signals.

Abstract: The respective ends of input wiring on a printed wiring board of a signal transmission circuit are connected to an input terminal section and a transistor. One terminal of a first capacitor and a first resistor are respectively connected to the input wiring. A leading-side transmission path from a connection point with the first capacitor to a connection point with the input terminal section is formed by only a conductive pattern. An intermediate transmission path from the connection point with the first capacitor to a connection point with the first resistor includes two or more through holes or via holes. The intermediate transmission path is placed near grounding wiring on the printed wiring board. When one terminal of a second capacitor is connected to the intermediate transmission path, a transmission path between the respective connection points with the two capacitors includes one or more through holes or via holes.

Abstract: A conductor pattern is formed on a resin film which is made of a thermoplastic resin. Each single-sided conductor pattern film has via-holes filled with an electrically conductive paste. A printed conductor pattern and a printed resistor are formed on a ceramic substrate. The single-sided conductor pattern films are laminated on the ceramic substrate. Then, the multilayered assembly is heated and pressed from both sides thereof to obtain a printed circuit board. During the heat and press treatment, respective single-sided conductor pattern films and the ceramic substrate bond together while the interlayer connection is obtained between the conductor patterns as well as between the conductor pattern and the printed conductor pattern.

Abstract: This invention is directed to reduce degradation, loss, and reflection of high frequency signals of a coupling circuit for an alternating current. The coupling circuit, for connecting a first circuit element to a second circuit element, comprises a die capacitor and a chip capacitor connected in parallel to each other. The die capacitor has a first electrode that faces to and is in contact with the first circuit element, and a second electrode that is wire-bonded to the second circuit element. The chip capacitor also has a first electrode that is in contact with the first circuit element and a second electrode that is in contact with the second electrode of the die capacitor. The coupling circuit may show both advantages of superior performance at high frequencies attributed to the die-capacitor and relative large capacitance attributed to the chip-capacitor.

Abstract: A mother board and a computer system capable of flexibly using the SDRAM and the DDRAM. The mother board has several memory module slots, a voltage comparator, a clock generator and a chip set. Each of the memory module slots comprises a reference voltage pin, and the reference voltage pins of the memory module slots are connected to each other in parallel. The voltage comparator is coupled to the reference voltage pins of the memory module slots to detect whether the voltage at the reference voltage pin is equivalent to a reference voltage. The clock generator is coupled to an output of the voltage comparator. When the voltage at the reference voltage pin is equal to the reference voltage, a differential clock signal is generated, and when the votlage is different from the reference voltage, a normal clock signal is generated. The chip set is coupled to the output of the voltage comparator. When the voltage is equal to the reference voltage, the chip set is operated under a double data rate mode.

Abstract: A printed circuit board includes a power layer for use in providing electrical power to circuit components and a ground layer for use in carrying electrical current away from the circuit components. A loss element connects electrically between the power layer and ground layer to suppress electrical noise caused by changes in current flow in the circuit components.

Abstract: A combination run capacitor/positive temperature coefficient resistor/overload (CAP/PTCR/OL) module is described. The cover of the combination housing includes a capacitor compartment and terminal openings for receiving blade terminals of a run capacitor. The terminal openings in the cover align with blade receiving receptacles coupled to the PTCR start circuit. The blade terminals of a run capacitor are inserted into the receptacle openings and into electrical engagement with the blade receiving receptacles. The capacitor is supported and protected by a potting mixture filling the capacitor compartment.

Abstract: A composite multilayered ceramic board includes a multilayered ceramic board made of dielectric ceramics, a multilayered ceramic board made of magnetic ceramics and an adhesive layer made of thermosetting resin such as polyimide and the like. In this composite multilayered ceramic board, the dielectric multilayered ceramic board and the magnetic multilayered ceramic board are joined through the adhesive layer.

Abstract: Apparatus and methods for achieving a desired value of electrical impedance between parallel planar conductors of an electrical power distribution structure by electrically coupling multiple bypass capacitors and corresponding electrical resistance elements in series between the planar conductors. The methods include bypass capacitor selection criteria and electrical resistance determination criteria based upon simulation results. An exemplary electrical power distribution structure produced by one of the methods includes a pair of parallel planar conductors separated by a dielectric layer, n discrete electrical capacitors, and n electrical resistance elements, where n≧2. Each of the n discrete electrical resistance elements is coupled in series with a corresponding one of the n discrete electrical capacitors between the planar conductors. The n capacitors have substantially the same capacitance C, mounted resistance Rm, mounted inductance Lm, and mounted resonant frequency fm-res.

Abstract: Terminating resistances are provided to at least some pins of an ASIC or other multi-pin component mounted on a surface of a circuit board, by positioning a second circuit board on the surface of the main circuit board substantially opposite, and preferably aligned with or overlapping, the multi-pin component. The second circuit board accommodates a resistor such as a printed resistor, surface mount resistor or buried resistor. Preferably, vias in the main circuit board connect pins of the ASIC to terminating resistors. Preferably one or both of the ASIC and the second circuit board are coupled to the main circuit board by a ball grid array.

Abstract: A chip component assembly is provided that includes a plurality of chip components each having respective first and second terminal elements, the first terminal elements being joined to corresponding solder pads on a printed circuit board, the solder pads being in communication with electronic circuitry of the printed circuit board, and the second terminal elements being joined together by an array ground plane of a grounding device. The grounding device additionally includes a ground path structure which physically and electrically connects the array ground plane, and thus the chip components, to a ground pad located on the printed circuit board so as to provide a ground path from the chip components. Preferably, the array ground plane additionally includes a plurality of resilient contact elements which provide for substantial and continuous contact between the array ground plane and an ancillary ground plane, such as the top cover of a PC card.

Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.

Abstract: A multilayered circuit board is constructed such that holes penetrating through second and third dielectric layers, interposed between a pair of electrodes for constructing a capacitor, are filled with a material having a high dielectric constant respectively in a capacitor-forming area, and a plurality of (for example, four) holes are filled with a material having a high magnetic permeability respectively so as to penetrate through first to fifth dielectric layers in a magnetic flux-passing area of a coil constructed by coil electrodes of first to fifth turns in a coil-forming area.

Abstract: A chip component assembly is provided that includes a plurality of chip components each having respective first and second terminal elements, the first terminal elements being joined to corresponding solder pads on a printed circuit board, the solder pads being in communication with electronic circuitry of the printed circuit board, and the second terminal elements being joined together by an array ground plane of a grounding device. The grounding device additionally includes a ground path structure which physically and electrically connects the array ground plane, and thus the chip components, to a ground pad located on the printed circuit board so as to provide a ground path from the chip components. Preferably, the array ground plane additionally includes a plurality of resilient contact elements which provide for substantial and continuous contact between the array ground plane and an ancillary ground plane, such as the top cover of a PC card.

Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.

Abstract: The invention provides a circuit-mounted board which can improve the reliability in the operations of a system having expansion slots. The load adjustment board is a circuit-mounted board to be used by being inserted into the expansion slot of the system, and comprises a plurality of connection pins to obtain electric connection with another board, and devices each having variable electric property, such as a variable resistance or a variable capacitor, provided for each connection pin. One end of each device is connected to the respective connection pin, and the other end is fixed to the predetermined potential (ground, for example). The board is inserted into a vacant slot of the expansion slots of the system to suppress reflection noise etc.