Mounting Pad Patents (Class 361/808)
  • Patent number: 6535397
    Abstract: An interconnect structure interconnects electronic modules and includes a backplane assembly formed from a substantially rigid backplane plate that carries RF connectors and a digital motherboard having digital connectors for mating with digital connectors of electronic modules. A controlled impedance interconnect circuit is positioned on the rear surface of the backplane plate and interconnects the RF connectors carried by the backplane plate and digital connectors of the digital motherboard. A rack receives the backplane assembly and supports a plurality of electronic modules that are interconnected to each other via the backplane assembly.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 18, 2003
    Assignee: Harris Corporation
    Inventors: William Clark, Douglas Heckaman, Edward Bajgrowicz
  • Patent number: 6525414
    Abstract: A semiconductor device is made by mounting semiconductor elements on both sides of a wiring board having three-dimensional wiring including inner-via holes. A high operating speed and smaller size are made possible by employing a laminated structure of semiconductor elements without using the chip-on-chip configuration. Semiconductor elements are mounted on both sides of a wiring board having three-dimensional wiring including inner via holes so that the semiconductor elements oppose each other via the wiring board. The electrodes of the semiconductor elements are connected with each other by the three-dimensional wiring of the wiring board.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: February 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsukasa Shiraishi, Tsutomu Mitani, Kazuyoshi Amami, Yoshihiro Bessho
  • Patent number: 6501665
    Abstract: An improved structure of a Ball Grid Array IC mounting seat is disclosed. The IC mounting sear is characterized in that the middle section of the elongated thin strap is provided with a notch such that when the thin strap is folded correspondingly, the folding is at the side wall of the notch and all regions of the side edge of the notch are curved to externally clip the clipping body of the ball edge of the solder ball and the solder ball is mounted to the bottom clipping body of the conductive plates, thereby the solder ball is secured. In application the pre-soldering of the solder ball onto the conductive clipping plate is avoided, and the production process is rapid.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: December 31, 2002
    Assignee: Lotes Co., Ltd.
    Inventor: Ju Ted
  • Patent number: 6501030
    Abstract: A grounding plug structure configured for push-type snap lock fastening in circuit board screw holes is provided with a resilient deformable conductive member. When a circuit board with one or more such plug structures fastened thereto is mounted with respect to a tray or chassis, the conductive portion of the plug structure is deformed against a surface of the tray, forming an effective conductive pathway, e.g., for grounding, between the tray and the circuit board. In this way, grounding pathways can be established while eliminating the need for at least some screw mounting and/or standoff structures.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: December 31, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Bobby Parizi, Nguyen Tu Nguyen, Saeed Seyedarab, Toan Nguyen
  • Patent number: 6472611
    Abstract: A device and method for insuring the separation between a leadless chip carrier and printed wiring board, comprising aligning and attaching conductive pedestals to contact pads of either member and embedding the pedestals into the solder columns which are used to provide electrical connection. The conductive pedestals are comprised of an electrically conducting metal, solder, alloy or composite which will also provide thermal dissipation in selected designs.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: October 29, 2002
    Assignee: Texax Instruments Incorporated
    Inventor: Steven O. Dunford
  • Patent number: 6465746
    Abstract: An oscillator attachment structure which prevents interference by a beat signal caused by mixture of a reference oscillation signal from a PLL circuit and an oscillation signal from an oscillator. A plate conductive rubber plate, electrically connected to a ground conductor, is provided on the lower surface of a circuit board, and the conductive rubber plate is disposed on a ground conductive member of a printed circuit board. The ground conductor and the ground conductive member are electrically connected to each other, and the circuit board can be sufficiently grounded to the PLL circuit on the printed circuit board.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: October 15, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventor: Kazutoyo Kajita
  • Patent number: 6462955
    Abstract: A component alignment casing system for connecting circuits, and a method for making or assembling the component alignment casing system is disclosed. The system has at least one surface mountable component which has a plurality of exposed leads, a prepared component which has a plurality of exposed traces, an alignment base onto which the prepared component and the surface mountable component are laid, and a compressive cover that attaches to said alignment base. The alignment base has a plurality of alignment ribs to isolate and align the exposed traces of the prepared component. The prepared component and surface mountable components are electrically connected and attached together, preferably by soldering.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: October 8, 2002
    Assignee: Miraco, Inc.
    Inventor: Jonathan F. Roberts
  • Patent number: 6426466
    Abstract: A printed wiring board structure having peripheral power input. A printed wiring board having internal conductive layers, wherein each internal conductive layer contains a plurality of tabs extending therefrom. Tabs of similar voltage are vertically aligned within the printed wiring board. A frame within which the printed wiring board is mounted is also provided. The frame, having connections mounted within an inner surface of the frame, electrically contacts the tabs along the periphery of the printed wiring board.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: July 30, 2002
    Assignee: International Business Machines Corporation
    Inventors: Bruce J. Chamberlin, John M. Lauffer, James R. Stack
  • Patent number: 6421253
    Abstract: A delamination resistant electronics module assembly includes a printed circuit board layer coupled to a pallet via a cured epoxy preform. The preform may include conductive epoxy, or non-conductive epoxy with conductive traces. Component wells are collectively formed by the preform and PCB layer for placement of heat generating components, such as RF components. Methods of manufacturing module assemblies include curing the epoxy preform by applying a predetermined elevated pressure and heat to a sub-assembly of the pallet, preform layer, and PCB layer.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: July 16, 2002
    Assignee: Powerwave Technologies, Inc.
    Inventor: Daniel Ray Ash, Jr.
  • Patent number: 6407928
    Abstract: A surface mountable and low profile electrical component which can be electrically coupled to the solder side of a PCB, while other electrical components are mounted to a component side of the PCB. The surface mountable electrical component includes a mounting substrate having a diode or LED chip with electrical terminals. The terminals pass through the mounting substrate to be electrically coupled to first and second electrical contacts, which provide an electrical pathway between the terminals and the PCB.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: June 18, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Dean R. Falkenberg, Edward T. Iwamiya
  • Patent number: 6400576
    Abstract: Switching noise within an LGA-packaged or PGA-packaged IC Vdd and IC Vss nodes is reduced by spreading the electrical current in the bypass path to reduce the effective current loop area, and thus reduce the energy stored in the magnetic field surrounding the current path. This result is achieved by minimizing the horizontal components of the linkage paths between the IC nodes to be bypassed and the bypass capacitor. Since effective inductance Leff seen by the bypass capacitor is proportional to magnetic energy, Leff is reduced over a broad band of frequencies. For each bypass capacitor, a pair of conductive vias is formed. A first via is coupled to the LGA package Vcc plane and to the IC Vdd node, and a second via is coupled to the LGA package Vss plane and to the IC Vss node.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: June 4, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Howard L. Davidson
  • Patent number: 6388203
    Abstract: A controlled-shaped solder reservoir provides additional solder to a bump in the flow step for increasing the volume of solder forming the solder bump. The controlled shaped reservoirs can be shaped and sized to provide predetermined amounts of solder to the solder bump. Thus, the height of the resulting solder bump can be predetermined. The solder reservoirs can be shaped to take a minimum amount of space, such as by at least partially wrapping around the solder bump. Consequently, the solder bumps may have increased height without adding to the space requirements of the solder bump, or without increasing the fabrication cost. In addition, due to the finite time required for solder flow, a means of sequencing events during soldering is provided.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: May 14, 2002
    Assignee: Unitive International Limited
    Inventors: Glenn A. Rinne, Paul A. Magill
  • Patent number: 6380623
    Abstract: A microwave-frequency microcircuit assembly includes an integrated circuit structure having a circuit ground. A support structure includes a grounded metallic carrier, and a dielectric substrate having a top surface, a bottom surface contacting the carrier, and a capacitor via extending through the dielectric substrate. A metallization on the top surface of the substrate includes an input metallization trace to the integrated circuit structure, an output metallization trace from the integrated circuit structure, and a substrate ground plane upon which the integrated circuit structure is affixed. A thin-film capacitor resides in the capacitor via and is electrically connected between the substrate ground plane and the carrier. An electrical resistor is connected between the circuit ground of the integrated circuit structure and the carrier to self-bias the integrated circuit structure.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: April 30, 2002
    Assignee: Hughes Electronics Corporation
    Inventor: Walter R. Demore
  • Patent number: 6377466
    Abstract: A header containing a semiconductor die, method of manufacture thereof and electronic device employing the same. In one embodiment, the header includes first and second contacts, and an intermediate body. The intermediate body includes an insulated section interposed between the first and second contacts and has a cavity therein. The intermediate body also includes a semiconductor die, located within the cavity, adapted to condition a signal passing through at least a portion of the header.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 23, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Shiaw-Jong Steve Chen, Roger J. Hooey
  • Patent number: 6373720
    Abstract: A module with electronic components mounted on a carrier and electrically interconnected in accordance with a predefined circuit. Such a module, distinguished by particular variability, ease of assembly, compactness and applicability for high currents, is characterized in that the carrier is an injection molded plastic part (1), into which flat connectors (3) for receiving the components may be inserted.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: April 16, 2002
    Assignee: Alcatel
    Inventors: Helmut Fechtig, Heinz Neukum
  • Patent number: 6365841
    Abstract: A printed circuit board includes a first mark 2 formed by a thin conductor, a second mark 3 formed by a resist 8, a land 6 which is partially coated by the resist 8 and a land 7 which is not coated by the resist 8. The second mark 3 is formed when the land 6 is partially coated by the resist 8. A device 4, which corresponds to the land 6, is mounted at a position apart from a center O2 of the second mark 3 by a predetermined distance L1. A device 5, which corresponds to the land 7, is mounted at a position apart from a center O1 of the first mark 2 by a predetermined distance L2. Therefor, the devices 4, 5 can be properly mounted on the printed circuit board 1 in spite of a positional error of the resist 8.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: April 2, 2002
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Kotaro Takigami
  • Publication number: 20020036899
    Abstract: A module with electronic components mounted on a carrier and electrically interconnected in accordance with a predefined circuit. Such a module, distinguished by particular variability, ease of assembly, compactness and applicability for high currents, is characterized in that the carrier is an injection molded plastic part (1), into which flat connectors (3) for receiving the components may be inserted.
    Type: Application
    Filed: April 19, 1999
    Publication date: March 28, 2002
    Inventors: HELMUT FECHTIG, HEINZ NEUKUM
  • Patent number: 6362968
    Abstract: A stiffener for a printed circuit board where the stiffener is placed between the printed circuit board and a wall of the metal chassis in a computer system housing. The loaded printed circuit board may first be mounted on the stiffener, which, in turn, may then be mounted on the appropriate wall of the chassis along with the circuit board. Alternately, the stiffener may first be mounted on the appropriate chassis wall, and the circuit board may then be mounted on the stiffener. Additional circuit components may then be added onto the circuit board. The lies between the circuit board and the wall of the chassis on which the circuit board is being mounted. The back plane support provided by the stiffener may reduce damage to the conducting paths of the printed circuit board due to pressures exerted during component mounting, manufacture, transportation, etc. Additionally, a circuit board carrying densely populated electronic components may be easily mounted on or removed from the chassis without damage.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: March 26, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Lajara, Hassan Siahpolo, Ronald Barnes, Kenneth Kitlas
  • Publication number: 20020024802
    Abstract: A connection structure for connecting a display module and a printed substrate is provided, which is appropriate for use in mass production of electronic devices such as a cellular phone in which, while a thin mounting is desired, many components have to be mounted on the printed substrate and the display module is required to be mounted in predetermined space on the printed substrate. The liquid crystal module is provided with a pin electrode on an external connection terminal of its COF, and fixed to a housing in a folded state with respective rear surfaces of the COF and a liquid crystal panel facing each other. A holding member for engaging the printed substrate and holding the printed substrate is formed on the housing. When the holding member engages the printed substrate, the liquid crystal module is fixed to the printed substrate, and at the same time, the pin electrode of the COF and a through hole electrode of the printed substrate are electrically connected.
    Type: Application
    Filed: August 29, 2001
    Publication date: February 28, 2002
    Inventors: Yasunori Chikawa, Kunihiro Satou, Hiroaki Tomokuni
  • Patent number: 6351386
    Abstract: A component shim 310 is used with printed circuit boards 306 and heat spreaders 314, for example, where each of the printed circuit board 300 and heat spreader 314 has a surface 304, 312 that are in different spaced apart planes. A component 300 has one lead attached to the surface 304 of the printed circuit board 306. The component shim 310 has a conductive section 320 with an upper attachment layer 326 and a lower attachment layer 332 secured to opposed sides 322, 324 of the conductive section 320. The upper attachment layer 326 is secured to a bottom 308 of the component 300 and the lower attachment layer 332 is secured to a surface 312 of the heat spreader 314. The total thickness of the conductive section 320 and upper and lower attachment layers 326, 332 of the component shim 310 is substantially equal to a distance from the bottom 308 of the component 300 to the surface 312 of the heat spreader 314.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: February 26, 2002
    Assignee: Motorola, Inc.
    Inventors: Clark Douglas Fischbach, Robert Alvin John Richter, Jr.
  • Publication number: 20020018340
    Abstract: In an operating component placement system for electronic equipment, assembly units (5) having cables (8) whereby operating components (6a to 6e) are connected to connectors (7a to 7e) are used to mount the operating components (6a to 6e) to a front panel (4), with connectors (7a to 7e) connected to connectors (3a to 3e) on a panel board (3) for signal input for various functions, and the cable lengths for operating component groups (6a to 6c) and (6d and 6e) having the same form established so as to be longer than the maximum distance between the connectors (3a to 3c) and (3d and 3e) to which each operating component group is to be connected on the panel board 3 and hole groups (4a to 4c) and (4d and 4e) for mounting each of the operating component groups to the front panel. Operating components having the same form can be selectively laid out by changing the cable positioning.
    Type: Application
    Filed: March 26, 2001
    Publication date: February 14, 2002
    Inventor: Hiroshi Okamoto
  • Patent number: 6343018
    Abstract: A mounting structure of a card connector includes a connector body surface mounted on a wiring circuit board. An IC card can be withdrawably inserted into the connector body so that the IC card can be connected to the wiring circuit board through the connector body. The connector body includes a card insertion space which is disposed at an angle of inclination with respect to an upper surface of the wiring circuit board. A card inlet/outlet port is formed at an upper inclination end of the card insertion space such that the IC card inserted into the card insertion space through the card inlet/outlet port is retained for connection at an angle of inclination.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: January 29, 2002
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Tetsuo Takeyama, Minoru Igarashi
  • Publication number: 20020006035
    Abstract: An electronic circuit unit having a circulator is formed of a circuit board made by laminating a plurality of dielectric substrates; first, second, and third central conductors disposed at intervals of 120 degrees on a plurality of dielectric substrates and partially intersecting in the upper and lower directions; a magnet and a ferrite member disposed above and below the intersection of the central conductors; a first yoke 10 covering the outside of the magnet; and a second yoke 11 covering the outside of the ferrite member. One end of each of the central conductors serves as an input and output terminal, and the ends are disposed at intervals of 120 degrees. Adjacent input and output terminals are connected by inductive elements.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 17, 2002
    Applicant: Alps Electric Co., Ltd
    Inventors: Yuichi Shimizu, Nobuhiko Suzuki
  • Publication number: 20010055202
    Abstract: A reinforcement structure to protect an integrated circuit module located within a card-type data carrier or smart card. The reinforcement structure is rigid, having a modulus of elasticity higher than modulus of elasticity of the smart card, and has a thickness dimension that is co-extensive with the thickness dimension of the smart card. The reinforcement structure is provided with a cavity for housing the integrated circuit module. In a preferred embodiment, the reinforcement structure is constructed of thermally and electrically conductive material that is castable or formable to facilitate integration of additional electronic circuit elements therein. In another embodiment, the reinforcement structure is configured in the shape of a SIMM card and is used in place of the normally flexible plastic SIMM card body.
    Type: Application
    Filed: March 28, 2001
    Publication date: December 27, 2001
    Inventors: Thomas B. Templeton, Charles F. Horejs, Thomas H. Templeton
  • Patent number: 6320120
    Abstract: A shielding and/or grounding strip includes a strip of material defining a first longitudinal side, a second longitudinal side, a top surface, and a mounting surface, with the first longitudinal side forming a hook member. At least one barb element extends from the mounting surface of the strip of material and at least one contact flap is formed on the mounting surface of the strip of material.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: November 20, 2001
    Assignee: Laird Technologies
    Inventor: Phil Van Haaster
  • Patent number: 6316738
    Abstract: A printed wiring board in which an opening existing around a pad which is a photovia land is arranged so that it is not overlapped with the pad, the area of an opening existing around a pad and that of another opening are equalized, the quantity of resin which is filled in each opening or is equalized throughout a printed wiring board and the quantity of resin overflowing from each opening or when resin is filled in each opening or is uniformed is provided. According to such a printed wiring board, a reliable printed wiring board wherein secure connection is enabled without causing disconnection can be realized when a circuit pattern provided on an interlayer insulating board formed on the printed wiring board and a conductor pad are connected by arranging an opening existing around a conductor pad so that it is not overlapped with the conductor pad and substantially equalizing the quantity of resin which is filled in an opening around a conductor pad and that of resin which is filled in another opening.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: November 13, 2001
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoji Mori, Yoichiro Kawamura
  • Patent number: 6313999
    Abstract: An apparatus which aligns a ball grid array (BGA) device over a substrate. The apparatus preferably includes a cup-shaped member for cupping and holding the solder balls of the BGA device, and an elongate member attached to the cup-shaped member. The cup-shaped member is attached between the BGA device and the substrate at two or more different positions so that the solder balls of the BGA device become aligned over the terminals of the substrate by operation of gravity.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: November 6, 2001
    Assignee: Agere Systems Optoelectronics Guardian Corp.
    Inventors: Roger Anthony Fratti, John Wayne Bowen, Dwight David Daugherty, Xiaohong Jiang
  • Patent number: 6292372
    Abstract: An improved robber or solder thieving pad, parallelogram shaped, significantly reduces solder bridging in wave soldered multi leaded through hole or surface mounted components in a printed circuit board for different wave settings. The component leads are either parallel or perpendicular to the solder wave during the soldering process. In one embodiment, the parallelogram shaped solder thieving pad is disposed contiguous or adjacent to the through hole. In another embodiment, the parallelogram shaped solder thieving pad is spaced from a thin annular ring surrounding the through-hole. In still another embodiment, the pad may be linked to the ring by a thin connecting bridge. Dimensions of the solder thieving pad vary according to the component lead size, spacing, and number of rows.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: September 18, 2001
    Assignee: Lucent Technologies, Inc.
    Inventors: Kon M. Lin, Quentin D. Groves, Albert W. Robinson
  • Patent number: 6291765
    Abstract: An electromagnetically shielded housing, in particular a subrack, has metal housing parts and at least one spring contact strip (FE). The spring contact strip is joined to a first housing part (BE) and is shaped such that the first housing part simultaneously makes contact with and is snap-connected to a second housing part (QV). When the electromagnetically shielded housing is fashioned as a subrack, a subrack shielding plate corresponds to the first housing part and a transverse rail corresponds to the second housing part. The stress-free snap-connection of the subrack shielding plate and transverse rail provided by the spring contact strip requires no additional compression. It is not necessary to screw down the subrack shielding plate, unless, for example, increased stability is desired. It is particularly advantageous if a distal edge of the preferably angled-off edge region (KE) of the subrack shielding plate is recessed into the housing and does not bend back out from the transverse rail.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: September 18, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Siegfried Kurrer, Werner Körber, Ernst Billenstein, Kurt-Michael Schaffer
  • Patent number: 6292374
    Abstract: An assembly that has an insert that fits onto a back plate. The back plate receives a circuit board that covers at least a portion of the insert. A components attaches to the circuit board and to the insert. The insert is made out of a material having a thermal expansion coefficient that is close to the thermal expansion coefficient of the bottom surface of the component, which allows the component to be securely soldered to the insert and therefore to the assembly. Preferably the insert is also made out of a good conductor to provide a good electrical conduction path between the component and the ground plane of the circuit board that contact the insert. The insert either fits into a recessed area in the back plate or attaches to the top of the back plate. In an alternative embodiment, the assembly has a circuit board with a contact opening and a back plate with a raised area that fits into the contact opening. The contact opening exposes a portion of ground plane on the circuit board.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: September 18, 2001
    Assignee: Lucent Technologies, Inc.
    Inventors: Michael Gunnar Johnson, Janusz B. Sosnowski
  • Publication number: 20010013423
    Abstract: A structure and method is disclosed for directly attaching a device or package on flexible organic circuit carriers having low cost and high reliability.
    Type: Application
    Filed: September 18, 1997
    Publication date: August 16, 2001
    Inventors: HORMAZDYAR M. DALAL, KENNETH M. FALLON, GENE J. GAUDENZI, CYNTHIA S. MILKOVICH
  • Patent number: 6275388
    Abstract: According to the invention, a multilayered image sensor is backmounted to a plate, and the plate in turn, is installed in a holding pocket of a device. In that the scheme takes advantage of a high controllability of a mounting plate's thickness, the mounting scheme provides for tight control of holding forces with which an image sensor is secured in an imaging device. In that the scheme provides for back mounting of image sensor on a planar surface, the mounting system provides tight control of an imaging assembly's pixel plane to fixed point in space distance.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: August 14, 2001
    Assignee: Welch Allyn Data Collection, Inc.
    Inventors: Robert J. Hennick, Michael P. Lacey, Robert C. Hinkley, Melvin D. McCall
  • Patent number: 6272019
    Abstract: GBIC frames are mounted with respect to one or another or with respect to the printed circuit board so as to facilitate space sufficiency, e.g. of a front or other panel. In one aspect two GBIC frames are mounted in back-to-back fashion on opposite surfaces of a mounting plate of preferably minimal thickness. Plate cut-outs are positioned to accommodate frame feet or other mounting structures in a fashion off-set, on opposite faces, to avoid interference between frame legs. In one aspect, portions of GBICs and frames are received in cut-out or other edges of a PCB so that GBICs in frames straddle a major surface of a PCB to reduce height for accommodating 1RU or other form factors while increasing space efficiency.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: August 7, 2001
    Assignee: Cisco Technology Inc.
    Inventors: William F. Edwards, Frederick Roland Schindler, Robert Gregory Twiss
  • Patent number: 6266249
    Abstract: A semiconductor package is present along with an associated method. The package comprises a substrate with a top surface and a bottom surface, the substrate having a plurality of electrically conductive vias extending from the top surface of the substrate to the bottom surface of the substrate. A semiconductor device having an active surface, the active surface having a plurality of bonding pads, is attached to the substrate by an adhesive that bas holes that align with the vias. The vias are also aligned with the bonding pads. Solder serves to electrically and mechanically couple each of the bonding pads with a corresponding via. Each of the vias, in turn, is coupled to a solder ball formed on the bottom of the substrate.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: July 24, 2001
    Assignee: LSI Logic Corporation
    Inventors: Kishor V. Desai, Sunil Patel, Ramaswamy Ranganathan
  • Patent number: 6252777
    Abstract: An IC card, which can be mass-produced at low cost, is composed of a plane coil formed by means of punching or etching.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: June 26, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Takashi Ikeda, Masatoshi Akagawa, Daisuke Ito
  • Patent number: 6243274
    Abstract: A plurality of shields is provided for shielding selected electronic components and electronic sub-assemblies mounted on a printed wiring board assembly from electromagnetic interference (EMI) and/or from radio frequency interference (RFI). The shields include open-ended electrically conductive casings having lower ends fixedly attached on the printed wiring board so as to surround selected components. A compliant electrically conductive member is positioned in common over upper ends of the casings. An electrically conductive housing disposed over the compliant member provides compression of the compliant member such that electrical contact is maintained between the housing on the upper ends of the casings. A grounded base plate is spaced from the wiring board assembly. The housing is removably attached to the base plate to provide the plurality of shields.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: June 5, 2001
    Assignee: Redcom Laboratories, Inc.
    Inventor: John A. Willis
  • Patent number: 6229711
    Abstract: A flip-chip mount board includes a circuit board provided with a plurality of conductor patterns to which a plurality of bumps provided on an electronic component can be connected via a connection medium provided on the conductor patterns. The conductor pattern includes at least one wiring pattern and a connection pad, the wiring pattern serves as an interconnection, the connection pad is provided at a position corresponding to one of the bumps, the at least one wiring pattern and the connection pad are provided in an integrated manner, and a width (W1) of the connection pad is formed so as to be greater than a width (W2) of the wiring pattern (W1>W2).
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: May 8, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Yoshihiro Yoneda
  • Patent number: 6215667
    Abstract: A mounting system (10) and method for adjusting the position of a PCB (14) in a housing (22) therefor is provided. An annular, stepped mounting member (16) having axially and radially spaced surface portions (19) provides predetermined positions for the PCB (14) in the housing (22) based on the size of a mounting opening (20) of the PCB (14). The PCB (14) is placed onto the mounting member (16) with those surface portions (19) that are of smaller diameter than the opening (20) fitting therethrough until the first portion (19) having a larger diameter is encountered which will be engaged against the PCB (14). In this manner, the present system (10) allows for a relatively quick and easy change to the size of the PCB mounting hole opening (20) to be made to effect a change in the PCB vertical position in the housing (22) thereby avoiding expensive and time-consuming changes that are usually required when the position of the PCB (14) needs to be changed to accommodate component reconfigurations and the like.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: April 10, 2001
    Assignee: Motorola Inc.
    Inventors: Roger W. Ady, Daniel Gioia, William R. Groves
  • Patent number: 6191494
    Abstract: A semiconductor device and a method of producing the same are provided. The semiconductor device includes: a semiconductor chip; a resin package which seals the semiconductor chip; signal passages which guide the signal terminals of the semiconductor chip outward from the resin package; a grounding metal film in contact with the bottom surface of the semiconductor chip; and a grounding passage which is connected to the grounding metal film and guided outward from the resin package.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Nobuo Ooyama, Shinichiro Maki, Fumitoshi Fujisaki, Syunichi Kuramoto, Yukio Saigo, Yasuo Yatsuda, Youichi Matae, Atsushi Yano, Kazuto Tsuji, Masafumi Tetaka
  • Patent number: 6177635
    Abstract: A coating insulator layer has plural rows of through holes disposed longitudinally in the coating insulator layer. A plurality of conductors are disposed in parallel with one another longitudinally in the coating insulator layer. Each conductor does not interfere with the through holes. Plural rows of locking projections are longitudinally formed on a face of the coating insulator layer. The locking projection has a construction to engage with the through hole. Thus, when a couple of the wiring substrates are layered, some of the locking projections formed on one of the wiring substrates are aligned to be engaged with some relative through holes of the other wiring substrate, allowing a sure lamination of the wiring substrates. The locking projections are disposed in regular intervals and the through holes are spaced in the same regular intervals. Another wiring substrate is enough flexible to be arranged along a structural wall for wiring.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: January 23, 2001
    Assignee: Yazaki Corporation
    Inventors: Masuo Sugiura, Hiroshi Watanabe, Mitsuji Kubota
  • Patent number: 6137688
    Abstract: A method and apparatus are provided for mounting a Very Large Scale Integration (VLSI) chip such as a microprocessor on the back plane of a computer chassis. In one embodiment, the mounting on the computer chassis is configured to provide a current supply connection for delivering a high level of current to the microprocessor from a current source through the computer chassis. Also provided are a method and apparatus for mounting a VLSI chip such as a microprocessor on the chassis of a computer system in order to dissipate heat from the VLSI chip to the ambient outside the computer system through the computer chassis. Also provided are a method and apparatus for signal interconnections among one or several VLSI chips such as microprocessors mounted on the chassis of a computer to provide signal capacity with strong integrity. Also provided are a method and apparatus for mounting a power supply for a VLSI chip package on the back chassis of a computer.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: October 24, 2000
    Assignee: Intel Corporation
    Inventors: Shekhar Yeshwant Borkar, Robert S. Dreyer, Hans J. Mulder
  • Patent number: 6125041
    Abstract: A card-type electronic device including at least a circuit board, wherein the circuit board includes a part mounting portion partially surrounded by a cutout portion and mechanically and electrically connected to other portion of the circuit board via a flexible supporting portion. The flexible supporting portion is bent so that a height position of the part mounting portion is different from a height position of a remaining portion of the circuit board.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: September 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Takamasa Yoshikawa, Noriaki Shiba, Atsuko Yamaguchi
  • Patent number: 6107679
    Abstract: A semiconductor device according to the invention of the present application comprises a base material having a surface on which conductive circuits are formed, a resist film for covering the base material in a state in which peripheral portions of the base material and portions of the conductive circuits are bare, a semiconductor elemental device mounted on the base material and connected to the bare portions of the conductive circuits and electrodes thereof, and a sealing body for sealing the semiconductor elemental device in an area including a range from the resist film for covering the base material to the bare portions. Owing to the provision of the resist in the exposed state of the portions of the base material, the sealing body and the base material are firmly bonded to one another therebetween so that they can be restrained from peeling.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: August 22, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takashi Noguchi
  • Patent number: 6101101
    Abstract: A leadframe for semiconductor devices is characterized in that the edge of the paddle has the shape of inclined plane which facilitate the silver epoxy to fill up the gap near the edge of the epoxy. The inclined plane on the paddle can also prevent the excessive silver epoxy from leaking to the bottom side of the paddle, which may cause delamination due to the poor adhesion between silver epoxy and plastic resin. Therefore the leadframe of the present utility can prevent moisture from accumulating within the package and the problem of pop corn.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: August 8, 2000
    Assignee: Sampo Semiconductor Corporation
    Inventors: Chung-Hsing Tzu, Jung-Yu Lee
  • Patent number: 6094354
    Abstract: A chip component mounting board includes a chip mounting portion and a first groove. A chip component is mounted on the chip mounting portion. The chip mounting portion has a connection pad electrically connected to the chip component. The first groove is formed in the chip mounting portion to extend from a center of the chip mounting portion to one side of the chip mounting portion while gradually increasing its width. A method of manufacturing a chip component mounting board is also disclosed.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: July 25, 2000
    Assignee: NEC Corporation
    Inventors: Toshiaki Nakajoh, Kenichi Tokuno
  • Patent number: 6076686
    Abstract: Aspects for supporting a package and a device coupled to the package at a device frontside during package removal at a package backside are described. In an exemplary aspect, a support structure includes a support frame supporting the package substantially near end portions of the package, and a set of support braces supporting the package substantially near the device. The structure further includes a block support positioned within the set of support braces and substantially underneath the device at a predetermined distance from the device. Support material is provided between the support frame and the set of support braces and between the block support and the device, wherein breakage of the package during grinding removal of the package is reduced.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: June 20, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mehrdad Mahanpour, S. Sidharth
  • Patent number: 6058023
    Abstract: An electronic component operating at high voltage is mounted to the top side of an insulating platform, which in turn is supported from a chassis by a pedestal. The insulating platform provides a long surface path conduction distance of the electronic component to the chassis and to other components mounted to the chassis. The platform-mounted electronic component is thereby insulated against arcing and damaging the other components.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: May 2, 2000
    Assignee: Hughes Electronics Corporation
    Inventors: James J. Ahn, John F. Stickelmaier
  • Patent number: 6058020
    Abstract: A component housing for surface mounting of a semiconductor component on a component-mounting surface of a printed circuit board. The component housing including a chip carrier made of an electrically insulating material and having an approximately planar chip carrier area, a semiconductor chip, preferably having an integrated electronic circuit, secured on the chip carrier area, and electrode terminals having a surface-mountable configuration. The electrode terminals penetrating through the chip carrier and electrically connected to the semiconductor chip. A distance between the component-mounting surface of the printed circuit board and outer delimiting areas of the chip carrier which face the component-mounting surface of the printed circuit board increases continuously from an edge region to a central region of the chip carrier.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: May 2, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jurgen Winterer, Gottfried Beer, Bernd Stadler
  • Patent number: 6025640
    Abstract: There is disclosed a resin-sealed semiconductor device which comprises plural terminal portions integrally having inner terminals on surfaces and outer terminals on back surfaces and being disposed electrically independent of one another in such a manner that inner terminal surfaces are positioned on substantially the same plane; a die pad integrally provided with plural inner terminals on a surface and plural outer terminals on a back surface and being disposed electrically independently in a substantially center portion of the plane in which the plural terminal portions are arranged two-dimensionally; a semiconductor element electrically insulated and mounted on a surface of the die pad; and wires for connecting the inner terminals of the terminal portions and terminals of the semiconductor element. The whole is sealed with a resin in such a manner that the outer terminals of the terminal portions are partially exposed to the outside.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: February 15, 2000
    Assignee: Dai Nippon Insatsu Kabushiki Kaisha
    Inventors: Hiroshi Yagi, Masato Sasaki, Kazuyoshi Togashi
  • Patent number: 5993946
    Abstract: A lattice of a wiring or terminal pattern is varied at areas on a wiring board. The spacing of the wiring lattice is reduced only in a predetermined area for a device having many terminals. An alignment pattern is provided in the predetermined area. The spacing of the wiring lattice in the central portion of the wiring board may be the finest and may get gradually coarser toward the peripheral portion of the wiring lattice.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: November 30, 1999
    Assignee: NEC Corporation
    Inventor: Tatsuo Inoue