Protection By Snubber Circuitry Patents (Class 361/91.7)
  • Patent number: 7099134
    Abstract: An apparatus for preventing a boost converter from an abnormal operation is provided. The boost converter includes a transformer, a full-wave rectifier circuit electrically connected to a secondary winding of the transformer, an output filter inductor, an output filter capacitor, a clamping circuit having two clamping diodes with two anodes electrically connected to each other to form a common-anode terminal, a first clamping capacitor with a first terminal electrically connected to a node joining the filter inductor and the filter capacitor, and a second terminal electrically connected to the common-anode terminal, and an energy recycle circuit, and the apparatus includes a controllable voltage source having a first terminal electrically connected to the node and a second terminal electrically connected to the energy recycle circuit.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: August 29, 2006
    Assignee: Delta Electronics Inc.
    Inventors: Jianping Ying, Teng Liu, Xingkuan Guo, Jianhong Zeng
  • Patent number: 7072162
    Abstract: A bi-directionally driven forward converter for neutral point clamping in a modified sine wave inverter maintains wave shape integrity when the half bridge output is subjected to loads of varying impedances. This bi-directionally driven forward converter is supported by a dual primary coupled to a common secondary transformer of which both primaries are wound in opposition to each other. A high frequency snubbing pulse generator outputs a series of pulses coincidental with the turn off of the half bridge power transistors and pending the polarity of the modified sine wave output would permit current flow through either of the two primary windings. Given that the transformer secondary voltage is ultimately rectified, filtered, and tied to the input of the inverter itself, reflects back an impedance to the primary winding that is non-dissipative.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: July 4, 2006
    Inventor: James D'Amato
  • Patent number: 7054127
    Abstract: A cable device includes an integrated surge protection circuit. In the event that, communication signals conveyed by the cable include (potentially damaging) transient voltages, the surge protection circuit integrated in the cable suppresses the transient voltages at a distance from a corresponding electronic circuit to which the cable is attached. Consequently, potentially damaging voltage transients imparted on the communication signals are clamped before reaching potentially sensitive inputs of the electronic circuit.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: May 30, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Stephen A. Scearce, Pongsak Sriwudhthanun, James C. Q. Tran
  • Patent number: 7009828
    Abstract: Self-quenching switching elements are connected in series in a semiconductor switching device. Snubber circuits including a diode, a capacitor, and a non-linear circuit are connected in parallel with the respective semiconductor switching elements. In the snubber circuit, the diode and the capacitor are connected in series, and the non-linear circuit is connected in parallel with the capacitor. The non-linear circuit includes an impedance element, a Zener diode, and a controlling semiconductor element and draws current through the controlling semiconductor element when applied voltage exceeds the Zener voltage of the Zener diode. The Zener voltage is larger than a divided voltage applied to the semiconductor element during a fault in a power system.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: March 7, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Ito, Akihiko Iwata, Akihiro Suzuki
  • Patent number: 6980447
    Abstract: A snubber circuit for use with, for example, a self-driven synchronous rectifier in a power converter is disclosed. The snubber circuit, in various embodiments, captures and recirculates energy from the leakage inductance of the converter in a substantially lossless manner. The snubber circuit comprises a capacitance for storing the energy accumulated in the leakage inductance of a transformer winding of the converter. The snubber circuit further includes a discontinuous inductor, and a switch for transferring, when on, the energy stored in the capacitance to the inductor. The energy in the inductor may then be discharged when the switch is off.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: December 27, 2005
    Assignee: Artesyn Technologies, Inc.
    Inventors: Todd Martin Schaible, John Phillip Schmitz
  • Patent number: 6924687
    Abstract: An invention is disclosed for protecting an input buffer. A current from a p-supply to an input buffer is lowered when an input voltage to the input buffer is tolerant HIGH. The p-supply being a VDD voltage supplied to a p-channel transistor in the input buffer. In addition, the p-supply is set to a particular voltage when the input voltage to the input buffer is LOW, the particular voltage being at a specific value such that input transistors within the input buffer do not experience overstress voltages. Optionally, p-supply can be prevented from supplying current to the input buffer when an input voltage to the input buffer is tolerant HIGH.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: August 2, 2005
    Assignee: Artisan Components, Inc.
    Inventors: Brian Reed, Puneet Sawhney, Jayanth Thyamagundlam, Scott T. Becker
  • Patent number: 6906502
    Abstract: A power converter output voltage regulation method in which sensed output voltages and sensed currents are stored in a memory during a plurality of time intervals. In each time interval the sensed output voltage and the sensed current is compared with the sensed output voltage and sensed currents in time intervals previously stored in the memory. If preceding data are found to match the most recent data, an open loop response is applied. If the most recent data and stored previous data do not match, a closed loop response is applied.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: June 14, 2005
    Assignee: Fyre Storm, Inc.
    Inventors: Kent Kernahan, David F. Fraser, Jack Roan
  • Patent number: 6903911
    Abstract: A protective circuit (SCH) for a line-commutated thyristor bridge (B, B?), which is designed for feeding energy of a power circuit connected to the bridge and also for feedback from this circuit, and which is connected between the thyristor bridge and the power circuit. In a series branch of the protective circuit, there is at least one IGBT transistor (GT1, GT2), which is biased in the feedback direction with an inverse-parallel diode (D1, D2; D1p), and which can be deactivated for the appearance of a tipping recognition signal (sk, Us1), which is supplied by a control circuit (AST) associated with the transistor.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: June 7, 2005
    Assignee: Siemens AG Osterreich
    Inventors: Wilhelm Reischer, Leo Karl, Heinz Pichorner, Franz Wöhrer
  • Patent number: 6813172
    Abstract: A power supply circuit for a video display device including a power transformer for inducing a voltage with respect to an input voltage by using an interaction occurring between a primary coil and a secondary coil; a switching circuit unit for controlling the voltage to be induced at the secondary coil of the power transformer by switching on/off a current flowing along the primary coil of the power transformer; first and second TVS diodes serially connected to each other; first and second resistors parallel connected to the respective first and second TVS diodes; a capacitor parallel connected to both ends of the first and second TVS diodes connected to each other and being charged with the transient voltage in the reverse direction that is supplied through the primary coil of the power transformer; and a diode for forming a passage of current in one direction when the capacitor is charged.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: November 2, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Cheol-jin Park
  • Patent number: 6750563
    Abstract: A voltage sag and over-voltage compensation device for an AC electric power distribution system employing cascaded switching devices and a pulse-width modulated transformer. Each stage of the cascaded switching device includes a switching element located within a full-bridge rectifier circuit to allow bi-directional switching through each switching element (i.e., switching through the same switching element during the positive and negative portions of the AC voltage cycle). Each full-bridge rectifier also includes a snubber circuit connected in parallel with a corresponding switching element to absorb the current discharge caused by switching the input power supply to the transformer through the corresponding switching device under non-zero current conditions.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: June 15, 2004
    Assignee: SSI Power LLC
    Inventors: Joseph R. Rostron, Dong-Myung Lee
  • Patent number: 6690143
    Abstract: A power factor correction (PFC) circuit with a resonant snubber. The power factor correction (PFC) circuit has an input part (601) for receiving an AC voltage and outputting a first DC voltage; a main part (604) for converting the first DC voltage to a second DC voltage; and a snubber (500) for ensuring the main part operates in soft turn-on and soft turn-off. The main part (604) has a primary inductor and a primary diode connected in series, and a switch (606) connected to the connection node of the primary inductor and the primary diode. The snubber (500) has a cascaded device (a first diode and a resonant inductor connected in series) and a second diode connected in series, and a resonant capacitor connected between the connection node of the cascaded device and second diode, and the switch (606).
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: February 10, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Pao-Chuan Lin, Chun-Hsien Lee, Chih-Hsin Chen, Chung-Shing Tzou
  • Patent number: 6630805
    Abstract: An actively controlled regenerative snubber configuration for use in unipolar brushless direct current motors comprises a first inductor, a first switch and a capacitor, all of which are connected in series to a positive voltage supply and in parallel with a second inductor and a second switch. The regenerative snubber is used to maintain constant voltage across the switches to prevent braking of the motor through conduction of motor back EMF and to return excess energy stored in the motor phase coils to the positive voltage supply. The return of energy to the positive rail is done in a manner so as to minimize conducted electromagnetic interference at the power leads.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: October 7, 2003
    Assignee: Siemens VDO Automotive Inc.
    Inventor: John Edward Makaran
  • Patent number: 6621676
    Abstract: An apparatus and method of use opposes a short circuit failure mode in a printer having a printhead controller circuit driving an address bus connected to two or more printheads. A failure protection circuit associates one resistor group with each address line within the address bus that extends into at least two printheads. In particular, one address line resistor is placed in series between the address lead extending from a head driver IC within the printhead controller circuit and each printhead into which the address line extends. Where an address line shorts, the associated address line resistor protects the head driver IC from the short, allowing it to control the voltage potential of that address line in any printhead that has not failed. The user is then able to identify and replace the non-functioning printhead.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: September 16, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: E. Lewis Barton, Charles R. Headrick
  • Patent number: 6597227
    Abstract: An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: July 22, 2003
    Assignee: Atheros Communications, Inc.
    Inventors: Chik Patrick Yue, Siu-Weng Simon Wong, David Kuochieh Su, William John McFarland
  • Patent number: 6594130
    Abstract: Circuits and methods for protecting thyristors in a bridge configuration are provided. A circuit comprises a line reactor in series with the input of the bridge and the input of the diametric cell, two leg reactors each in series with a respective leg and an output of the diametric cell. Two snubber circuits in parallel with the two thyristors that comprise the diametric cell may also be used to protect the thyristors.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: July 15, 2003
    Assignee: General Electric Co.
    Inventors: Robert Gregory Wagoner, Lee Covington Robert, Brian Mathew Hamill
  • Patent number: 6593794
    Abstract: An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: July 15, 2003
    Assignee: Atheros Communications
    Inventors: Chik Patrick Yue, Siu-Weng Simon Wong, David Kuochieh Su, William John McFarland
  • Publication number: 20030103305
    Abstract: Circuits and methods for protecting thyristors in a bridge configuration are provided. A circuit comprises a line reactor in series with the input of the bridge and the input of the diametric cell, two leg reactors each in series with a respective leg and an output of the diametric cell. Two snubber circuits in parallel with the two thyristors that comprise the diametric cell may also be used to protect the thyristors.
    Type: Application
    Filed: November 29, 2001
    Publication date: June 5, 2003
    Inventors: Robert Gregory Wagoner, Lee Covington Robert, Brian Mathew Hamill
  • Patent number: 6559562
    Abstract: A voltage sag and over-voltage compensation device for an AC electric power distribution system employing cascaded switching devices and a pulse width modulated autotransformer. The autotransformer typically includes lower, center, and upper poles or taps with cascaded switching devices for selectively connecting the voltage source (i.e., a phase of the distribution line) between the lower pole and the center or upper poles. Each stage of the cascaded switching device includes a switching element located within a full-bridge rectifier circuit to allow bi-directional switching through each switching element (i.e., switching through the same switching element during the positive and negative portions of the AC voltage cycle).
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 6, 2003
    Assignee: SSI Power, LLC
    Inventor: Joseph R. Rostron
  • Patent number: 6509779
    Abstract: An ESD protection circuit uses an inductor to create an electromagnetic resonance in conjunction with the load capacitance of a conventional ESD device. By properly tuning the resonance of this combination, the protective properties of the ESD device can be maintained while minimizing its capacitive load on the main circuit. The inductor can be interposed in various series configurations with the ESD device between the main circuit and a voltage rail; alternatively, the inductor can be connected in various configurations in parallel with the ESD device. The inductor may be implemented as an on-chip inductor using conventional IC fabrication technologies, or may be implemented using IC chip bonding wires as inductors.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: January 21, 2003
    Assignee: Atheros Communications, Inc.
    Inventors: Chik Patrick Yue, Siu-Weng Simon Wong, David Kuochieh Su, William John McFarland
  • Patent number: 6445561
    Abstract: A circuit arrangement, in particular for triggering an ignition output stage, having a power switching transistor and a switchable freewheeling circuit or an auxiliary channel. The freewheeling circuit or the auxiliary channel may be constituted by a triggerable four-layer element.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: September 3, 2002
    Assignee: Robert Bosch GmbH
    Inventor: Hartmut Michel
  • Patent number: 6434029
    Abstract: A boost converter topology is disclosed that includes a resonant network comprising a snubber inductive element having a primary winding connected in series to a first resonant diode that is connected, at a first node, to two series connected additional resonant diodes and a secondary winding coupled to a fourth resonant diode connected to the first node. The present invention has the advantage of reducing the energy stored in the parasitic capacitor of the first resonant diode by a factor of four at the turn off of the main control switch. This reduction is achieved by allowing only a small amount of energy transfer to the snubber inductive element so that it does not turn the two additional resonant diodes on before the auxiliary switch is turned on, thus reducing losses and EMI associated with turning on the auxiliary switch.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: August 13, 2002
    Assignee: Astec International Limited
    Inventors: Jean-Marc Cyr, Richard Verreau
  • Patent number: 6396672
    Abstract: A circuit that includes a silicon-controlled rectifier and a silicon-controlled rectifier gate trigger circuit connected to the silicon-controlled rectifier. A snubber capacitor is connected to the silicon-controlled rectifier and the silicon-controlled rectifier gate trigger circuit. The snubber capacitor generates a snubber capacitor voltage during an off state of the silicon-controlled rectifier. The snubber capacitor voltage thus developed is then used to power the silicon-controlled rectifier gate trigger circuit. The circuit also includes a resister-zener diode circuit connected to the snubber capacitor and an auxiliary capacitor. The auxiliary capacitor is charged through the resister-zener diode circuit by the snubber capacitor voltage. A voltage regulator is connected between the auxiliary capacitor and the silicon-controlled rectifier gate trigger circuit for providing a regulated voltage.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: May 28, 2002
    Assignee: Electric Power Research Institute, Inc.
    Inventor: David R. Deam
  • Patent number: 6268990
    Abstract: A semiconductor protection device is used to suppress a surge voltage to a preset value or less, the surge voltage being caused at each turn-OFF time of 50 Hz to 20 kHz of a main IGBT functioning as a switch of a power converting system. The semiconductor protection device includes a protection IGBT for forming a bypass connected in parallel with the main IGBT and an electric field sensing element connected in a reverse direction between the collector of the main IGBT and the gate of the protection IGBT. When the surge voltage exceeds a preset value which is a breakdown voltage of the electric field sensing element, the protection IGBT is turned ON so as to cause a current generated by energy of the surge voltage to be bypassed.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: July 31, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Kimihiro Hoshi