Including Semiconductor Means Patents (Class 363/60)
  • Patent number: 7474141
    Abstract: A mode transition control method and circuit switch a charge pump to an operating mode with lower conversion ratio at a regular interval when the input voltage of the charge pump is detected close to a mode transition point, so as to prevent from misjudgment on the mode transition of the charge pump due to external noise, loading change, or inaccurate equivalent resistance of the charge pump.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: January 6, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Tsung-Wei Huang, Jien-Sheng Chen, Shui-Mu Lin, Nien-Hui Kung
  • Patent number: 7468898
    Abstract: A step down DC-DC converter is reduced in the cost by reducing a number of capacitors included. The DC-DC converter is provided with switches that connect (n?1) capacitors in parallel with each other and switches that connect the capacitors in series with each other. In phase 1, some switches are turned on to connect the capacitors in parallel between an output terminal and a ground voltage so that the capacitors are charged. In phase 2, other switches are turned on to connect the capacitors in series between the output terminal and an input voltage so that the capacitors are discharged. A stepped down output voltage, that is 1/n times of the input voltage, is obtained by alternating the phase 1 and the phase 2 until a stable state is reached.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: December 23, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takashige Ogata, Tatsuya Suzuki
  • Patent number: 7466187
    Abstract: A booster circuit for boosting and outputting a voltage between a power supply potential line and a reference potential line using a capacitor connected between a boosted voltage output node and the reference potential line that includes a first switch for separating the capacitor from the boosted voltage output node while a boosting operation is suspended, a second switch connected in parallel to the capacitor and being conductive while the boosting operation is suspended, and an electric path between the power supply potential line and the boosted voltage output node while the boosting operation is suspended.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: December 16, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Hirokazu Kawagoshi
  • Patent number: 7466189
    Abstract: The present invention provides a charge pump circuit capable of achieving desired boosting operation even when a high-side switch for precharge or a low-side switch for driving output is constructed by a low-withstand-voltage transistor. The high level of a drive input signal for driving a high-side switch for precharge and a low-side switch for driving output in response to a clock signal is set to the level of a boosted output voltage. The low level of the drive input signal is set to the level of an input voltage, not ground potential.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: December 16, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yasuyuki Sohara, Masayasu Tanaka, Yasuhiro Okazaki
  • Patent number: 7466572
    Abstract: A three-phase voltage tripler includes first, second, and third capacitive elements and a switching module. The switching module selectively switches connections among the capacitive elements and between the capacitive elements and a reference voltage during first, second, and third periods. The switching module charges the first capacitive element to a first voltage level during the first period, the second capacitive element to a second voltage level during the second period, and the third capacitive element to a third voltage level during the third period. The third voltage level is greater than the second voltage level and the second voltage level is greater than the first voltage level.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: December 16, 2008
    Assignee: Marvell International Ltd.
    Inventors: Siew Yong Chui, Jye Sheng Hong
  • Patent number: 7453711
    Abstract: A step-up power supply unit for providing a multiplicity of different step-up voltages as needed, generated by stepping up a voltage of a single power source such as a battery. The step-up voltage of the last stage charge pump unit and the step-up voltage of at least one charge pump unit other than the last stage charge pump unit, are made available as multiple output voltages. When one or more of the output voltages are not needed, all the charge pump units subsequent to the one providing the highest output voltage are disabled based on an output voltage control signal, thereby minimizing the size and cost of the step-up circuit and reducing the power consumption by the circuit.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: November 18, 2008
    Assignee: Rohm Co., Ltd.
    Inventors: Osamu Yanagida, Kunihiro Komiya
  • Publication number: 20080278978
    Abstract: A method and apparatus for a power converter assembly charges a first capacitor and a second capacitor in parallel to a first voltage and at a first polarity, and then discharges the first capacitor and second capacitor in series at an output voltage that is greater than the input voltage and at a second polarity that is opposite the first polarity. This “charge pump” process is repeated and filtered to produce a continuous output.
    Type: Application
    Filed: May 8, 2007
    Publication date: November 13, 2008
    Applicant: SIEMENS VDO AUTOMOTIVE CORPORATION
    Inventor: Perry R. Czimmek
  • Patent number: 7449937
    Abstract: A power supply circuit, comprises a booster circuit that boosts the voltage supplied from a power supply to produce an output voltage; a voltage divider circuit that divides said output voltage by resistive division and outputs a monitored voltage; a comparator circuit that compares said monitored voltage with a reference voltage and outputs a signal to activate said booster circuit if said monitored voltage is lower than said reference voltage and a signal to deactivate said booster circuit if said monitored voltage is higher than said reference voltage; an auxiliary instruction circuit that outputs an auxiliary signal to control the timing of the activation of said booster circuit; and an arithmetic circuit that performs a calculation using said auxiliary signal and the output signal of said comparator circuit and outputs an enable signal to activate said booster circuit if the output signal of said comparator circuit is a signal to activate said booster circuit, or said auxiliary signal is a signal to acti
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: November 11, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshikazu Takeyama
  • Patent number: 7449944
    Abstract: An internal voltage generator includes a high efficient charge pump. The internal voltage generator includes an oscillation signal generator for receiving a reference voltage and a pumping voltage to thereby output an oscillation signal, a pump control logic for outputting a pumping control signal and a precharge signal in response to the oscillation signal, and a charge pump for precharging the pair of bootstrapping node by connecting the pair of bootstrapping node in response to the precharge signal to thereby generate the pumping voltage of a predetermined level after precharging the pair of bootstrapping node into a level of the power supply voltage and charge sharing the pair of bootstrapping node and the pumping voltage in response to the precharge signal. Herein, the pumping control signal controls a pumping operation and the precharge signal precharges a pair of bootstrapping node for generating the pumping voltage by pumping a power supply voltage.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: November 11, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang-Jin Byeon, Jae-Jin Lee
  • Patent number: 7446594
    Abstract: Disclosed is a booster circuit comprising a voltage detection circuit for outputting a decision output signal for detecting a boosted voltage and controlling a voltage boosting operation, an oscillation circuit, and a plurality of charge pump circuits. The oscillation circuit includes an odd number of stages of control-type inverters. When the decision output signal from the voltage detection circuit indicates the voltage boosting operation (oscillation), the odd number of stages of inverters constitute a closed path. Oscillation outputs from outputs of the control-type inverters are thereby extracted, respectively. When the decision output signal indicates a stop of the voltage boosting operation (stop of the oscillation), output values of the control-type inverters are not inverted and held, and the oscillation is thereby stopped. The charge pump circuits receive output signals from the control-type inverters as clock signals, respectively, and operate.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: November 4, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Kazunori Yamane, Akira Satou, Toshiharu Okamoto
  • Publication number: 20080266913
    Abstract: A portable power supply includes a housing, and power circuitry providing an output AC waveform having a first positive voltage step level, a second higher positive voltage step level, a third lower positive voltage step level, a fourth negative voltage step level, a fifth higher negative voltage step level, and a sixth lower negative voltage step level.
    Type: Application
    Filed: February 26, 2008
    Publication date: October 30, 2008
    Inventors: Daniele C. Brotto, Nathan J. Cruise, Erik Ekstrom, Pradeep M. Pant, David A. Carrier, Shailesh P. Waikar, Ren Wang, Mehdi T. Abolhassani, William D. Spencer, Rouse Roby Bailey, Andrew E. Seman, John E. Buck, Seth M. Robinson
  • Patent number: 7436239
    Abstract: Provided is an electronic device including a charge pump circuit whose circuit structure is simple and boosting efficiency is high. The charge pump circuit uses MOSFETs as charge transfer elements and has a structure in which a voltage of a gate of a charge transfer MOSFET is controlled to a predetermined level based on a dividing voltage caused by a first resistor connected between a source and the gate thereof and a second resistor connected between a drain and the gate thereof and a clock pulse for on/off control of the charge transfer MOSFET is supplied to the gate through a capacitor.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: October 14, 2008
    Assignee: Seiko Instruments Inc.
    Inventors: Hiroyuki Masuko, Fumiyasu Utsunomiya
  • Publication number: 20080239772
    Abstract: A switched capacitor converter has a supply voltage input, an output circuit with one or more load capacitors, a semiconductor switch network. The switch network is connected at a switch junction point and across the voltage input, and has one or more pairs of said first and second switches. Each pair of switches is associated with one of the load capacitors and each pair is connected in series. The converter also has a charging capacitor network connected across the semiconductor switch network and across the voltage input. The charging capacitor network has one or more charging capacitors and inductances connected between the switch junction point and the output circuit. Each of the charging capacitors and inductances is associated with one of the load capacitors. The load capacitors are each charged by the associated charging capacitor when the associated first switch is closed and the associated second switch is open.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: Intel Corporation
    Inventors: Bradley S. Oraw, Pavan Kumar
  • Patent number: 7430133
    Abstract: A switched-capacitor type voltage regulator is provided. The regulator includes a flying capacitor and switches, including first and second transistors which operate as switches. The switches are arranged to operate such that the flying capacitor is coupled to an input voltage during a first phase, and switched to provide an output voltage during a second phase. During the first phase, the first transistor is employed to couple the capacitor to the input voltage, and a second transistor is employed to couple (the other side of) the capacitor to another node (e.g. Ground). Additionally, another switch is coupled between the gate and the drain of either the first transistor or the second transistor. Also, during the first phase, if the input voltage is greater than the output voltage, the other switch is closed so that the transistor that the other switch is connected to operates as a diode.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: September 30, 2008
    Assignee: National Semiconductor Corporation
    Inventors: William J. McIntyre, Mengzhe Ma
  • Patent number: 7427889
    Abstract: A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: September 23, 2008
    Assignee: eMemory Technology Inc.
    Inventors: Yen-Tai Lin, Ching-Yuan Lin
  • Publication number: 20080212346
    Abstract: A method for modulating the impedance of an antenna circuit supplying pump signals to a charge pump comprising at least one first pump stage and one last pump stage, the last pump stage supplying a continuous voltage. The output of the first pump stage is short-circuited by means of a switch and the last pump stage goes on pumping electric charges and supplying the continuous voltage. Application in particular to RFID passive transponders.
    Type: Application
    Filed: February 27, 2008
    Publication date: September 4, 2008
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Pierre Rizzo, Christophe Moreaux, David Naura, Ahmed Kari
  • Publication number: 20080212347
    Abstract: A switched-capacitor regulator is provided for regulating the output voltage of a voltage supply. The switched-capacitor regulator includes a supply input terminal capable of receiving a supply voltage, two or more flying capacitors, a regulation switch located between each flying capacitor and the supply input terminal, and a voltage control circuit. The activity of the regulation switches is controlled by the voltage control circuit. In one embodiment of the invention, the voltage control circuit includes a feedback resistance area having one or more feedback resistors located between the output of the flying capacitors and a ground terminal, a first gain stage connected to the feedback resistance area, and two or more second switchable gain stages, which are each connected to a regulation switch and the first gain stage. The switched-capacitor regulator operates in pseudo-continuous regulator mode using three-stage switchable operational amplifiers with time-multiplexed pole-splitting compensation.
    Type: Application
    Filed: March 31, 2008
    Publication date: September 4, 2008
    Applicant: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Kwok Tai Philip Mok, Hoi Lee
  • Patent number: 7411799
    Abstract: An apparatus for regulating a switching device that couples an output locus with one of a first voltage locus and a second voltage locus in response to a driver unit includes: a voltage feedback unit coupling the driver unit with at least one of the first voltage locus and the second voltage locus. The feedback unit provides a voltage feedback signal to the driver unit. The driver unit responds to the voltage feedback signal to affect the coupling by the switching device.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: August 12, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick Muggler, David John Baldwin, Roy Clifton Jones, III
  • Patent number: 7397680
    Abstract: A circuit that provides a method and apparatus to actively balance capacitor leakage current from series stacked capacitors and disconnects itself when stacked capacitors are configured for doubler operation. In one embodiment, the active circuit includes high voltage low current transistors, such as for example a PNP bipolar transistor and an NPN bipolar transistor, that are configured in a sink-source voltage follower arrangement with the bases of the transistors connected to a voltage divider network and referenced to a fraction of a DC input voltage with a very high impedance, low dissipative resistor divider network. In one embodiment, the emitters of the PNP and NPN transistors are both tied to the connection point between capacitors in the stack and provide an active sink-source drive, which maintains the voltage at this point to be bounded by the input reference voltages of sink-source followers.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: July 8, 2008
    Assignee: Power Integrations, Inc.
    Inventor: Arthur B. Odell
  • Patent number: 7397677
    Abstract: A charge pump is provided. The charge pump may include an oscillator, a first switch, a second switch, a capacitor/switch network, an error amplifier, an adjustable resistance circuit, a first switch driver, and a second switch driver. In one embodiment, the first and second drivers each receive the oscillator voltage, and drive the first and second switches, respectively. Further, the adjustable resistance circuit is connected in series with the first and second switch circuits. The charge pump is arranged in a closed loop with the error amplifier driving the adjustable resistance circuit. The resistance of the adjustable resistance circuit is modulated to regulate the output voltage.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: July 8, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Michael John Collins, Richard Frank
  • Publication number: 20080158920
    Abstract: An energy storage system and corresponding method, provides an efficient use of stored energy and more regulated power to an output terminal in the event of an interruption in line input power. In one embodiment, an energy storage system has a pulse width modulation (PWM) DC-DC converter module configured to convert line input power to a first regulated output at an output terminal. A pump storage module is coupled to the PWM DC-DC converter module at the output terminal and stores energy from the first regulated output and converts the stored energy to a second regulated output. The energy storage system has a logic unit coupled to the converter module to cause the converter module and pump storage module to transition power at the output terminal from the first regulated output power to the second regulated output power in an event of interruption in the line input power.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Inventors: Mark W. Hastings, Mahlon D. Kimbrough, James J. Gainer, Thomas Zoltek
  • Patent number: 7394307
    Abstract: A voltage regulator having a MOS transistor driver includes a p-channel MOS transistor at a voltage input terminal Vin and a p-channel MOS transistor at a voltage output terminal Vout. A drain of the input side p-channel MOS transistor is connected to the voltage input terminal Vin. A threshold voltage or a voltage lower than the threshold voltage is applied to a gate of the input side p-channel MOS transistor. A drain of the output side p-channel MOS transistor is connected to the voltage output terminal Vout. A current flowing through the input side p-channel MOS transistor drives a voltage regulator circuit and the output side p-channel MOS transistor.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: July 1, 2008
    Assignee: Ricoh Company, Ltd.
    Inventors: Takaaki Negoro, Koichi Morino
  • Publication number: 20080130329
    Abstract: A miniaturized system on a chip that incorporates a positive high voltage charge pump and a negative high voltage charge pump into one pump circuit and shares components. A voltage control apparatus in a semiconductor device may include at least one of the following: First and second input/output units capable of inputting or outputting voltage. A voltage booster that receives and boosts a voltage from one of the first and second input/output unit and outputs the boosted voltage from the other input/output unit. An output selector that receives the boosted voltage from the voltage booster and selects one of the positive or the negative voltage to output. An output controller that receives the boosted voltage from the voltage booster and controls and/or regulates the output voltage. An output unit that outputs the generated output voltage.
    Type: Application
    Filed: September 4, 2007
    Publication date: June 5, 2008
    Inventor: Yong-Seop Lee
  • Patent number: 7382176
    Abstract: A charge pump circuit has a voltage increasing stage and a voltage decreasing stage in parallel, and sharing a common input. This shows charge to flow between the stages, so that charge used in the pumping of one stage is recycled to the other stage.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: June 3, 2008
    Assignee: TPO Hong Kong Holding Limited
    Inventors: John R. A. Ayres, Keitaro Yamashita
  • Patent number: 7382177
    Abstract: A voltage pump comprising a charging transistor responsive to a first control signal, the charging transistor operable to connect a node to a first voltage, a pumping capacitor responsive to a second control signal, the pumping capacitor operable to pump additional charge the node, and a pumping transistor responsive to a third control signal, the pumping transistor operable to connect the node to an output, wherein the charging transistor, the pumping capacitor, and the pumping transistor are thin-gate transistors. A method comprising charging a node to a first voltage, boosting the node to a second voltage, and connecting the node to an output, wherein the absolute value of the gate-to-source, gate-to-drain, and drain-to-source voltages of the plurality of thin-gate transistors does not exceed the absolute value of a supply voltage. Because of the rules governing abstracts, this abstract should not be used to construe the claims.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: June 3, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Michael Cordoba, Hal Butler
  • Patent number: 7382635
    Abstract: A power supply apparatus includes an input terminal to be connected to a DC power supply, a DC-DC converter connected to the input terminal, a first capacitor, a second capacitor, an output terminal, a first switch connected between an output port of the DC-DC converter to charge the first capacitor, a second switch connected between the first capacitor and the output terminal to discharge the first capacitor, a third switch connected between the output port of the DC-DC converter and the second capacitor to charge the second capacitor, a fourth switch connected between the second capacitor and the output terminal to discharge the second capacitor, and a switch controller. The switch controller is operable to charge the first capacitor and the second capacitor alternately charged, discharge the first capacitor and the second capacitor alternately, and prevent the output port of the DC-DC converter from being connected to the first output terminal.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: June 3, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masaaki Noda
  • Patent number: 7382634
    Abstract: Capacitive voltage multiplier for generating voltage pulses, preferably up to 100 V, that are higher than the supply voltage for displays, non-volatile memories and corresponding units especially in small electronic devices, such as handheld telecommunication terminals or corresponding devices, wherein the multiplier comprises a switching capacitor circuit (21) provided with capacitors and switches for charging the capacitors in parallel and discharging them in series in order to deliver a high voltage pulse. The multiplier further comprises a diode chain circuit (22) consisting of a diode-chain and pumping capacitors for delivering high voltage current. The inventive system allows the output high voltage to be switched on and held with little longtime drop and with small switching losses and able to supply a load current without significant ripple. Additionally switching the high voltage on and off does not result in efficiency loss.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: June 3, 2008
    Assignee: Nokia Corporation
    Inventor: Michael Buchmann
  • Patent number: 7375502
    Abstract: A method and a circuit for scrambling the current signature of a load comprising at least one integrated circuit executing digital processings, including supplying at least the integrated circuit from a supply voltage external to the circuit by combining a current provided by a first linear regulator with a current provided by at least one capacitive switched-mode power supply circuit with one or several switched capacitances.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: May 20, 2008
    Assignees: STMicroelectronics S.A., Universite D.Aix-Marseille I
    Inventors: Alexandre Malherbe, Edith Kussener, Vincent Telandro
  • Patent number: 7375992
    Abstract: A switched-capacitor regulator is provided for regulating the output voltage of a voltage supply. The switched-capacitor regulator includes a supply input terminal capable of receiving a supply voltage, two or more flying capacitors, a regulation switch located between each flying capacitor and the supply input terminal, and a voltage control circuit. The activity of the regulation switches is controlled by the voltage control circuit. In one embodiment of the invention, the voltage control circuit includes a feedback resistance area having one or more feedback resistors located between the output of the flying capacitors and a ground terminal, a first gain stage connected to the feedback resistance area, and two or more second switchable gain stages, which are each connected to a regulation switch and the first gain stage. The switched-capacitor regulator operates in pseudo-continuous regulator mode using three-stage switchable operational amplifiers with time-multiplexed pole-splitting compensation.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: May 20, 2008
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Kwok Tai Philip Mok, Hoi Lee
  • Patent number: 7369419
    Abstract: A voltage converter comprises an input terminal receiving a DC input voltage, an output terminal outputting an output voltage, a first switch coupled between a first node and the input terminal, a second switch coupled between the input terminal and a second node, a first capacitor coupled between the first node and the second node, a third switch coupled between the second node and ground, a fourth switch coupled between a third node and ground, a first electrical device coupled between the third node and the input terminal, a load capacitor coupled between ground and the output terminal, a second electrical device coupled between the first node and the output terminal, a second capacitor coupled between the third node and a fourth node, a fifth switch coupled between the first node and the fourth node, and a sixth switch coupled between the second node and the fourth node.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: May 6, 2008
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Rogelio L Erbito, Jr.
  • Patent number: 7368977
    Abstract: A dimming method for LED driving circuit is proposed. By temporary switching a pin that is originally used for the input/output of other electric signals to a high impedance node, the dimming control signal may be inputted to dim LEDs. The dimming method comprises the steps of: floating the pin every a period of time to pull the pin's voltage being equal to the dimming control signal; detecting the pin's voltage; and retrieving the dimming control signal in accordance with the detected pin's voltage and thereafter dimming the LEDs.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: May 6, 2008
    Assignee: Richtek Technology Corp.
    Inventors: Wei-Hsin Wei, Shui-Mu Lin, Chien-Sheng Chen, Tsung-Wei Huang, Chin-Chiang Yeh, Chin-Tsung Chen
  • Patent number: 7365523
    Abstract: A method and a circuit for scrambling the current signature of a load including at least one integrated circuit executing digital processings, including the step of, at least on the load ground side, combining a current absorbed by a first linear regulator with a current absorbed by at least one capacitive switched-mode circuit with one or several switched capacitances.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: April 29, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Alexandre Malherbe, Edith Kussener, Vincent Telandro
  • Patent number: 7358794
    Abstract: A power supply circuit includes a charge pump converting voltage and a regulator controlling the converting operation of the charge pump. The charge pump stops the converting operation after a first delay time from when an output of the charge pump goes over a reference level and starts the converting operation after a second delay time longer than the first delay time from when the output of the charge pump goes below the reference level.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: April 15, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Hirokazu Kawagoshi
  • Patent number: 7348828
    Abstract: The present invention provides voltage supplier for supplying an internal voltage with optimized drivability required for internal operation. The voltage supplier of a semiconductor memory device includes: an internal voltage detection means for detecting a voltage level of an internal voltage; a clock oscillation means for outputting a charge pumping clock signal; an internal voltage control means for controlling the clock oscillation means to be performed selectively in accordance with a data access mode or a non-data access mode; and a charge pumping means for outputting the internal voltage required for internal operation by pumping charges in response to the charge pumping clock signal.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: March 25, 2008
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kang-Seol Lee, Jae-Jin Lee
  • Patent number: 7345525
    Abstract: A voltage pumping device is disclosed. The device may include a voltage level detector for detecting a level of a voltage fed back thereto and generating a voltage pumping enable signal according to the detected voltage level, an oscillator for operating in response to the voltage pumping enable signal and generating a desired pulse signal in a normal operation mode, a clock supply controller for receiving an external clock signal, operating in response to the voltage pumping enable signal and outputting the external clock signal in a low-power operation mode, and a voltage pump for performing a voltage pumping operation in response to the pulse signal from the oscillator in the normal operation mode and performing the voltage pumping operation in response to the clock signal from the clock supply controller in the low-power operation mode.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: March 18, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Park, Ja Gou
  • Patent number: 7342389
    Abstract: In one embodiment the present invention includes a voltage converter operable in both buck and boost modes. The voltage converter may only include one switched capacitor. A programmable current source, which may be implemented as a switch array, generates a current into the switch capacitor during a first time period to produce a voltage across the capacitor. During a second time period, the voltage may be transferred to the output of the converter, or boosted by coupling the input voltage to one terminal of the switched capacitor coupling the other terminal of the capacitor to the output. A feedback circuit is coupled to a controller for reprogramming the current into the capacitor to maintain the output voltage at desired levels.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: March 11, 2008
    Assignee: Diodes, Inc.
    Inventors: Wei Wu, Ling Zhu
  • Patent number: 7342437
    Abstract: A size of a charge pump circuit is reduced as well as its cost. In a positive booster charge pump circuit in an embodiment of this invention, a positive boosted voltage 2VDD generated at its first stage node is used as a gate voltage to turn on a MOS transistor that outputs a high level (VDD) of each of the first, third and fourth clock drivers. And in a negative charge pump circuit, a negative boosted voltage ?VDD generated at its first stage node is used as a gate voltage to turn on a MOS transistor that outputs a high level of each of the second and fifth clock drivers.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: March 11, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yoshitaka Onaya, Tatsuya Suzuki
  • Patent number: 7336121
    Abstract: A negative voltage generator is controlled responsive to a word line precharge signal. Voltage fluctuations in a negatively biased word line scheme are reduced by using a kicker circuit to provide a predetermined amount of negative charge to shut off a word line during a precharge operation. The negative voltage generator includes first and second negative charge pumps. The second charge pump is activated responsive to the word line precharge signal. A negative voltage regulator can be used to regulate a negative voltage signal. A level shifter uses two voltage dividers and a differential amplifier to reduce response time, output ripple, and sensitivity to process and temperature variations. A negative voltage regulator cancels ripple from a charge pump to provide a stable negative bias voltage and reduce the amount of charge needed to precharge a word line.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: February 26, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yoon Sim, Jei-Hwan Yoo
  • Patent number: 7324358
    Abstract: In a power supply apparatus including a charge-pump type step-up circuit adapted to carry out a stand-by operation to charge a step-up capacitor by a power supply voltage, and carry out a step-up operation to step up a charged voltage of the step-up capacitor and discharge a stepped-up charged voltage of the step-up capacitor to a smoothing capacitor, the step-up operation is controlled by a clock signal and an AND logic signal between the clock signal and a negative feedback control signal of an output voltage of the charge-pump type step-up circuit. The negative feedback control signal is a pulse width modulation signal so that a frequency of the AND logic signal is always the same as that of the clock signal.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: January 29, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Hirofumi Fujiwara
  • Patent number: 7323926
    Abstract: A charge pump circuit comprises a first pump stage, including a first sub-pump coupled to a first pre-charge MOSFET transistor, wherein the first sub-pump is used to pump down a gate of the first pre-charge MOSFET transistor to thereby increase the pre-charge efficiency of the first pre-charge MOSFET transistor. The higher efficiency the pre-charge MOSFET is, the lower the gate level of a pass transistor is. Thus, the charge sharing efficiency becomes better, and the body effect will be eliminated. The following pump stage is the same as the first pump stage. In addition, this pre-charging is implemented by PMOSFET only; therefore, only a single well is needed and then a small layout area can be achieved. Consequently, a high efficiency negative pump can be obtained.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: January 29, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuan-Yeu Chen, Yi-Ti Wang
  • Publication number: 20080007981
    Abstract: A voltage converter comprises an input terminal receiving a DC input voltage, an output terminal outputting an output voltage, a first switch coupled between a first node and the input terminal, a second switch coupled between the input terminal and a second node, a first capacitor coupled between the first node and the second node, a third switch coupled between the second node and ground, a fourth switch coupled between a third node and ground, a first electrical device coupled between the third node and the input terminal, a load capacitor coupled between ground and the output terminal, a second electrical device coupled between the first node and the output terminal, a second capacitor coupled between the third node and a fourth node, a fifth switch coupled between the first node and the fourth node, and a sixth switch coupled between the second node and the fourth node.
    Type: Application
    Filed: July 5, 2006
    Publication date: January 10, 2008
    Inventor: Rogelio L. Erbito
  • Patent number: 7317347
    Abstract: A two-phase charge pump is provided that is capable of being controlled by first and second clock signals that are out-of-phase and take alternatively a first value and a second value during consecutive phases. The charge pump includes a sequence of cascade-connected stages that each have a first section and a second section. Each section includes an input terminal and an output terminal, a capacitive element, and a controlled switch coupling the input terminal of the section with the output terminal of the section. The input terminals in each stage other than the first stage are cross-coupled with the output terminals in a preceding stage. The capacitive element has first and second terminals. The first terminals in the first and second sections receive the first and second clock signals, respectively, and the second terminal is coupled with the output terminal of the section. The controlled switch has a control terminal. In each stage, the control terminals are coupled to each other.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: January 8, 2008
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Mensi, Anna Richelli, Luigi Colalongo, Zsolt Miklos Kovacs-Vajna
  • Patent number: 7315197
    Abstract: A charge pump comprises a limit swing generator that receives an input signal and that generates a drive signal based on the input signal. A charge pump core includes output switches that generate a charge pump output in response to the drive signal. The drive signal includes a voltage level. The limit swing generator includes at least one voltage generator to control the voltage level of the drive signal such that the drive signal tracks a parametric variable of the output switches.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: January 1, 2008
    Assignee: Marvell International Ltd.
    Inventors: Jun Ming, Randy Tsang, Lawrence Tse
  • Patent number: 7312650
    Abstract: A step-down voltage output circuit preventing: latch-up phenomenon in a load circuit for a period between a power-supply activation and complete start of a charge pump circuit; and rapid change of a substrate potential when a step-down voltage output is changed from ON to OFF. The step-down voltage output circuit has a timer circuit that operates depending on control signals and a timer period; a first N-channel MOS transistor in which a source is connected to a step-down voltage output terminal, a drain is connected to ground, a gate is connected to a power-supply voltage input terminal through a resistance; and a second N-channel MOS transistor in which a source is connected to the step-down voltage output terminal, a drain is connected to the gate of the first N-channel MOS transistor, and a gate is connected to an output terminal of the timer circuit.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: December 25, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Taku Kobayashi, Keiichi Fujii, Yasunobu Kakumoto, Toshinobu Nagasawa
  • Patent number: 7310252
    Abstract: A voltage boosting circuit with a closed-loop control mechanism and a controllable slew rate. A tracking capacitor and a control current form the closed-loop and are used to adjust the slew rate of the boosting circuit. The closed-loop control and adjustable slew rate improve the accuracy and predictability of the boosting circuit's final boosted output voltage.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: December 18, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Hai Yan
  • Patent number: 7304531
    Abstract: Provided is an internal voltage generator for preventing an occurrence of leakage current while a charge pumping is not performed. The internal voltage generator includes: a charge pumping unit for pumping an external voltage to generate a high voltage higher than the external voltage; a level detecting unit for detecting a level drop of the high voltage with respect to a reference voltage and outputting a detection signal; an oscillating unit for generating an oscillation signal in response to the detection signal; a pumping control signal generating unit for controlling a driving of the charge pumping unit in response to the oscillation signal; and a charge pump controlling unit for precharging the charge pumping unit in response to the detection signal.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: December 4, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yong-Kyu Kim
  • Patent number: 7292089
    Abstract: The present invention is for preventing a charge pump from an unnecessary output voltage loss generated by a threshold voltage of a metal-oxide silicon (MOS) transistor. An apparatus for amplifying an inputted voltage includes an amplifying block including at least two pumping units for amplifying the inputted voltage to generate an output voltage; and at least two pumping capacitors, each coupled between two pumping units for supplying a charge in order to amplifying the output voltage of each pumping unit, wherein the pumping unit has a transferring block for transmitting the inputted voltage; and an activation block for activating the transferring block.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: November 6, 2007
    Assignee: Seoul National University Industry Foundation
    Inventors: Young-June Park, Jong-Shin Shin
  • Patent number: 7292462
    Abstract: A DC/DC converter that is small, light, highly efficient, and inexpensive are provided which includes a DC power supply input section, a first and second capacitor connected in series, and an output section connected to the series connected first and second capacitors, a switching device that switches a plurality of switches which incorporate a configuration for connecting a power supply of the DC power supply input section, to the first capacitor and the second capacitor, and a switching control device that controls ON/OFF switching of the respective switches in the switching device in accordance with an operation mode.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: November 6, 2007
    Assignee: Honda Motor Co., Ltd.
    Inventors: Yasuto Watanabe, Mitsuaki Hirakawa, Kouya Kimura
  • Publication number: 20070236972
    Abstract: In addition to an input terminal, an output terminal, a ground terminal, a plurality of external terminals, and a plurality of charge transfer switches, a semiconductor integrated circuit device has a step-up factor switching terminal. Here, the plurality of charge transfer switches each have a common contact connected to corresponding one of the plurality of external terminals and two selection contacts alternatively connected to the common contact, and one of the selection contacts of the plurality of charge transfer switches is connected to the step-up factor switching terminal, and each of the other selection contacts is connected to one of the input terminal, the output terminal, the ground terminal, and the rest of the other selection contacts. With this configuration, it is possible to make the semiconductor integrated circuit device versatile so that it can be used to form charge pump circuits having different step-up factors.
    Type: Application
    Filed: March 20, 2007
    Publication date: October 11, 2007
    Inventor: Yoshinori Imanaka
  • Patent number: 7279961
    Abstract: A charge pump generates a voltage higher than an intermediate voltage and a regulator circuit provides a first regulated voltage higher than the intermediate voltage. A second stage includes a regulator stage using the first voltage to provide the intermediate voltage from the first voltage. A charge pump provides a pump output voltage. The pump output voltage is divided and the divided voltage is presented to a first comparator that compares it with a reference voltage. The first comparator drives the gate of a first MOS transistor to regulate the pump output voltage to a regulated voltage related to the reference voltage. The regulated voltage is presented to a second comparator that compares it with the reference voltage. The second comparator drives the gate of a second MOS transistor to downconvert the regulated output voltage to an intermediate voltage related to the reference voltage.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: October 9, 2007
    Assignee: Atmel Corporation
    Inventors: Johnny Chan, Tin Wai Wong, Ken Kun Ye