Major-minor Patents (Class 365/15)
  • Patent number: 4316263
    Abstract: A magnetic bubble replication and transfer arrangement is disclosed which provides for replicating magnetic bubbles in thin planar layers of magnetic material without the need for electrical current carrying conductor elements. The arrangement includes a replicating half-disc permalloy element disposed in a particular way between first and second tracks formed from half-disc elements which are deposited on a surface of the magnetic layer. When a rotating magnetic field in the plane of the material is rotated in a predetermined direction with respect to the above arrangement, replication of a bubble in the first track occurs at a replication region where a portion of the replicating element is adjacent the first track. The original bubble continues movement within the first track while the newly formed bubble moves along the replicating element into the second track in response to rotation of the in-plane magnetic field.
    Type: Grant
    Filed: September 10, 1979
    Date of Patent: February 16, 1982
    Assignee: Sperry Corporation
    Inventor: William D. Doyle
  • Patent number: 4314358
    Abstract: A conductor-access, magnetic bubble memory organized in the major-minor mode has minor loops separated into minor loop segments. The segments can be powered for moving bubbles selectively only within the corresponding segments of the minor loops. A transfer operation moves bubbles between minor loop segments permitting bubble movement to the major loop. The ability to move bubbles only in a selected set of corresponding segments of the loops at a time permits operation with highly attractive power requirements.
    Type: Grant
    Filed: December 20, 1979
    Date of Patent: February 2, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Andrew H. Bobeck
  • Patent number: 4308591
    Abstract: In a field-access magnetic bubble memory X and Y coils encircle the chip for providing the rotating XY magnetic drive field when conventional drive signals are applied thereto. At least one of the coils is non-uniformly wound to provide a first predetermined magnitude of the drive field in first predetermined chip areas and a second lesser predetermined magnitude of the drive field in a second chip area. In the embodiment disclosed the chip has a dual-block replicate architecture with gates and bubble detectors requiring a relatively high drive field located in peripheral edge areas at the bottom and top of the chip. A plurality of data storage loops requiring a relatively low drive field are located in the medial portion of the chip. The outer layer of the Y coil is non-uniformly wound to provide a gap in registration with the medial area of the chip.
    Type: Grant
    Filed: September 29, 1980
    Date of Patent: December 29, 1981
    Assignee: National Semiconductor Corporation
    Inventors: Peter K. George, Saleem Akhtar
  • Patent number: 4308593
    Abstract: An interchangeable magnetic bubble memory device having first and second interchangeable memory bubbles, each of the modules including a magnetic bubble memory having at least one major loop or non-recirculating track, each major loop or track including a plurality of minor loops for storing magnetic bubbles. There are no more than n defective minor loop locations indicated by an error map. A detector produces data signals indicating the presence or absence of magnetic bubbles in the minor loops and a microprocessor provides control signals for controlling the transfer of the data signals between the data memory and the microprocessor. A driver is included and is responsive to the enable control signals from the microprocessor for transferring, replicating, generating and/or destroying the bubbles with low power consumption.
    Type: Grant
    Filed: May 14, 1979
    Date of Patent: December 29, 1981
    Assignee: Microcomputer Systems Corporation
    Inventors: B. Arlen Young, James S. Toreson
  • Patent number: 4301516
    Abstract: A magnetic bubble domain memory device is provided that includes a magnetic domain data chip having a major-minor loop organization with on-chip firmware providing redundancy information enabling the use of the chip even though one or more defective minor loops may be present thereon. One of the pages is written in the minor loop, where a page is defined as a common bit position in each of the plurality of minor loops, with a series of magnetic domains having an odd total number. The next succeeding page in the minor loops contains a series of magnetic domains and voids which are representative of the loop numbers of defective minor loops on the chip with the remaining pages in the minor loops having an even number of magnetic domains contained in each of the pages. Collectively, the pages containing the odd and even number of magnetic domains together with the page containing the map of the defective minor loops comprise the on-chip firmware providing redundancy information.
    Type: Grant
    Filed: December 12, 1979
    Date of Patent: November 17, 1981
    Assignee: NCR Corporation
    Inventor: William C. Ellsworth
  • Patent number: 4291389
    Abstract: This invention uses a plurality of bubble memory chips in a system for providing simultaneous input and output in a word or byte organized output. Each bubble memory chip has the same number of minor loops as is required for nominal memory size without the requirement for extra or redundant loops. Each bubble memory chip may have a number of faulty minor loops where the bit output is incorrect and cannot be used. However, a requirement for this system is that no two bubble memory chips may have a faulty bit or minor loop at the same major loop address location. An additional bubble memory chip is provided which will contain the correct data bits for locations corresponding to defective major loop addresses in the bubble memory chips making up the byte. A Programmable Read Only Memory (PROM) is provided and connected with a logic network to control the gating of the outputs of the bubble memory chips associated with the memory byte and the extra bubble memory chip to control the gating of the outputs.
    Type: Grant
    Filed: November 20, 1979
    Date of Patent: September 22, 1981
    Assignee: Control Data Corporation
    Inventor: Dolan H. Toth
  • Patent number: 4290117
    Abstract: In a memory device which has a plurality of recirculating type storage loops and in which information of the same addresses of the respective storage loops can be read and written in parallel, a memory device wherein information representing whether or not the corresponding storage loop is a bad or defective loop is written in a specified address of each of the storage loops.
    Type: Grant
    Filed: February 21, 1979
    Date of Patent: September 15, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Mamoru Sugie, Noboru Yamaguchi, Koichi Mayama, Yuzo Kita, Shigeru Yoshizawa, Nobuo Saito, Atsushi Asano
  • Patent number: 4283776
    Abstract: A gap between sets of contiguous discs defined by nonimplanted regions in an otherwise ion-implanted bubble layer allows an isolation between bubbles which leads to the achievement surprisingly close spacing between neighboring bubble paths. The misalignment of the gap axis with an axis of symmetry of the bubble layer is an important consideration in realizing the isolation.
    Type: Grant
    Filed: December 3, 1979
    Date of Patent: August 11, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Terence J. Nelson
  • Patent number: 4283771
    Abstract: A bubble domain chip is designed to provide the components necessary to perform all essential data-base functions. Many cross-linked loops in parallel allow the interchange of distinct columns of information. The use of an on-chip decoder achieves effective interchangeability of distinct rows of information. Thus, the basic storage structure and access modes conform to the high-level view of data implied by the relational data model, resulting in simpler programming. In addition, a plurality of comparators are provided to the plurality of storage loops to perform context search simultaneously on all the loops. The simultaneous search and the restriction to output of only qualified data greatly reduces the query time.
    Type: Grant
    Filed: July 31, 1978
    Date of Patent: August 11, 1981
    Assignee: International Business Machines Corporation
    Inventor: Hsu Chang
  • Patent number: 4281395
    Abstract: The magnetic bubble memory device of this invention is arranged such that a magnetic bubble detector and a nucleation type magnetic bubble generator in a chip are made to operate at different phases of the same operation cycle of a rotating magnetic field. Therefore, the operation time of the magnetic bubble detector and the operation time of the nucleation type magnetic bubble detector are completely separated from each other, although they are involved by the same cycle of operation of the rotating magnetic field. Consequently, the magnetic bubble detector can perform the detecting operation, without being affected by large amounts of noise which are generated during the operation of the nucleation type magnetic bubble generator.
    Type: Grant
    Filed: December 28, 1978
    Date of Patent: July 28, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Ryo Suzuki, Atsushi Asano, Masatoshi Takeshita, Teruaki Takeuchi
  • Patent number: 4276614
    Abstract: A gap between sets of contiguous discs defined by unimplanted regions in an otherwise ion-implanted bubble layer allows a merge function to be achieved. The alignment of the gap axis with an axis of symmetry of the bubble layer and the width of the gap are important considerations in the performance of the merge.
    Type: Grant
    Filed: December 3, 1979
    Date of Patent: June 30, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Terence J. Nelson, Raymond Wolfe
  • Patent number: 4276612
    Abstract: A magnetic bubble memory device according to this invention is characterized in that an electrical conductor which supplies a current pulse for driving gates having a replicating function is divided into a plurality of parts. The divided parts are connected to current pulse generator means in a mutually parallel relationship. As the current pulse generator means, accordingly, a pulse driver circuit whose output is a low voltage can be used. As a result, the cost of the pulse driver circuit is low.
    Type: Grant
    Filed: June 22, 1979
    Date of Patent: June 30, 1981
    Assignee: Hitachi, Ltd.
    Inventor: Ryo Suzuki
  • Patent number: 4270186
    Abstract: A block replicate bubble memory device is provided with a plurality of series storage loops, wherein data words are written into or read out of the storage loops in parallel. The data is entered into write lines and is read on to read lines which are connected to the series storage loops approximately one-half of one loop time apart. Information in the storage loops is ordinarily changed or altered in no less than one-half of one loop time in the prior art. The present invention provides a plurality of bubble generators connected to the serial write line in a manner which permits several bubble device functions to be conducted in less than one-half of one loop time.
    Type: Grant
    Filed: May 31, 1979
    Date of Patent: May 26, 1981
    Assignee: Sperry Corporation
    Inventor: William E. Flannery
  • Patent number: 4263661
    Abstract: There is shown and described a magnetic bubble domain device organization using certain propagation elements which have expanded size relative to the remainder of the propagation elements in order to improve device or system operation.
    Type: Grant
    Filed: June 11, 1979
    Date of Patent: April 21, 1981
    Assignee: Rockwell International Corporation
    Inventors: Thomas T. Chen, Isoris S. Gergis
  • Patent number: 4261045
    Abstract: A magnetic bubble Y-bar corner for use at the end of a minor loop. The Y-bar corner includes a Y-bar corner element and a canted I-bar positioned between the Y-bar corner element and each of the two adjacent storage elements in the minor loop. The ends of the arm of the Y-bar corner element are positioned adjacent the apex portions of the canted I-bars. The distance between the ends of the arms of the Y-bar is larger than the distance between the opposing ends of the two canted I-bars. With this corner a bubble propagates in either direction along a path from a minor loop storage element to the end of the canted I-bar and then to the apex portion of the canted I-bar and from there across to the end of the arm of the Y-bar.
    Type: Grant
    Filed: June 29, 1979
    Date of Patent: April 7, 1981
    Assignee: International Business Machines Corporation
    Inventors: Thomas W. Collins, Kay B. Mehta
  • Patent number: 4253159
    Abstract: A replicator for an ion-implanted magnetic bubble memory includes an offset hairpin geometry. The conductor is associated with features in adjacent bubble paths which exhibit strong attracting poles at the same time. The conductor stretches the bubble between the attracting poles. The bubble is severed by the reorienting propagation field.
    Type: Grant
    Filed: December 3, 1979
    Date of Patent: February 24, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Terence J. Nelson
  • Patent number: 4249249
    Abstract: A magnetic bubble memory of the G-shaped organization is implemented by ion-implantation. Attractive operating margins are realized by the use of transfer-out arrangements which moves bubbles in parallel first to an auxiliary path and thereafter to the major loop in a manner to invert the data.
    Type: Grant
    Filed: December 3, 1979
    Date of Patent: February 3, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Peter I. Bonyhard, Terence J. Nelson
  • Patent number: 4247912
    Abstract: In magnetic bubble domain chips using layers of crystalline material having in-plane magnetization for propagation, hard bubble suppression, etc., asymmetric propagation often results due to crystalline anisotropies in the layer of in-plane magnetization. In these chips, different propagation margins result for propagation in different directions with respect to the crystalline axes of the in-plane layer. In the present magnetic chip, a plurality of shift registers is provided for movement of bubble domains in a plurality of directions, all of which provide good propagation margins. The registers are aligned in particular directions with respect to the directions of easy stripout of bubble domains in order to avoid the problem of asymmetric propagation. Examples are shown using ion implanted contiguous element propagation patterns organized in a major/minor loop type of storage organization.
    Type: Grant
    Filed: November 13, 1978
    Date of Patent: January 27, 1981
    Assignee: International Business Machines Corporation
    Inventors: Clifton D. Cullum, Jr., George E. Keefe, Mark H. Kryder, Yeong-Show Lin
  • Patent number: 4238836
    Abstract: The familiar G-shaped, non-closed, major path in a major-minor, magnetic bubble memory is formed controllably into a closed circumferential major loop about the minor loops during operation. A simple data format allows a simple start-up algorithm to ensure that data are secured.
    Type: Grant
    Filed: March 7, 1979
    Date of Patent: December 9, 1980
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Thomas M. Burford
  • Patent number: 4237544
    Abstract: A magnetic bubble memory herein includes a direct propagation path between a bubble generator and a detector. A control circuit is adapted to store indications of the current state of the memory and the address of presently accessed data in the path responsive to a power failure signal. Portions of the memory are organized in a familiar major, minor mode, data from two major loops being replicated into the direct path.The arrangement exhibits improved access times, improved data rates and is secure from power failure problems. Moreover, the memory organization permits the realization of large capacity chips without requiring block replication.
    Type: Grant
    Filed: November 15, 1978
    Date of Patent: December 2, 1980
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Peter I. Bonyhard
  • Patent number: 4234935
    Abstract: An approach for maintaining the identification of the defective minor loops of a bubble domain memory system having one or more major/minor loop arrays is disclosed. The bubble domain memory system has a plurality of minor loops for the storage of data bits including some minor loops which are defective. There is a plurality of pointers that identify the defective minor loops. At least one block of bits in each major/minor loop array is reserved for the storage of the pointers. The pointer block is associated with a fast access read/write memory, for example, a volatile random-access read/write memory system, to which the pointer information is transferred during power-on initialization of the bubble domain memory system. During the read/write operations of the bubble domain memory system, the read/write memory system enables the data positions to be skipped that correspond to the defective loops.
    Type: Grant
    Filed: December 4, 1978
    Date of Patent: November 18, 1980
    Assignee: International Business Machines Corporation
    Inventor: Kenneth E. Schreiner
  • Patent number: 4233670
    Abstract: The disclosed fault transparent bubble memory has a plurality of minor loops for storing magnetic bubbles, a serial-parallel input path for writing bubbles into the minor loops, and a parallel-serial output path for reading bubbles from the minor loops. Between the parallel inputs and parallel outputs of the minor loops lie pairs of bubble propagation elements. Each element propagates the bubbles by a single predetermined distance. Lying between each pair of these propagation elements is a shorting bar. It converts a pair of single distance propagation elements into one double distance propagation element. Defective minor loops are made transparent by selectively destroying those shorting bars that lie between fault-free minor loops. This selective destruction preferably is performed by a laser beam.
    Type: Grant
    Filed: December 11, 1978
    Date of Patent: November 11, 1980
    Assignee: National Semiconductor Corporation
    Inventor: George F. Reyling, Jr.
  • Patent number: 4233669
    Abstract: A memory control system comprises a memory unit including a plurality of chips each having a shift register type memory having a plurality of information loops, the number of chips being larger than a predetermined number, the predetermined number of bits out of those bits which are read from or written into the information loops of the respective chips at the same timing constituting a unit information; and an additional memory which stores information indicative of normal loop condition or defective loop condition for each of the information loops in each of the chips and information indicative of whether the number of normal loops in each information loop group corresponding to the bits which are read or written at the same timing is larger than said predetermined number or not.
    Type: Grant
    Filed: April 19, 1978
    Date of Patent: November 11, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
    Inventors: Kazuo Furukawa, Sumio Furukawa
  • Patent number: 4228522
    Abstract: Disclosed is a magnetic bubble memory that includes a plurality of minor loops for storing bubbles representative of data therein, and a pair of minor loops for storing bubbles representative of an error map therein. The error map is selectively written into and read from only one loop of the pair. The other loop is redundant and improves chip yield. A serial-parallel bubble propagation path connects all of the loops to a bubble generator. This path includes a predetermined number of bubble propagation elements between the transfer-in gates for the pair of loops. Proper choice of the number of propagation elements enables the error map to be selectively written into/read from only one loop of the pair with only a single control line.
    Type: Grant
    Filed: January 15, 1979
    Date of Patent: October 14, 1980
    Assignee: National Semiconductor Corporation
    Inventor: Peter K. George
  • Patent number: 4225944
    Abstract: A bubble memory organization with a plurality of storage loops in-plane folds allows the selective spacing of transfer and other functional elements from each other eliminating crowded conditions at loop ends. This permits the selective placement of the functional elements for the maximization of operating margins. This can also lead to reduced current requirements because passive replicate elements may be used, to reduced transfer line impedances, to reduced number of conductor lines and to a reduced number of transfer points per memory array. For the designs where passive replication is chosen, reliability is improved due to the reduction in current density to levels further below the conductor electromigration thresholds.
    Type: Grant
    Filed: May 1, 1978
    Date of Patent: September 30, 1980
    Assignee: Burroughs Corporation
    Inventors: Sidney J. Schwartz, Chung H. Hsin
  • Patent number: 4221000
    Abstract: A magnetic bubble domain storage system comprising an array of rows and columns of logical chips are organized into logical half-chips with even numbered bits in one half-chip and odd numbered bits in the other half-chip. Alternating rows of half-chips are used for storing even numbered bits and odd numbered bits, respectively. Each half-chip has its own bubble domain generator, but a common generator current line serves all generators for a row of even half-chips and all generators for a row of odd half-chips. Thus, information is written into even half-chips and odd half-chips at the same time by pulsing the generator current line common to a row of even half-chips and a row of odd half-chips. Each half-chip has a sensing element and all the sensing elements corresponding to a row of half-chips are connected in series.
    Type: Grant
    Filed: May 4, 1978
    Date of Patent: September 2, 1980
    Assignee: International Business Machines Corporation
    Inventors: Alina Deutsch, Mark H. Kryder, Walter Nystrom
  • Patent number: 4221003
    Abstract: A relational data base system using magnetic bubble domain storage to eliminate data formatting, and dynamic indexing loops to facilitate convenient marking during data qualification and to eliminate redundant traversing of disqualified data during the search operation. A data base is stored in columnized storage tables which insure minimum input/output data traffic during search and retrieval. A suitable storage chip is organized in a major/minor loop organization, with several sections of transfer lines to provide selective access to individual groups of storage loops. Off-chip circuitry includes a comparator for comparing data read from a bubble storage chip with a given criterion in order to select appropriate data, and a dynamic indexing loop which keeps track of comparisons. This indexing loop provides an input to a bubble chip controller so that each subsequent search and compare is done only on already qualified data. This eliminates the need for repeated searching through the same data.
    Type: Grant
    Filed: May 4, 1978
    Date of Patent: September 2, 1980
    Assignee: International Business Machines Corporation
    Inventors: Hsu Chang, Anil Nigam
  • Patent number: 4218761
    Abstract: There is shown and described a magnetic bubble domain decoder organization which is especially adaptable to a single port configuration. A plurality of separate storage loops are utilized to store data in the form of magnetic bubble domains. An input/output section is provided for supplying data to the storage loops. A crossover junction circuit permits information to be propagated along a single input/output loop into and out of the storage loops. Input and output decoder circuits are provided in each storage loop to control the data which is stored therein. Control circuits such as tranfer switches, universal switches, retarding networks and the like are arranged to control the movement of magnetic bubble domains in the storage loops. By operation of the various control circuits, interwoven data in the storage loops can be selectively separated and retrieved at the input/output section.
    Type: Grant
    Filed: November 8, 1978
    Date of Patent: August 19, 1980
    Assignee: Rockwell International Corporation
    Inventor: Thomas T. Chen
  • Patent number: 4202043
    Abstract: A bubble memory system comprising data chips each having a plurality of storage loops and wherein each is provided with additional storage loops to compensate for defective loops in the chip, and a control chip having control loops, one loop for each data chip and with bit positions corresponding in number to the number of storage loops in the data chip and connected to the data chip to prevent defective loops on the data chips from being utilized. Thus, data chips which would otherwise have been discarded as defective can now be used.
    Type: Grant
    Filed: November 3, 1977
    Date of Patent: May 6, 1980
    Assignee: Burroughs Corporation
    Inventor: Farooq M. Quadri
  • Patent number: 4198690
    Abstract: There is disclosed an apparatus and method for constructing integrated buffered devices for use with magnetic bubble domain memories. A small storage loop acts as the buffer memory and is interfaced with the main storage loops through a new circuit component. The new circuit component performs the function of transferring a bubble from one track, holds the bubble for a prescribed number of cycles, and then transfers the bubble to another track. Thus, any arbitrarily located bubble within the storage loop can be transferred to any arbitrary location in the buffer loop.
    Type: Grant
    Filed: August 10, 1977
    Date of Patent: April 15, 1980
    Assignee: Rockwell International Corporation
    Inventors: Isoris S. Gergis, Thomas T. Chen
  • Patent number: 4198691
    Abstract: A magnetic bubble domain circuit component for selectively, substantially concurrently, exchanging bubble domains from adjacent propagation paths. The exchange switch defined herein is an active (i.e. a control current is required) switch. The improved design of the exchange switch permits bubble domain exchanges in a minimum time and distance in a magnetic bubble domain circuit.
    Type: Grant
    Filed: August 14, 1978
    Date of Patent: April 15, 1980
    Assignee: Rockwell International Corporation
    Inventors: Thomas T. Chen, Isoris S. Gergis
  • Patent number: 4190900
    Abstract: A major/minor loop bubble memory configuration that provides gap free serial access to the data in the minor loops and which maintains the non-volatility of data when subjected to a power-on-off-on sequence. The configuration includes a timing minor loop in combination with the data storage minor loops in the major/minor loop array. The placement of a single timing bubble within the timing loop permits gap free serial access to the data in the remaining storage minor loops.
    Type: Grant
    Filed: March 27, 1978
    Date of Patent: February 26, 1980
    Assignee: International Business Machines Corporation
    Inventor: David C. Van Voorhis
  • Patent number: 4187553
    Abstract: An improved magnetic bubble domain chip and processes for making the chip are described. The chip is comprised of a magnetic bubble domain film in which small bubble domains can be moved, and overlying layers of metallurgy. The layer of metallurgy closest to the bubble film is an electrically conductive layer having apertures (or recesses) therein. This layer is patterned to provide current carrying conductors. The next overlayer is a layer of magnetic material having in-plane magnetization which is patterned to provide the propagation elements used to move the bubble domains. In a particular embodiment, the magnetic layer is comprised of a magnetically soft material, such as permalloy. The chip is characterized by the provision of insulating pedestals located in the apertures of the conductive layer. These insulating pedestals are located in the regions of the chip used for sensing (and/or bubble generation). That is, they take the place of the thick conductive material in those areas of the chip.
    Type: Grant
    Filed: December 23, 1977
    Date of Patent: February 5, 1980
    Assignee: International Business Machines Corporation
    Inventors: Kie Y. Ahn, Mitchell S. Cohen, John V. Powers, Lung-jo Tao
  • Patent number: 4187554
    Abstract: In a field access type bubble memory system using a major loop-minor loop organization, redundant loops are included in each memory chip so that defective minor loops may be disregarded and the memory retain its nominal capacity. Thus, the total number of loops is in excess of the nominal capacity. In one form of the invention the redundant loops are included with the minor loops. In another form of the invention, the redundant loops are independent of the minor loops. A stationary register or flaw chain having at least as many storage locations as the number of minor loops is located on the bubble memory chip with the major and minor loops. Each register location is assigned to contain information with respect to an assigned corresponding minor loop.
    Type: Grant
    Filed: April 24, 1978
    Date of Patent: February 5, 1980
    Assignee: Control Data Corporation
    Inventor: Clarence H. Kammann
  • Patent number: 4183090
    Abstract: A magnetic bubble memory equipment includes means for receiving address information for a plurality of access requests as a whole, and means for executing address matching operations in parallel for a plurality of addresses. Read-out or write-in command information is fetched for each of the access requests in the sequential order as the coincidence is found in the matching of address and data transfer is sequentially executed in accordance with the command information, thereby to reduce the effective access time for the plurality of the access requests.
    Type: Grant
    Filed: April 18, 1978
    Date of Patent: January 8, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Furukawa, Takeshi Masuda, Masakatu Nunotani, Norio Amano
  • Patent number: 4179750
    Abstract: A digital-to-analog converter utilizing magnetic domains with particular application to addressing large capacity bubble memory modules economically and with as short a delay as one cycle of rotation of the magnetic in-plane field including a plurality of storage loops and magnetoresistive sensors arranged in bridge networks to produce signals whose amplitude denote a weighted binary digit.
    Type: Grant
    Filed: April 13, 1978
    Date of Patent: December 18, 1979
    Assignee: Burroughs Corporation
    Inventor: Farooq M. Quadri
  • Patent number: 4176405
    Abstract: A magnetic bubble storage device is formed with a major-minor loop organization wherein the bit pitch in at least a part of a first region of the major loop other than a second region where the major loop and the minor loops are connected is larger than the bit pitch in the second region. This permits the realization of a pattern arrangement with a broader operating margin and also facilitates the addition of redundant minor loops.
    Type: Grant
    Filed: April 13, 1978
    Date of Patent: November 27, 1979
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Nobuya Yoshioka
  • Patent number: 4176404
    Abstract: A magnetic bubble memory structure having an enhanced storage density is made possible by reducing the circuit period, that is the distance between bubbles, in the storage section of the device. This reduction of the circuit period is made possible by using a gap tolerant propagation element, e.g. asymmetrical chevrons. The bubble storage sections are structured such that the areas closest to the transfer gates have a larger circuit period than the remainder of the storage section. The bubble chip architecture utilizing this means of enhancing the storage density may be of the major-minor loop configuration or the block-replicate configuration. Bubble storage sections in the form of loop structures may have a folded loop or an h loop configuration as well as a closed loop configuration. The reduction in circuit period accomplishes enhancement of the storage density without reducing the bubble diameter and other minimum circuit features to achieve this goal.
    Type: Grant
    Filed: January 13, 1978
    Date of Patent: November 27, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Magid Y. Dimyan, Wayne C. Hubbell, Christopher T. M. Chang, John C. Linn
  • Patent number: 4175289
    Abstract: A magnetic bubble switch operates in a drive-to-transfer mode when a rotating magnetic field is applied. The switch has a magnetic element in the shape that defines the letter "Y" having two arms and a stem. The switch has at least one serration on the arm of the Y in the vicinity of the stem. The switch has a conductor which is positioned across the end of the stem of the Y. A magnetic element is positioned so as to form a gap with the stem of the Y.
    Type: Grant
    Filed: June 5, 1978
    Date of Patent: November 20, 1979
    Assignee: International Business Machines Corporation
    Inventor: Thomas W. Collins
  • Patent number: 4174540
    Abstract: These improved current controlled transfer switches are particularly useful for changing the propagation path of very small bubble domains without requiring large amounts of transfer current. The underlying principle is that the transfer operation occurs when the magnitude of the magnetic drive field used to move bubble domains has diminished to a small value, or is zero. This means that the magnetic field due to current in the switch does not have to overcome the effect of the drive field and therefore can be very small while still being effective. This is termed a "start/stop" operation and in one embodiment, current-assisted transfer is achieved by utilizing a change in the sequence of the magnetic drive field (generally an in-plane rotating field) at the time of transfer. In another embodiment, a continuous "three-quadrant" magnetic drive field is used instead of the customary 360.degree. rotating drive field.
    Type: Grant
    Filed: June 30, 1977
    Date of Patent: November 13, 1979
    Assignee: International Business Machines Corporation
    Inventors: Mitchell S. Cohen, Emerson W. Pugh
  • Patent number: 4168535
    Abstract: A major/minor loop bubble domain memory system maintains the non-volatility of data when subjected to a power on-off-on sequence. A bubble domain shift register is associated with the major/minor loop array and indicates when a block of data in the major loop is in position to be transferred into the minor loops. The length of the shift register is related to the propagation delay of the path over which a bubble is propagated along the major loop from a minor loop read transfer switch to the write transfer switch for the same minor loop.
    Type: Grant
    Filed: August 22, 1977
    Date of Patent: September 18, 1979
    Assignee: International Business Machines Corporation
    Inventor: Karl A. Belser
  • Patent number: 4168534
    Abstract: In a shift register type memory device wherein a plurality of chips are connected to a single sense amplifier and wherein data to be stored is cyclically written into the chips, then when a predetermined loop within a chip for stored designated data is defective, the data is not stored in a loop within the chip adjacent to the defective loop, but is stored in a loop to be subsequently read out in a chip to be read out subsequently to the chip having the defective loop.
    Type: Grant
    Filed: April 11, 1977
    Date of Patent: September 18, 1979
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone Public Corporation
    Inventors: Shigeru Yoshizawa, Nobuo Saito
  • Patent number: 4167790
    Abstract: In a gate arrangement, an information input bubble is deflected from an input path into an output path when moving in proximity of a control bubble on a control path in the interaction zone. T- and I-shaped permalloy elements of the control path pattern are so disposed in the interaction zone to create a very stable control bubble position. At the intersection of the output and input paths the latter is situated at most at three times the nominal bubble diameter from the stable control bubble position. Past the intersection, the input path is as close as one bubble diameter to the control bubble so that the information bubble is necessarily deflected. With the gate layout described a bias margin as high as 11,5% is obtained.
    Type: Grant
    Filed: July 14, 1977
    Date of Patent: September 11, 1979
    Assignee: International Standard Electric Corporation
    Inventors: Walter L. M. C. Nuyts, Roger A. Vlaeminck
  • Patent number: 4164029
    Abstract: A magnetic bubble storage system and a method for making it using only two masking steps, one of which is critical. In a preferred embodiment, the storage regions are comprised of ion implanted propagation elements which can be contiguous with one another. The functions of write, read, storage, transfer between storage elements in different shift registers, and annihilation are provided by the method in which the same mask is used to define ion implanted regions and for formation of conductor metallurgy. Permalloy bridges over ion implanted regions are used to provide transfer of information between one storage element and another. In a preferred embodiment, NiFe is used for sensing, annihilation, and transfer of information, while the storage registers are comprised of ion implanted regions defining contiguous propagation elements of generally circular geometry.
    Type: Grant
    Filed: October 5, 1977
    Date of Patent: August 7, 1979
    Assignee: International Business Machines Corporation
    Inventor: George E. Keefe
  • Patent number: 4164027
    Abstract: In a field access type bubble memory system using a major loop minor loop organization, additional redundant minor loops are included in each memory device so that defective minor loops may be disregarded and the memory retain its nominal capacity. Thus, the total number of minor loops is in excess of the nominal capacity. A stationary register is formed integrally with the major loop by coupling bubble idlers directly to the major loop bubble propagation path. The stationary register has as many register positions as the total number of minor loops coupled to the major loop. An appropriate binary code identifies in the appropriate register location the corresponding minor loop which is defective, including nominally defective minor loops, if necessary, so that a number of minor loops equal to the nominal capacity of the memory are identified as good.
    Type: Grant
    Filed: April 7, 1978
    Date of Patent: August 7, 1979
    Assignee: Control Data Corporation
    Inventors: G. Patrick Bonnie, William J. McGinnis, Jr.
  • Patent number: 4164026
    Abstract: A bubble domain storage system is described which has the best features of contiguous element bubble propagation systems and bubble lattice file systems. An array of magnetic bubble domains, such as a lattice, is moved along contiguous propagation patterns in response to the reorientation of a magnetic field in the plane of the bubble domain film. Adjacent rows of bubble domains in the array move in opposite directions to provide individual storage loops within the array. Information accessing can be achieved by the use of input/output registers similar to those used in other contiguous disk bubble domain storage systems. For example, the storage system can be a conventional major/minor loop organization using contiguous element propagation patterns for the storage registers and for the input/output registers.
    Type: Grant
    Filed: December 30, 1977
    Date of Patent: August 7, 1979
    Assignee: International Business Machines Corporation
    Inventors: George S. Almasi, Yeong S. Lin
  • Patent number: 4161788
    Abstract: A magnetic bubble memory system controller is provided to interface a user system and a magnetic domain chip. The controller will functionally accept commands from a user system and deliver those same commands to the appropriate devices associated with the magnetic bubble memory. A further function of the controller device will be to enable multipage read and write functions within the major loop of a magnetic bubble memory chip organization.
    Type: Grant
    Filed: April 21, 1977
    Date of Patent: July 17, 1979
    Assignee: Texas Instruments Incorporated
    Inventor: Robert J. Rosenblum
  • Patent number: 4159412
    Abstract: A magnetic memory system is provided that includes magnetic domain data chips having a block replicate organization wherein the system may include data chips having one or more defective minor loops. A dedicated minor loop is provided on the chip to store a redundancy map for locating the defective minor loops. The dedicated minor loop also provides for storing a synchronization pattern for initializing the system by having each minor loop properly addressed for transferring magnetic domains. The dedicated loop can only be accessed by a separate swap pin preventing a write operation by the user thus preserving the data stored therein.
    Type: Grant
    Filed: February 11, 1977
    Date of Patent: June 26, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Rex A. Naden, David M. Lee, Richard T. Tarrant
  • Patent number: T100402
    Abstract: A method and means for modifying up to k bits in each byte of (n+k) bits to be accessed with respect to counterpart minor loops of a sequentially accessed byte-organized major/minor loop memory array. The combination of bad byte location pointers and a byte mask is used to delete bits on bad bytes extracted from the memory or to insert zeroes into defective loop locations when bad bytes are written into the memory. Alternatively, the ith bit in each byte of (n+1) bits to be accessed may be modified through the utilization of the value of the ith bit written into the byte position of n+1st bit, while the ith bit of a defective byte position is zeroed. As a bad byte is extracted, the value of the n+1st bit is substituted for the ith bit. A dense list, rather than a sparse bad byte pointer list, is used.
    Type: Grant
    Filed: July 7, 1980
    Date of Patent: March 3, 1981
    Assignee: International Business Machines Corporation
    Inventors: Abraham M. Gindi, Magdi R. Orfali, Arvind M. Patel
  • Patent number: RE30732
    Abstract: A magnetic bubble domain chip layout or organization which achieves consecutive bit access is provided by arranging the device in two substantially identical halves or parts. Each half contains half of the total number of storage loops, a separate access loop with its own generator, switches between the storage loop and an access loop, and a separate detector. The separate detectors are connected together to form two arms of a single bridge wherein consecutive bit output is achieved. The generators in each half of the device are located at different distances from the switches between the loops in one half of the device and the associated access loop. In addition, each of the detectors is located a different distance from the switches in the respective halves or parts of the device.
    Type: Grant
    Filed: July 25, 1979
    Date of Patent: September 1, 1981
    Inventor: Isoris S. Gergis