Abstract: This invention provides novel high density memory devices that are electrically addressable permitting effective reading and writing, that provide a high memory density (e.g., 1015 bits/cm3), that provide a high degree of fault tolerance, and that are amenable to efficient chemical synthesis and chip fabrication. The devices are intrinsically latchable, defect tolerant, and support destructive or non-destructive read cycles. In a preferred embodiment, the device comprises a fixed electrode electrically coupled to a storage medium having a multiplicity of different and distinguishable oxidation states wherein data is stored in said oxidation states by the addition or withdrawal of one or more electrons from said storage medium via the electrically coupled electrode.

Abstract: A metal sulfide based non-volatile memory device is provided herein. The device is comprised of a substrate, a backplane, a planar memory media including a dense array of metal sulfide based memory cells, and a MEMS probe based actuator. The cells of the memory device are operative to be of two or more states corresponding to various levels of impedance. The MEMS actuator is operable to position micro/nano probes over the appropriate cells to enable reading, writing, and erasing the memory cells by applying a bias voltage.

Abstract: Each memory cell of a molecular battery memory device includes a combination of a molecular battery and a selection transistor, and a parasitic capacitance is present in the molecular battery. A PN junction is present in the selection transistor, and is inversely biased. Therefore, a junction leak current flows. Accordingly, a charge accumulated in the parasitic capacitance is gradually discharged by a junction leak of the selection transistor, and a final potential of a node decreases toward a substrate potential Vs of the transistor. However, a difference between a substrate potential Vs and a reference potential Vp (=Vs?Vp) is set substantially equal to an open-circuit voltage of the molecular battery. Because the potential of the node converges to the open-circuit voltage without exception from the viewpoint of a plate wiring, an S/N ratio at the data reading time can be increased.

Abstract: Polymers are described which exhibit a resistive hysteresis effect. The polymers include a polymer backbone to which pentaarylcyclopentadienyl radicals are bonded as side groups. A resistive memory element is formed that includes the polymer as a storage medium. By applying a voltage, the memory element can be switched between a nonconductive and a conductive state.

Abstract: Non-volatile resistance change memories, systems, arrangements and associated methods are implemented in a variety of embodiments. According to one embodiment, resistance-change memory devices are implemented having a pair of electrodes and an intervening electrochemical material. A heating element facilitates changes in resistance of the electrochemical material-region due to changes in ion distribution. The method is implemented without a process for forming a filament-like region in the electrochemical material.

Abstract: The invention relates to a memory device (100) comprising a stack of layers including: at least one first active layer (102) based on a crystalline ionic and electronic conducting material capable of releasing and/or accepting at least one ionic species, at least one second active layer (104) based on a crystalline ionic and electronic conducting material capable of releasing and/or accepting said ionic species, the first active layer and the second active layer being based on a material that have a high potential variation for a low variation in the concentration of said ionic species; at least one layer forming an electrolyte (106) between the first active layer and the second active layer, and based on at least one ionic conducting and electronic insulating material; measurement means (114) for measuring the electrochemical potential difference between said first active layer and said second active layer.

Abstract: This invention pertains to methods assembly of organic molecules and electrolytes in hybrid electronic. In one embodiment, a method is provided that involves contacting a surface/electrode with a compound of formula: R-L2-M-L1-Z1 where Z1 is a surface attachment group; L1 and L2 are independently linker or covalent bonds; M is an information storage molecule; and R is a protected or unprotected reactive site or group; where the contacting results in attachment of the redox-active moiety to the surface via the surface attachment group; and ii) contacting the surface-attached information storage molecule with an electrolyte having the formula: J-Q where J is a charged moiety (e.g., an electrolyte); and Q is a reactive group that is reactive with the reactive group (R) and attaches J to the information storage molecule thereby patterning the electrolyte on the surface.

Abstract: A molecular device is provided. The molecular device comprises a junction formed by a pair of crossed electrodes where a first electrode is crossed by a second electrode at a non-zero angle and at least one connector species including at least one switchable moiety and connecting the pair of crossed electrode in the junction. The junction has a functional dimension ranging in size from microns to nanometers. The molecular device further includes a buffer layer comprising nanocrystals interposed between the connector species and the second electrode.

Abstract: The write disturb that occurs in polymer memories may be reduced by writing back data after a read in a fashion which offsets any effect on the polarity of bits in bit lines associated with the addressed bit. For example, each time the data is written back, its polarity may be alternately changed. In another embodiment, the polarity may be randomly changed.

Abstract: A memory cell having a programmable solid state electrolyte layer, a writing line and a controllable switch that is arranged between the solid state electrolyte layer and the writing line. The controllable switch has a control input that is connected with a selecting line and the switch also has a limiting element that limits a current through the solid state electrolyte layer to a predetermined amount of electric charge for a write operation.

Abstract: The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.

Abstract: A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. The decoder circuit is constructed of crossbar junctions at least one element of each junction being a nanotube or a nanotube ribbon.

Abstract: Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information. The memory cell can include alternating layers of active, passive, diode, and barrier layers positioned between at least two electrodes.

Abstract: A microelectronic programmable structure suitable for storing information, and array including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.

Abstract: A novel switching device is provided with an active region arranged between first and second electrodes and including a molecular system and ionic complexes distributed in the system. A control electrode is provided for controlling an electric field applied to the active region, which switches between a high-impedance state and a low-impedance state when the electrical field having a predetermined polarity and intensity is applied for a predetermined time.

Abstract: A microelectronic programmable structure and methods of forming and programming the structure. The programmable structure generally include an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying a bias across the electrodes, and thus information may be stored using the structure.

Abstract: In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.

Abstract: A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. The decoder circuit is constructed of crossbar junctions at least one element of each junction being a nanotube or a nanotube ribbon.

Abstract: A switching element has an ion conductor capable of conducting metal ions for use in an electrochemical reaction therein, a first electrode and a second electrode which are disposed in contact with said ion conductor and spaced a predetermined distance from each other, and a third electrode disposed in contact with the ion conductor. When a voltage for causing the switching element to transit to an on state is applied to the third electrode, metal is precipitated between the first electrode and the second electrode by metal ions, electrically interconnecting the first electrode and the second electrode. When a voltage for causing the switching element to transit to an off state is applied to the third electrode, the precipitated metal is dissolved to electrically disconnect the first electrode and the second electrode from each other.

Abstract: A memory cell is provided with a pair of electrodes, and an active layer sandwiched between the electrodes and including a molecular system and ionic complexes distributed in the molecular system. The active layer having a high-impedance state and a low-impedance state switches from the high-impedance state to the low-impedance state when an amplitude of a writing signal exceeds a writing threshold level, to enable writing information into the memory cell. The active layer switches from the low-impedance state to the high-impedance state when an amplitude of an erasing signal having opposite polarity with respect to the writing signal exceeds an erasing threshold level, to enable erasing information from the memory cell.

Abstract: The objective of this invention is to provide a static memory cell and an SRAM device that can improve the write margin while preventing degradation of the static noise margin. By turning on/off transistor Qp13, it is possible to control the drop in voltage due to the threshold voltage of transistor Qn15. For example, in read mode, when it is necessary to hold the stored data while setting word line WL to the high level, transistor Qp13 is turned off; the drivability of transistor pair Qn11, Qn12 is decreased, thereby increasing the static margin. In the case of rewriting the stored data, transistor Qp13 is turned on; the drivability of transistor pair Qn11, Qn12 is increased, thereby increasing the write margin. As a result, it is possible to improve the performance of both the static noise margin and the write margin.

Abstract: This invention provides a new design and fabrication for a three-dimensional crossbar architecture embedding a sub-micron or nanometer sized hole (called a molehole) in each cross-region. Each molehole is an electrochemical cell consisting of two or more sectional surfaces separated by a non-conductor (e.g. a dialectric layer and solid electrolyte). When used in electrochemical molecular memory device (EMMD), the architecture provides unique features such as a nano-scale electroactive surface, no interaction between memory elements, and easier miniaturization and integration.

Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.

Abstract: This invention provides novel high density memory devices that are electrically addressable permitting effective reading and writing, that provide a high memory density (e.g., 1015 bits/cm3), that provide a high degree of fault tolerance, and that are amenable to efficient chemical synthesis and chip fabrication. The devices are intrinsically latchable, defect tolerant, and support destructive or non-destructive read cycles. In a preferred embodiment, the device comprises a fixed electrode electrically coupled to a storage medium having a multiplicity of different and distinguishable oxidation states wherein data is stored in said oxidation states by the addition or withdrawal of one or more electrons from said storage medium via the electrically coupled electrode.

Abstract: An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

Abstract: This invention provides novel high density memory devices (FIG. 3) that are electrically addressable permitting effective reading and writing, that provide a high memory density (102), that provide a high degree of fault tolerance, and that are amenable to efficient chemical synthesis and chip fabrication. The devices arc intrinsically latchable, defect tolerant, and support destructive or non-destructive read cycles. In a preferred embodiment, the device comprises a fixed electrode electrically coupled to a storage medium having a multiplicity of different and distinguishable oxidation states wherein data is stored in said oxidation states by the addition or withdrawal of one or more electrons from said storage medium via the electrically coupled electrode.

Abstract: A substrate having a surface with reversibly switchable properties. The surface comprises a nanolayer of a material that switches from a first conformation state to a second conformation state when an external stimulus is applied. When the nanolayer is in the first conformation state, the surface is characterized by a first property, and when the nanolayer is in the second conformation state, the surface is characterized by a second property.

Abstract: The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.

Abstract: Mass distribution within programmable surface control devices is controlled growing or dissolving an electrodeposition of metal and/or metal ions from a solid solution upon application of a suitable electric field. One such programmable surface control device includes a tunable cantilever assembly whose resonant frequency is changed by depositing and dissolving an electrodeposit on a surface of the assembly using an electric field.

Abstract: A photolithographic method of making an information storage device having different storage characteristics at a plurality of discrete memory locations thereon, comprises the steps of: (a) providing a substrate having a surface portion, said surface portion having a linking group coupled thereto or charge storage group coupled thereto, said linking group or charge storage group having a photocleavable protecting group thereon; (b) exposing at least one first discrete segment of said surface portion to radiant energy sufficient to cleave said protecting group from said linking group or charge storage group and generate a deprotected group, so that said group is deprotected in at least one first discrete memory location and preferably said group remains protected in at least one second discrete memory location. Additional groups are then coupled to the deprotected group as desired. Products produced by such methods are also described.

Abstract: The circuit element has a first layer composed of an electrically insulating substrate material and a first electrically conductive material which is in the form of at least one discrete area such that it is embedded in the substrate material and/or is applied to the substrate material. Furthermore, it has a second layer having a second electrically conductive material, and a monomolecular layer composed of redox-active bispyridinium molecules, which is arranged between the first layer and the second layer. The bispyridinium molecules are immobilized on the electrically conductive material which is in the form of at least one discrete area, and make electrical contact with the second electrical material of the second layer. Furthermore, electrically inert molecules are immobilized on the first layer, which molecules form a matrix which surrounds the at least one discrete area with the monomolecular layer composed of bispyridinium molecules.

Abstract: A microelectronic programmable structure suitable for storing information and a method of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.

Abstract: A switching device to be reversibly switched between an electrically isolating off-state and an electrically conducting on-state for use in, e.g., a reconfigurable interconnect. The device includes two separate electrodes, one of which being a reactive metal electrode and the other one being an inert electrode, and a solid state electrolyte arranged between the electrodes and being capable of electrically isolating the electrodes to define the off-state. The reactive metal electrode and the solid state electrolyte also being capable of forming a redox-system having a minimum voltage (turn-on voltage) to start a redox-reaction, which results in generating metal ions that are released into the solid state electrolyte. The metal ions are reduced to increase a metal concentration within the solid state electrolyte, wherein an increase of the metal concentration results in a conductive metallic connection bridging the electrodes to define the on-state.

Abstract: The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.

Abstract: A molecular memory cell includes first and second electrodes. First and second charge storage molecules have respective first and second oxidation potentials and are disposed between the first and second electrodes. A molecular linkage couples the first and second charge storage molecules to the first electrode and provides respective first and second electron transfer rates for the first and second charge storage molecules. The first and second different oxidation potentials are different and/or the first and second electron transfer rates are different. In particular, the second oxidation potential may be greater than the first oxidation potential and the first electron transfer rate may be greater than the second electron transfer rate, such that the first charge storage molecule may be used as fast, volatile primary memory and the second charge storage molecule can be used as slower, less volatile secondary memory.

Abstract: A microelectronic programmable structure and methods of forming and programming the structure The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying a bias across the electrodes, and thus information may be stored using the structure.

Abstract: The write disturb that occurs in polymer memories may be reduced by writing back data after a read in a fashion which offsets any effect on the polarity of bits in bit lines associated with the addressed bit. For example, each time the data is written back, its polarity may be alternately changed. In another embodiment, the polarity may be randomly changed.

Abstract: A memory apparatus has a plurality of first electrodes and at least one second electrode separated by an electrolyte solution. Information may be recorded by causing an electrical current to flow between a selected of the first electrodes and the second electrode to deposit an electrochemically active material on one of the selected first or the second electrodes. A method for recording and reading information has steps of writing the information by causing a current to flow between a first and a second electrode through an electrolyte solution to cause an electrochemically active material to electrodeposit, and reading the information by sensing the deposited material with a sensor.

Abstract: A microelectronic photonic structure and a device and a system including the structure are disclosed. The photonic structure includes an ion conductor and a plurality of electrodes. Optical properties of the structure are altered by applying energy across the electrodes.

Abstract: The need in the art is addressed by the improved missile fire control system of the present invention. In the illustrative embodiment, the inventive system is adapted for use with TOW missile systems and includes a telescope cluster assembly (10) for generating target position signals (18,20). A digital error detector (22?) receives and processes target position signals (18,20) from the telescope cluster assembly (10). The processed signals (24,26) are then fed to a stabilization control amplifier (50), where a microcontroller (56) steps through a set of instructions eliminate angular noise from the target position signals (24,26). The stabilization control amplifier (50) subsequently provides feedback to the telescope cluster assembly (10) for adjusting the line-of-sight in the telescope cluster assembly (10). Software instructions for the microcontroller (56) and constant reference data are stored in the microcontroller memory (not shown).

Abstract: Configurable electronic circuits comprise arrays of cross-points of one layer of metal/semiconductive nanoscale lines crossed by a second layer of metal/semiconductive nanoscale lines, with a configurable layer between the lines. Methods are provided for altering the thickness and/or resistance of the configurable layer by oxidation or reduction methods, employing a solid material as the configurable layer. Specifically a method is provided for configuring nanoscale devices in a crossbar array of configurable devices comprising arrays of cross-points of a first layer of nanoscale lines comprising a first metal or a first semiconductor material crossed by a second layer of nanoscale lines comprising a second metal or a second semiconductor material.

Abstract: A method of forming resistance changing elements with improved operational characteristics for use in memory devices and the resulting structures are disclosed. A chalcogenide glass having the formula (Gex1Se1-x1)1-y1Agy1, wherein 18?x1?28, or the formula (Gex2Se1-x2)1-y2Agy2, wherein 39?x2?42, and wherein in both the silver is in a concentration which maintains the germanium selenide glass in the glass forming region is used in a memory cell. The glass may also have a glass transition temperature (Tg) near or higher than typical temperatures used for fabricating and packaging memory devices containing the memory cell.

Abstract: A nonvolatile memory cell occupying a minimum chip area is provided with a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or layers of alloy. The formation of alloy results in a change in resistance of the cell structure so that one or more programmed states are determined. A semiconductor memory constructed by a large number of the nonvolatile memory cells can be obtained in a compact manner with simple and as few as possible steps. This process vertically stacked layers, and this semiconductor memory is thus easily to be combined with other integrated circuits on a single chip.

Abstract: A circuit for programming a microelectronic device is disclosed. The circuit is configured to provide a reversible bias across the microelectronic device to perform erase and write functions. One configuration of the programming circuit includes one or more inputs coupled to the programmable device and a complimentary metal-oxide semiconductor circuit coupled to the programmable device. This design allows for writing and erasing of the programmable cell using a low and high voltage input.

Abstract: A molecular light valve mechanism is used for imaging on an adjacent pixel-patterned construct. An electrical fringe field or through field is used to transform targeted pixels by switching light valve molecules between a first non-transparent state and transparent state, providing information content on the adjacent pixel-patterned imaging layer.

Abstract: An information storage device which has a layer containing such bistable molecules that the molecular structure reversibly changes due to an isomerization reaction, at least one reaction of the isomerization reaction is caused by electric carrier injection, and the electric characteristics change as between before and after the isomerization reaction.

Abstract: A nonvolatile memory cell occupying a minimum chip area is provided with a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or layers of alloy. The formation of alloy results in a change in resistance of the cell structure so that one or more programmed states are determined. A semiconductor memory constructed by a large number of the nonvolatile memory cells can be obtained in a compact manner with simple and as few as possible steps. This process vertically stacked layers, and this semiconductor memory is thus easily to be combined with other integrated circuits on a single chip.

Abstract: An electrochromic molecular colorant and a plurality of uses as an erasably writeable medium. Multitudinous types of substrates, such as paper, are adaptable for receiving a coating of the colorant. Electrical fringe field or through fields are used to transform targeted pixel molecules between a first, high color state and transparent state, providing information content having resolution and viewability at least equal to hard copy document print. The scope of the invention includes both the liquid coating and the combination of coating on substrate.

Abstract: A novel memory cell is provided with an active region including a molecular system and ionic complexes distributed in the molecular system. A pair of write electrodes are arranged for writing information to the memory cell. The active region is responsive to an electric field applied between the pair of write electrodes for switching between an on state and an off state. The active region has a high impedance in the off state and a low impedance in the on state. A pair of read electrodes is used to detect whether the active region is in the on state or in the off state to read the information from the memory cell. Read electrodes may be made of different materials having different work functions to reduce leakage current.

Abstract: An electrochromic molecular colorant and a plurality of uses as an erasably writeable medium. Multitudinous types of substrates, such as paper, are adaptable for receiving a coating of the colorant. Electrical fringe field or through fields are used to transform targeted pixel molecules between a first, high color state and transparent state, providing information content having resolution and viewability at least equal to hard copy document print. The scope of the invention includes both the liquid coating and the combination of coating on substrate.