Employing Particular Searching Function (e.g., Hashing, Alternate, Re-routing) Patents (Class 370/395.32)
  • Patent number: 7313142
    Abstract: A packet processing device has a search engine module including an associative memory for transferring a packet on the basis of an entry mapping to route information, a first processor taking charge of a pre-search process before a process of the packet to the search engine module, and a second processor taking charge of a post-search process for executing a process of routing the packet on the basis of a search result of the search engine module. In this architecture, the packet processing device further has a table used for transferring and receiving information between the first processor in charge of the pre-search process and the second processor in charge of the post-search processor, and identifying information in a specified field of the table is transferred through the search engine module as a transparent medium.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: December 25, 2007
    Assignee: Fujitsu Limited
    Inventors: Akira Matsuo, Norihisa Nishimura
  • Patent number: 7313667
    Abstract: Fields of entries are mapped into new values with these mapped values combined into mapped entries for use in lookup operations typically for packet processing. One implementation identifies a list including multiple items each having a first field and a second field. The unique first and second fields of each item are respectively mapped to mapped first and second fields. A first associative memory is programmed with the unique first fields, and a first stage memory is programmed with the mapped first fields at corresponding locations. A second associative memory is programmed with the unique second fields, a second stage memory is programmed with the mapped second fields at corresponding locations. A second stage associative memory is then programmed, using the mapped first and second fields, with entries corresponding to one or more of the original multiple items.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: December 25, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Venkateshwar Rao Pullela, Dileep Kumar Devireddy, Shyamsundar Rao Pullela
  • Patent number: 7313135
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: December 25, 2007
    Assignee: Mosaid Technologies, Inc.
    Inventor: Richard M. Wyatt
  • Patent number: 7307995
    Abstract: A method of linking at least two network switches is disclosed, wherein each network switch switches data traffic of a plurality of devices, through a plurality of couplings. The method comprises the steps of generating a data stream including an identifier to be sent from a first to a second network switch, generating a number identifying one of the couplings from the identifier, and using the identified coupling for transfer of the data stream.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: December 11, 2007
    Assignee: Ciphermax, Inc.
    Inventors: Ram Ganesan Iyer, Hawkins Yao, Michael Witkowski, Richard Gunlock
  • Patent number: 7292565
    Abstract: A communication method is capable of preventing an occurrence a change of a route for an underway communication between a mobile node and a correspondent node in a communication network and restraining an unnecessary packet from being forwarded to the correspondent node from the mobile node. The communication method is executed among the mobile node having a home address assigned in a first network and a temporary address assigned in a second network, an agent device surrogating a communication using the home address in the first network and a correspondent terminal communicating with the mobile node through the agent device. When the mobile node moves to the second network, the mobile node transmits information containing the temporary address to the correspondent node, and the correspondent node receives the information containing the temporary address and transmits the information to the temporary address of the mobile node.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: November 6, 2007
    Assignee: Fujitsu Limited
    Inventors: Hideaki Ono, Kazuyuki Oka
  • Patent number: 7292578
    Abstract: A VTMS queue scheduler integrates traffic shaping and link sharing functions within a single mechanism and that scales to an arbitrary number of queues of an intermediate station in a computer network. The scheduler assigns committed information bit rate and excess information bit rate values per queue, along with a shaped maximum bit rate per media link of the station. The integration of shaping and sharing functions decreases latency-induced inaccuracies by eliminating a queue and feedback mechanism between the sharing and shaping functions of conventional systems.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: November 6, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Darren Kerr, Van Jacobson
  • Patent number: 7286534
    Abstract: A router (101) includes one or more input ports (104) and one or more output ports (112). The router (101) includes a lookup table (105) to determine routing of the incoming packets or cells. The lookup table is implemented in dynamic random access memory (DRAM) with a portion implemented as static random access memory (SRAM) (202, 204). The SRAM (204) is used to store a first search level of destination addresses. Once the first search level in SRAM (204) has been exhausted, the search moves to the DRAM portion (202).
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: October 23, 2007
    Assignee: Infineon Technologies North America Corporation
    Inventor: Axel K. Kloth
  • Patent number: 7287092
    Abstract: A TCP/IP offload network interface device (NID) receives packets from a plurality of clients and generates, from the socket address of each such packet, a hash value. Each hash value identifies one of a plurality of hash buckets maintained on the NID. In a file server, certain socket address bits of the packets are low entropy bits in that they tend to be the same, regardless of which client sent the packet. Others of the socket address bits are high entropy bits. The hash function employed is such that the hash values resulting from the changing values of the high entropy bits are substantially evenly distributed among the plurality of hash buckets. In a fast-path, the NID uses a first hash function to identify TCBs on the NID. In a slow-path, the NID generates a second hash using a second hash function and a host stack uses the second hash.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: October 23, 2007
    Inventor: Colin C. Sharp
  • Patent number: 7283484
    Abstract: A method includes obtaining first information indicative of instability of a data communication network. The method also includes isolating a first portion of a network from a second portion of the network responsive to the obtained first information. After a predetermined period of time, second information indicative of instability of the first portion is obtained. The method further includes isolating a first segment of the first portion from a second segment of the first portion responsive to the obtained second information.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: October 16, 2007
    Assignee: AT&T Corp.
    Inventors: Gagan Lal Choudhury, Elie M. Francis, Thomas K. Helstern, Beth S. Munson, Vera D. Sapozhnikova
  • Patent number: 7277386
    Abstract: Techniques are described for distribution of label switched packets, such as multiprotocol label switched (MPLS) packets, across multiple physical data paths. The techniques may, for example, be used to load balance the label switched packets across an aggregated link having two or more logically associated physical interconnects. A network device, for example, includes an interface card to receive packets associated with a common label switched path (LSP), and a control unit to distribute the packets across multiple paths. The network device may include label data that maps ranges of labels, such as MPLS labels, to types of payloads carried by the label switched packets. In accordance with the label data, the control unit extracts flow information from the label switched packets and distributes the label switched packets across the paths based on the flow information.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: October 2, 2007
    Assignee: Juniper Networks, Inc.
    Inventors: Dennis C Ferguson, Nischal Sheth, Ken Kuwabara
  • Patent number: 7269174
    Abstract: A Dynamically Reconfigurable Dynamic Wireless Network for connecting a local area network (“LAN”) to wireless Mobile Stations. Backbone Access Points (“Backbone APs”) are physically connected to the LAN. Levels of Wireless Access Points (“Wireless APs”) are daisy-chained together and connected to the Backbone AP, providing an extended area of network coverage. Mobile stations are connected to either Backbone APs or Wireless APs. Dynamic Reconfiguration prevents single point failures. Each AP contains a router, Address Resolution Protocol (“ARP”) cache, and Distributed Routing Table (“DR Table”). The DR Table maintains the Media Access Control (“MAC”) address and the Internet Protocol (“IP”) address of each AP below it in the Distributed Routing Tree. Additionally, each DR Table also maintains the IP address for the device each AP is connected. The Distributed Routing Tree is dynamically reconfigured to minimize transmission hops or to maximize signal strength between Mobile Stations and the LAN.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: September 11, 2007
    Assignee: Modular Mining Systems, Inc.
    Inventors: Jonathan P. Olson, Kevin R. Bentley
  • Patent number: 7257643
    Abstract: A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventors: Philip P. Mathew, Ranjeeta Singh, Michael R. Lewin, Harshawardhan Vipat
  • Patent number: 7248589
    Abstract: A method for enabling multi-tuple TCP sockets within a computer network is disclosed. All possible connection paths between a first computer and a second computer are initially determined. Then, tuple information of all the possible connection paths are stored in a respective socket of the first and second computers as multi-tuple information. Next, one of the possible connection paths is designated as a preferred path and the remaining possible connection paths are designated as alternate paths. Finally, data packets are transmitted via the preferred path after a TCP connection has been established between the first and second computers on the preferred path.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: July 24, 2007
    Assignee: International Business Machines Corporation
    Inventors: Dwip N. Banerjee, Lilian Sylvia Fernandes, Vasu Vallabhaneni
  • Patent number: 7242678
    Abstract: Routing of packets is controlled in a communications network including an infrastructure of packet switching nodes interconnected by packet transport links, and a plurality of access nodes to which a routing path, defined by data held in packet switching nodes located along the routing path, may be directed in the infrastructure for a given network address.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: July 10, 2007
    Assignee: British Telecommunications public limited company
    Inventors: Alan W O'Neill, Mathew S Corson
  • Patent number: 7222188
    Abstract: A method and apparatus for layer 3 switching packets between locally attached virtual local area networks without using a routing protocol are provided. A learning internetwork switch is connected between a router and a plurality of virtual local area networks. Communications between devices on the virtual local area networks and the router pass through the learning internetwork switch. By inspecting certain packets that flow between the devices and the router, the learning internetwork switch learns the location of the devices without having to use a routing protocol. The learning internetwork switch learns the network layer and the data link layer addresses of the various devices. Once the learning internetwork switch has learned the location, the network layer address and data link layer address of a device, the learning internetwork switch can forward packets between devices on different virtual local area networks using layer 3 switching without involving the router.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: May 22, 2007
    Assignee: Nortel Networks Limited
    Inventors: Steve Ames, Jan Bialkowski, Donal Byrne, Dennis Cave
  • Patent number: 7219159
    Abstract: A searching method of a plurality of routes includes the steps of defining, as an X direction, one direction of a bidirectional transmission line connected to each of the plurality of nodes, and another direction as a Y direction; respecifying an initial node and a terminal node; searching a first shortest route extending from the specified initial node to the specified terminal node; searching a second shortest route for nodes connected to another transmission line in the X direction; searching a third shortest route extending from the specified initial node to the specified terminal node; searching a fourth shortest route for nodes connected to another transmission line in the Y direction; comparing the sum of the X group first route and second route with the sum of the Y group first route and second route; and determining the group having a smaller sum as an optimal route in the comparison.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: May 15, 2007
    Assignees: Fujitsu Limited, NTT Communications Corporation
    Inventors: Tsunehito Mouri, Osamu Nakazawa, Hiroyuki Saito, Akihito Shinozaki, Sadayo Hirata, Hirotoshi Yamada
  • Patent number: 7215641
    Abstract: The present invention provides a per-flow dynamic buffer management scheme for a data communications device. With per-flow dynamic buffer limiting, the header information for each packet is mapped into an entry in a flow table, with a separate flow table provided for each output queue. Each flow table entry maintains a buffer count for the packets currently in the queue for each flow. On each packet enqueuing action, a dynamic buffer limit is computed for the flow and compared against the buffer count already used by the flow to make a mark, drop, or enqueue decision. A packet in a flow is dropped or marked if the buffer count is above the limit. Otherwise, the packet is enqueued and the buffer count incremented by the amount used by the newly-enqueued packet. The scheme operates independently of packet data rate and flow behavior, providing means for rapidly discriminating well-behaved flows from non-well-behaved flows in order to manage buffer allocation accordingly.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: May 8, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Andreas V. Bechtolsheim, David R. Cheriton
  • Patent number: 7200147
    Abstract: The present invention provides an address analysis method for the next generation integrated network service. The address analysis method makes it possible to establish an outgoing or incoming call service in all kinds of address schemes while the integrated network interworks with a wired/wireless integrated network.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: April 3, 2007
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecom
    Inventors: HyunSoon Shin, Sung Back Hong
  • Patent number: 7190695
    Abstract: Distributing packets from an input link to multiple output links involves categorizing each incoming packet, selecting a mapping algorithm based on the packet category, and using the selected mapping algorithm for each packet to determine an output link for the respective packet. If packets are from a category that requires the order of the packets to be maintained, then the selected mapping algorithm causes packets from the same set of packets to be distributed to the same output link. If packets are from a category that does not require the order of the packets to be maintained, then the selected mapping algorithm can cause packets to be distributed more evenly among the multiple output links. Hashing can be used to distribute in-order packets from the same set to the same output link. Load balancing and round-robin distribution can be used to distribute out-of-order packets more evenly across the output links.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 13, 2007
    Assignee: Lucent Technologies Inc.
    Inventors: Marc Schaub, Balakrishnan Ramakrishnan, Kumar Mehta
  • Patent number: 7177311
    Abstract: A method for routing packets in a router includes establishing a flow data structure identifying a packet flow through a virtual router in the router. Next, a system executing the method receives a packet, said packet having at least one packet header. The method then compares a subset of the at least one packet header to a subset of the flow data structure. If the subset of the at least one packet header matches the subset of the flow data structure, then the packet can be hardware accelerated to a network interface. Otherwise, the packet can be either dropped, or forwarded to a general purpose processor for processing.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: February 13, 2007
    Assignee: Fortinet, Inc.
    Inventors: Zahid Hussain, Samir Jain, Naveed Alam, Joseph Cheng, Gregory Lockwood, Tim Millet
  • Patent number: 7158519
    Abstract: To provide a packet transfer apparatus capable of making a competition problem among entries avoidable, reducing entry management costs and improving entry setting processing ability. If an IP packet is inputted, a search process circuit sends packet search information and performs a search of a CAM of a packet search table. In the search of the CAM of the packet search table, a registration position of the entry that was hit is outputted. Address information of each table in which transfer information is set is obtained from a transfer information address table, and the transfer information is read from a policer information table, an application transfer information table, an in-system common transfer information table and an output information table based on the address information respectively.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: January 2, 2007
    Assignee: NEC Corporation
    Inventor: Katsuya Kanakubo
  • Patent number: 7149803
    Abstract: The present invention is directed to a method of providing content distribution services while minimizing the processing time required for security protocols such as the Secure Sockets Layer.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: December 12, 2006
    Assignee: AT&T Corp.
    Inventors: Frederick Douglis, Michael Rabinovich, Aviel D. Rubin, Oliver Spatscheck
  • Patent number: 7145911
    Abstract: A method for performing a parallel hash transformation in a network device to generate a hash pointer for an address input. The method includes the step of receiving an address input. The address input is apportioned among a plurality of hashing units. The hashing units are configured to operate in parallel. A hash transformation is executed on the apportioned address inputs in parallel, resulting in a corresponding plurality of hashing unit outputs. The hashing unit outputs are combined to generate a hash result corresponding to the address input.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: December 5, 2006
    Assignee: Hewlett-Packard Company
    Inventor: Mark Gooch
  • Patent number: 7146421
    Abstract: A method for handling dynamic state information used for handling data packets, which arrive at a network element node of a network element cluster, said network element cluster having at least two nodes and each node handling separate sets of data packets. In a node there is maintained 206 a first, node-specific data structure comprising entries representing state information needed for handling sets of data packets handled in said node. In said node there is also maintained 208 a second, common data structure comprising at least entries representing state information needed for handling sets of data packets handled in one other node of said network element cluster. The contents of said common data structure effectively differs from the contents of said node-specific data structure. Data packets are distributed 202, 204 to nodes of the cluster by means of distribution identifiers allocated 200 to nodes.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: December 5, 2006
    Assignee: Stonesoft Oy
    Inventor: Tuomo Syvanne
  • Patent number: 7136350
    Abstract: A method for supporting VP/VC groups in asynchronous transfer mode (ATM) switching systems that implement ATM automatic protection switching (APS). A source (SA) transmits traffic substantially continuously on two paths and a destination (SB), or sink, selects at any time one of the traffic from only one of the paths for further processing. The method includes creating a groups table having an entry for each of the two instances of every active VP/VC group's member set. Each entry indicates whether the cells for that instance of the member circuits of that VP/VC group should be forwarded or discarded. Each entry references a corresponding entry in the groups table by means of a pointer. The method includes accessing a relevant entry in the groups table when a cell for that circuit arrives, discarding the cell if the accessed value is “discard,” and forwarding the cell as specified in the specific lookup table entry for that circuit if the accessed value is otherwise.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: November 14, 2006
    Assignee: Lucent Technologies Inc.
    Inventor: Yair Oren
  • Patent number: 7126948
    Abstract: A method for performing a hash transformation in a network device to generate a hash pointer for an address input by using rotation. The method includes to step of receiving an address input. Rotated copies of the address input are subsequently logically combined in accordance with a key to generate a hashing result corresponding to the address input. The hash result is subsequently output.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: October 24, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark Gooch, Aled Edwards
  • Patent number: 7124199
    Abstract: A method, apparatus, and article of manufacture determine a path on a network. A Global search is commenced for one or more Global paths on the network. Thereafter, when a turn restriction on a first node on the network exists, a hidden node that is not reachable from the first node due to the turn restriction is detected. A Local search commences from the hidden node in a reverse direction creating a Local search path. When the Local search can connect to the Global search, the Local search path is converted to a new Global path, and added as an alternative to the Global search.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: October 17, 2006
    Assignee: Autodesk, Inc.
    Inventors: Martin Miller, Kevin Glen Robinson
  • Patent number: 7123620
    Abstract: A global path identifier is assigned to each explicit route through a data communication network. The global path identifier is inserted into each packet as the packet enters a network and is used in selecting the next hop. When encountering a new selected path, an ingress router sends an explicit object to downstream nodes of the path to set up explicit routes by caching the next hop in an Explicit Forwarding Information Base (“EFIB”) table. Ingress routers maintain an Explicit Route Table (“ERT”) that tracks the global path identifier associated with each flow through the network. Multiple flows using the same path can be implemented by sharing the same global path identifier. In case of sudden network load changes, rerouting can be performed by changing the global path identifier associated with those flows that need to be rerouted and by then transmitting a new path object to downstream nodes.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: October 17, 2006
    Assignee: Cisco Technology, Inc.
    Inventor: Qingming Ma
  • Patent number: 7120152
    Abstract: A method of routing a packet in a routing device having a main processor that includes a main cache table and an instant cache table is disclosed. The instant cache stores a recent address and a recent interface associated with the most recent packet transmission process made by the routing device. The method includes the steps of receiving a packet that includes its destination address, checking whether the destination address belongs to the routing device, checking whether the destination address is identical to the recent address if the destination address does not belong to the routing device, and transmitting the packet to the recent interface if the destination address is identical to the recent address. As a result, the core information related to the routing path determination is stored not only in the routing table of the protocol layer but also in the main and instant cache tables included in the main processor.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: October 10, 2006
    Assignee: LG Electronics Inc.
    Inventor: Sung Uk Park
  • Patent number: 7111071
    Abstract: A method of searching a database for a prefix representing a destination address including loading two trees of tables, each tree of tables having a large table at a root branching to small tables and traversing the two tables of trees in parallel to find a match of an entry to the prefix. An entry includes a router pointer representing the destination address and a pointer to a next small table. The small tables include prefix match fields for indexed table entries, a population count of pointers and hidden prefix entries that hold shorter prefix route entry pointers.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventor: Donald F Hooper
  • Patent number: 7103035
    Abstract: A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes a switching module for performing layer 2 and layer 3 switching operations, and a plurality of network switch ports, each configured for connecting the network switch to a corresponding subnetwork. The switching module includes a plurality of address tables for storing address information (e.g., layer 2 and layer 3 address and switching information), where each table is configured for storing the address information of a corresponding one of the subnetworks. The use of multiple address tables within the switching module enables the time for looking up address information to be substantially reduced, especially since the multiple address tables can be accessed independently and simultaneously by the switching module.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: September 5, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Mrudula Kanuri
  • Patent number: 7099285
    Abstract: A multiport switching device includes a configuration table that stores associations between addresses of subnets directly connected to the switching device and the port number of the multiport switching device that leads to the subnet. A host processor connected to the multiport switching device updates and maintains the configuration table. A remote processor communicates with the switching device through the host processor. To facilitate the communication of the remote processor with the multiport switch, the host processor executes a TCP/IP stack and the multiport switch is assigned a unique IP address.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: August 29, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mrudula Kanuri, Somnath Viswanath, Gopal S. Krishna
  • Patent number: 7096277
    Abstract: The disclosure includes description of a technique for use in looking-up data based on content of a packet received over a network. The technique includes receiving a lookup value based on the received packet, searching a first memory using at least a portion of the lookup value, and if the searching the first memory fails, searching a second memory, having a lower latency than the first memory, using at least a portion of the lookup value.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: August 22, 2006
    Assignee: Intel Corporation
    Inventor: Donald F. Hooper
  • Patent number: 7088721
    Abstract: A method is described for sending frames of data from at least two sending nodes via one or more forwarding nodes to one receiving node in an ATM network. Each frame of data is partitioned into cells and includes a VPI field and a VCI field. The sending nodes include a first label into the VPI field of each of the cells representing an identification of the routing of the cell. Furthermore, the sending nodes include a second label into the VCI field of each of the cells representing an identification of the source of the cell. The forwarding node swaps the first and the second label according to a swapping table. With respect to the second label, the forwarding node enters the swapping table in the column of the output labels and reads the corresponding input label.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: August 8, 2006
    Assignee: International Business Machines Corporation
    Inventors: Patrick Droz, Ilias Iliadis, Gilad Goren, Kashipati G. Rao, Atiya Suhail
  • Patent number: 7085275
    Abstract: A method and apparatus for accessing a non-symmetric dual-slot address table having two entries 0, 1 that are different in size. When writing data, the data is hashed to generate a hash value. Then, the data is written to a slot corresponding to the hash value in the entry 0. When there was data in the slot 0, the hash value is mapped to a sub-address and a share value, and then a slot 1 corresponding to the sub-address is selected from the entry 1. Afterwards, the SMAC tag, the share value and the source port are written to the slot 1. In addition, when transmitting the packet, a hash value is generated according to the DMAC address. Then, a SMAC tag, the share value and the source port are read according to the hash value. After compared, the packet is transmitted.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: August 1, 2006
    Assignee: VIA Technologies, Inc.
    Inventors: Jen-Kai Chen, Yun-Fei Chao
  • Patent number: 7075926
    Abstract: A programmable packet switching controller has a packet buffer, a pattern match module, a programmable packet classification engine and an application engine. The packet buffer stores inbound packets, and includes a header data extractor to extract header data from the inbound packets and to store the extracted header data in a header data cache. The header data extractor also generates a header data cache index and provides it to the packet classification engine for it to retrieve the extracted header data. The packet classification engine has a decision tree-based classification logic for classifying a packet. Each of the leaves of the tree represents a packet classification. The packet classification engine uses the header data cache index to retrieve the header data to perform multiple header checks, starting at a root of the tree and traversing branches until a leaf has been reached. The application engine has a number of programmable sub-engines arrayed in a pipelined architecture.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: July 11, 2006
    Assignee: Alcatel Internetworking, Inc. (PE)
    Inventors: Jim Cathey, Timothy S. Michels
  • Patent number: 7058013
    Abstract: A header conversion device allowing reduced amount of hardware and memory and high-speed line switching is disclosed. In an ATM switching device having redundant incoming line systems, a header conversion table stores a set of header conversion information for one of the redundant incoming line systems. A header converter converts the header of an ATM cell received from each of the redundant incoming line systems by referring the same set of header conversion information.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: June 6, 2006
    Assignee: Juniper Networks, Inc.
    Inventor: Hideyuki Furuichi
  • Patent number: 7058016
    Abstract: A method for performing route calculations in a link state routing protocol at a node within a computer network. The method includes evaluating existing routes of the node when new route information is received and recalculating routes for the node only when the new route information improves at least one of the existing routes or at least one of the existing routes is made worse or lost. A system for performing route calculations is also disclosed.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: June 6, 2006
    Assignee: Cisco Technology, Inc.
    Inventor: John Harper
  • Patent number: 7054319
    Abstract: A VPN edge router with the ability of identifying VPNs by using the identifiers of logical channels multiplexed on a single input line.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: May 30, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Akahane, Kenichi Sakamoto, Kazuo Sugai
  • Patent number: 7039018
    Abstract: A method and apparatus to search for routing information is described. According to an embodiment, a technique is described to search for routing information that uses a first technique on at least a portion of a first section of an address and a second technique on at least a portion of a second section of an address. In one embodiment, a best-match technique, such as a Longest Prefix Match technique, is used on at least a portion of a topology section of an address, and an exact-match technique is used on a portion of an interface ID of the address.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventors: Ranjeeta Singh, Larry B. Huston
  • Patent number: 7035256
    Abstract: A method and apparatus for managing an information routing information base is described. A method comprises managing a routing information base (RIB), the RIB including a first set of elements that indicate a set of destinations, a second set of elements that indicate a set of next hops, a third set of elements that indicate a set of interfaces, receiving a message that indicates a modification to a plurality of routes corresponding to a plurality of the first set of elements, and modifying a first relationship between one of the second set of elements and a first one of the third set of elements and a second relationship between the one of the second set of elements and a second one of the third set of elements in accordance with the message, the one of the second set of elements referenced by the plurality of the first set of elements.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: April 25, 2006
    Assignee: Redback Networks Inc.
    Inventors: Gerald W. Neufeld, Ajay M. Patel, Ravi Chandra
  • Patent number: 7027463
    Abstract: A system is described for processing messages and calls comprising: a plurality of filtering modules to apply a corresponding plurality of rule sets in succession to filter incoming and/or outgoing electronic messages and to apply the highest priority rule from among a plurality of rule sets to calls; and a pre-inbox for temporarily storing the calls and/or electronic messages as each of the plurality of rule sets are applied, the calls and/or electronic messages being removed from the pre-inbox and disposed of only after each of the plurality of rule sets have been applied to the calls and/or electronic messages.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: April 11, 2006
    Assignee: Sonolink Communications Systems, LLC
    Inventors: Boban Mathew, Thomas John, Dagny Evans
  • Patent number: 7023854
    Abstract: A packet interception system intercepts message packets transmitted from a packet source or to a packet destination, and processes them so as to facilitate verification of the contents and the sequence with which the message packets are intercepted, and for storing the processed message packets for later use. The packet interception system generates for each intercepted message packets respective hash values based on the respective intercepted message packet and the hash value generated for the previously-intercepted message packet, or, for the first intercepted message packet, a value that is provided to identify the session. To verify a previously-stored intercepted message packet, the packet interception system, or another device, using the same hash algorithm, can process the sequence of stored intercepted message packets up to and including the intercepted message packet to be verified, to and compare the hash value generated to the previously-generated hash value for each of the message packets.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: April 4, 2006
    Assignee: Sandstorm Enterprises, Inc.
    Inventor: Simson L. Garfinkel
  • Patent number: 7020713
    Abstract: A method and system is provided for balancing work load for a plurality of computer processors in a multiple processor computer system. In such a system, there are a plurality of packets to be processed. First, a plurality of hash buckets are generated and each packet is assigned to a bucket by performing a predetermined hash function. The different hash buckets are then assigned to the processors based on the workload of all the processors. In connection with processing connections with a timer thread, a plurality of connections are processed with a plurality of timer threads. A plurality of hash buckets are provided, and each connection is mapped to one of the hash buckets. Further, each hash bucket is assigned to a processor timer thread based on a workload thereof.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: March 28, 2006
    Assignee: Novell, Inc.
    Inventors: Vipul Shah, N.S.S. Narasimha Rao, Alka Agrawal, Subrata Sarkar, Kumar Subramanian, Himanshu Shukla
  • Patent number: 7020137
    Abstract: A network switch for network communications includes a first data port interface supporting a plurality of data ports transmitting and receiving data at a first data rate. A second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is configured to communicate with a CPU, and an internal memory communicates with the first data port interface and the second data port interface. A memory management unit is provided, including an external memory interface, for communicating data from at least one of the first data port interface and the second data port interface and an external memory. A communication channel is provided, for communicating data and messaging information between the first data port interface, the second data port interface, the internal memory, and the memory management unit.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: March 28, 2006
    Assignee: Broadcom Corporation
    Inventors: Shiri Kadambi, Shekhar Ambe
  • Patent number: 7002965
    Abstract: Methods and apparatus are disclosed herein for classifying packets using ternary and binary content-addressable memory stages to classify packets. One such system uses a stage of one or more TCAMS followed by a second stage one or more CAMS (or alternatively some other binary associative memories such as hash tables or TRIEs) to classify a packet. One exemplary system includes TCAMs for handling input and output classification and a forwarding CAM to classify packets for Internet Protocol (IP) forwarding decisions on a flow label. This input and output classification may include, but is not limited to routing, access control lists (ACLs), quality of service (QoS), network address translation (NAT), encryption, etc. These IP forwarding decisions may include, but are not limited to IP source and destination addresses, protocol type, flags and layer 4 source and destination ports, a virtual local area network (VLAN) id and/or other fields.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: February 21, 2006
    Assignee: Cisco Technology, Inc.
    Inventor: David R. Cheriton
  • Patent number: 7002960
    Abstract: Systems in the current art provide capacity planning for packet networks. These systems require input data that characterizes traffic demands. The demands may be expressed as matrixes that record the number of bytes and packets exchanged between access routers or service nodes for each type-of-service. This invention defines a system and method to calculate these traffic matrixes. Access routers in a service node export flow records to a Record Collector. The flow records are processed to create ingress and egress records that are stored on the Record Collector. This data is uploaded to a Capacity Planning Server at which the traffic matrixes are generated. The egress access router(s) for a flow are determined by searching for matching ingress and egress records. Matching records have identical source and destination addresses. This algorithm requires no knowledge of the complex topology and routing protocols that are used within packet networks. Sampled or non-sampled flow records may be used.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: February 21, 2006
    Assignee: AT&T Corp.
    Inventors: Joseph Golan, Danielle Liu, Joseph Thomas O'Neil
  • Patent number: 6999452
    Abstract: A packet-switched network system comprises a multiplicity of multi-port network units each of which has first and second ports and other ports and transmission links coupling the first and second ports of said unit in a closed ring. The first and second ports and transmission links support duplex transmission of Ethernet data packets. Each unit transmits from said first and second ports packets including selected information enabling on reception of a packet at any of the units a determination of a number of hops from unit to unit around said ring said packet has made. Each unit has a forwarding database and in response to the said selected information controls the transmission of said packets in two directions around said ring, and each unit causes discard of packets which have according to said selected information circumnavigated the ring.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: February 14, 2006
    Assignee: 3Com Corporation
    Inventors: Justin A Drummond-Murray, Paul J Moran
  • Patent number: 6993031
    Abstract: A cache table management device for raising the cache hit probability for entries inserted in groups between a forwarding table 103 and cache 102. A forwarding table 103 stores the priority level of entries inserted and extracted in a cache 102. A packet processing circuit 101 extracts the destination address from the received packet, searches the packet using the destination address, and searches the forwarding table if no hits occur. The hit database 104 stores the contents of the forwarding table for all forwarding table entries, as well as rating values for the cache usage status. An entry selection device 105 refers to the hit database when an entry must be added or deleted between the forwarding table and the cache, and selects the corresponding entry group. That determination is made utilizing typical values for attributes of the priority level such as the average bit rate of each entry group.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: January 31, 2006
    Assignee: NEC Corporation
    Inventor: Tutomu Murase
  • Patent number: 6993622
    Abstract: An apparatus and method for generating a comparand in a content addressable memory array. The apparatus includes a content addressable memory (CAM) array and translation circuitry to receive translation information indicative of translation of a bit group from an initial position in input data to a different position in a comparand transmitted to the CAM array. The translation circuitry includes a switch circuit, one or more storage elements to store the translation information, and one or more decode circuitry to decode the translation information and establish switch circuit connections between the initial position and the position in the comparand. The apparatus also includes program circuitry to provide a bit level programming interface with the translation circuitry. The apparatus may also include a programming bit register to store programming information in the form of a binary pattern where each bit represents a bit group of the input data.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: January 31, 2006
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Sandeep Khanna, Ramagopal R. Madamala