Abstract: A system and method are provided for assigning routing tag bits for routing signals through a Benes network comprising an input stage and an output stage. The input and output stages each comprise a column of 2.times.2 .beta. elements which route an inputted signal to an upper output if the control sequence bit is 0 and to a lower output if the control sequence bit is 1. Each signal inputted to the Benes network is associated with control sequence. For a particular Benes, in a particular control stage of the Benes network, a 0 is assigned to a control sequence bit associated with a signal q.sub.0 received at an upper input of a topmost input stage .beta. element. A 1 is assigned to a control sequence bit associated with a signal q.sub.k received at the same output stage p element as the signal q.sub.0. A 1 is assigned to a control sequence bit associated with a signal q.sub.1 received at a lower input of the topmost input stage .beta. element.

Abstract: A self-arbitrating and self-routing ATM (Asynchronous Transfer Mode) switch has a switching fabric consisting of rows and columns of logic groups. The rows of logic groups have addressing logic for routing data packets received at input ports to the columns of logic groups. Arbitration logic in each of the columns of logic groups route data packets received from the addressing logic to their specified output ports. The arbitration logic forming each column of logic groups resolves conflicts between data packets contending for an identical output port. Additional logic in each column of logic groups signals input ports when data packets are successfully received by their specified output ports. Data packets which lose arbitration during a switch cycle are assigned a higher priority and retransmitted to the switching fabric during the next switch cycle.

Abstract: A scheduling apparatus and a scheduling method are capable of reading data elements from a plurality of queues in such a form that past hysteresis reflects therein. The scheduling apparatus comprises a queue hysteresis table for storing a value e.sub.-- count obtained subtracting the number of data elements (packets in a router) actually fetched out of the queue, from the number of times with which this queue becomes a processing target with respect to each queue. The apparatus also comprises a scheduling unit for cyclically designating each queue as a processing target, adding "1" to e.sub.-- count, corresponding to that queue, in the queue hysteresis table if no data elements exist in the queue designated as the processing target, consecutively fetching, from the processing target queue, the data elements the number of which corresponds to a value of e.sub.-- count corresponding to the queue if the data elements exist in the processing target queue, and decrementing the value of e.sub.

Abstract: In cell transfer in which cells are sent at uniform intervals, in a case in which 18 cells have been lost between cell A (SN=2) and cell B (SN=5), every time 8 times the expectation value T of the cell arrival interval elapses after the arrival of cell A a dummy cell having the same sequence number as cell A (SN=2) is written into the cell FIFO section. Cells or dummy cells are stored in the cell FIFO section in the order SN=2, 2, 2, 5. When cells or dummy cells are read out of the cell FIFO section in order, if the sequence number SN=2 appears twice in a row, dummy data are created corresponding to the cells SN=3, 4, 5, 6, 7, 0, 1; if the sequence number SN=2 is followed by SN=5, then dummy data are created corresponding to SN=3 and 4.

Abstract: Using a known Intelligent Network Architecture a service invocation message is addressed via a Sorter to an appropriate Server. After interrogating the caller when necessary, the Server may re-address the message directly to another Server within the same organization or consortium, which may in turn repeat the process. Thereby a Service Provider representing a large business organization or consortium offers a single umbrella service and is able to introduce new services or sources of information, and to cease, re-configure or resituate the existing services with no effect whatever upon public network or message network equipment.

Abstract: An inventive switch for transporting information cells without cell contention is described. The switch includes at least one parallel distribution network. Each distribution network includes an N.times.N first routing network for receiving cells at a plurality of input ports, where N equals the number the input ports. Illustratively, the routing network is self-routing and non-blocking, such as a Banyan Network. Connected to the N.times.N network are .rho..sup.k groups of shared buffers for storing the cells routed through the network for a period of time not greater than one cell cycle, where k is incremented from 1 to ?log.sub.2 N/log.sub.2 .rho.!.sup.-1 and .rho. equals a predetermined speed-up factor. In one aspect of this embodiment, the number of shared buffers is simply equal to N/.rho.. To prevent cell contention and cell loss, all of the contentious cells (cells destined for the same output during the same cycle) are stored in the same shared buffer. Connected to the shared buffers are .rho..sup.

Abstract: The present invention relates to an Asynchronous Transfer Mode (ATM) multi-channel switch with a structure of grouping/trap/routing that, by designating a port as a group, could accept not only the services having higher speed than the speed of input ports, but also the services having super-rate speed by comprising: an input processing unit for executing reading control of externally inputted cells and adjusting synchronization between an externally inputted cell and a cell returned by blocking and feedback; a channel grouping unit for grouping cells outputted from the input processing unit, according to switching control data; a trapping unit for deciding whether cells grouped in the channel grouping means require switching beyond the capacity of the pertinent channel and, if these cells require switching beyond the capacity of the channel, sending them to the input processing unit by feedback; and a routing unit for routing cells outputted from the trapping unit.

Abstract: Collisions in access to a simulated device are avoided by reserving to one of two or more hardware simulation tests the simulated device. Deadlocks involving requests of multiple tests for reservation of devices are prevented by establishing the order in which such requests are served and requiring that a test must first relinquish reservation of all devices prior to reserving additional devices. Thus, when the additional requests are appended to a queue of pending reservation requests, no test whose requests follow the requests of a second test in the queue can reserve a device requested by the second test. In other words, the situation in which each of two or more tests has reserved a device, reservation of which is required by another of the two or more tests, cannot occur. Starvation is prevented by combining the sorted queue of each reservation phase into a sorted "round robin" arrangement.

Abstract: A system for optimizing data for transmission that includes a data collector operable to collect a plurality of data packets, wherein each data packet includes an address label, a data assembler operable to order the data packets by address label and assemble all data packets with a common address label into a single data block with a single address label, and a transmitter for transmitting the data blocks, wherein the transmitter is operable to broadcast the data blocks.

Abstract: An ATM switch is provided with two stages of crossbar switches with internal blocking paths between the stages. To define priorities of input ports, switches of stage 1 calculate the effective serial numbers of the input ports based on their physical serial numbers and global offset values. To provide dynamic modification of the input port priorities, the global offset values can be changed in each cell cycle of the ATM switch. A sequence of encoded requests for access to required output ports are sent from each switch of stage 1 to each switch of stage 2. Contention arbitration logic in each switch of stage 2 determines which requests may be granted so as to avoid blocking paths between stages 1 and 2, and to prevent out-of-order cell delivery. Signals that acknowledge acceptance of cells and provide information required to establish the serial numbers of the accepted input ports are sent back from each switch of stage 2 to each switch of stage 1.

Abstract: A method and apparatus for interconnecting first and second networks that use the same protocols for communications by a third network. The third network is defined in the first and second networks as a single virtual communications link of the native type used by the first and second networks. In response to requests from initiating nodes in the first and second networks to communicate with destination nodes in the other of the first and second networks, routing computation services in the first and second networks compute routes through the first and second networks that will connect the originating and destination nodes and that include the virtual link as such a route. The virtual link is also used to remotely support the communication needs of dependent nodes in the first and second networks that do not have the ability to establish communications sessions within the networks on their own.

Abstract: A method and apparatus for using a passive telephone monitor to control collaborative systems comprising one or more local computers connected to one or more remote computers, wherein an image displayed on the local computer is substantially simultaneously displayed on the remote computer.

Abstract: An asynchronous transfer mode packet switch for use in a Broadband Integrated Services Digital Network is disclosed. The asynchronous transfer mode packet switch is highly modular and allows expansion of the switch to handle applications having less than eight input and output devices to applications having up to 2.sup.14 input and output devices. The preferred asynchronous transfer mode packet switch is constructed as either a single-stage switch for routing data packets between up to 2.sup.6 input and output devices, a two-stage switch for routing packets between up to 2.sup.10 input and output devices, or a three-stage switch for routing packets between up to 2.sup.14 input and output devices.

Abstract: A system and method monitors and controls an asynchronous transfer mode (ATM) network having at least two ATM stations. An event driven interface is coupled to the ATM network for monitoring the selected ranges of contiguous non-empty cells and of contiguous empty cells communicated between the ATM stations and outputting count values for selected ranges of contiguous non-empty cells and of contiguous empty cells. An analysis computer is coupled to the output of the event driven interface, for analyzing the count values and outputting control signals. The control signals are used to reorder or change the time of transmission of data at a transmitting ATM station on the communications link, in response to the control signals.

Abstract: The method and system for enhanced efficiency in a multisession communication system which utilizes a series of data packets wherein each data packet includes an indication of the identity of a particular session to which that data packet belongs. Each received data packet is examined as that data packet is received to determine a session identity for that packet. An indication of the session identity is thereafter listed within a session queue only in response to an initial occurrence of that session identity. Each data packet for a listed session identity is then stored in a data packet queue in First-In First-Out (FIFO) order which is associated with the listed session identity wherein all packets for a session remain in order, even though the overall order of all packets may be enhanced.

Abstract: Method and apparatus for providing a call-tapping point in a switched network with point-to-multipoint functionality. The tapping point is added as an additional destination for data being sent from a source node to a first destination node. The tapping point is also added as a destination for data being sent from the first destination node to the source node. A merge operation is performed for finding and combining common segments of the paths between the source and destination, the source and tapping point, and the destination and tapping point.

Abstract: The present invention relates to an output buffer type Asynchronous Transfer Mode(ATM) switch that enables decentralized processing, which simultaneously sends multiple inputted cells to each output line, and makes implementation easy by modularization, and without speed-up, could process high-speed data inputted/outputted through input/output lines by comprising: a Batcher Sorting Network arraying, in the order of output line group number, N(N=2.sup.1, 2.sup.2, . . . , 2.sup.n, n is natural numbers) cells simultaneously inputted through N input lines of the switch; an Expanded Banyan Routing Network outputting cells arrayed in said Batcher sorting Network to the corresponding output line group containing each output line; and an Output Queueing Modules temporarily storing cells, outputted from said Expanded Banyan Routing Network, in the buffer used as a common memory and sending these cells to the final output lines.

Abstract: A data processor is connected to a digital communication system such that information packets broadcast on the system are examined to determine if the contents of each packet meet selection criteria, whereupon the packet is coupled to the processor. A state machine or interface processor is connected between the processor and the network, and compares packets to the selection criteria, passing accepted packets and blocking rejected ones. The selection criteria are programmed into the state machine as a decision tree of any length, configuration or data requirements, preferably by the attached data processor, and can include examination of arbitrary sections of the packet for equality/inequality, greater-than/less than, signed and unsigned comparisons and bit mask comparisons. Thus content is variably examined, as opposed to checking for an address or key code at a given byte position. The state machine operates on recognition instructions including byte offset and content specifics.

Abstract: An expandable, self routing switching fabric routes data packets in an ATM switch. A crosspoint array of state machines disposed at internal intersections of input ports and output ports have predetermined identities representative of the output ports and include a comparator for identifying an address header of each data packet with the state machine identity. When a match occurs, the state machine is set active/connected and when a non-match occurs, the state machine is set not-active/disconnected. A circuit through the fabric is set by connection between an input port through an active/connected state machine to a desired output port. The predetermined identity of each state machine comprises a hard wired bit sequence common to the column including the state machines.