Centralized Switching Patents (Class 370/422)
  • Patent number: 7120728
    Abstract: Placing virtualization agents in the switches which comprise the SAN fabric. Higher level virtualization management functions are provided in an external management server. Conventional HBAs can be utilized in the hosts and storage units. In a first embodiment, a series of HBAs are provided in the switch unit. The HBAs connect to bridge chips and memory controllers to place the frame information in dedicated memory. Routine translation of known destinations is done by the HBA, based on a virtualization table provided by a virtualization CPU. If a frame is not in the table, it is provided to the dedicated RAM. Analysis and manipulation of the frame headers is then done by the CPU, with a new entry being made in the HBA table and the modified frames then redirected by the HBA into the fabric. This can be done in either a standalone switch environment or in combination with other switching components located in a director level switch.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: October 10, 2006
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Shahe H. Krakirian, Richard A. Walter, Subbaro Arumilli, Cirillo Lino Costantino, L. Vincent M. Isip, Subhojit Roy, Naveen S. Maveli, Daniel Ji Yong Park Chung, Stephen D. Elstad, Dennis H. Makishima, Daniel Y. Chung
  • Patent number: 7116633
    Abstract: A packet switching system capable of ensuring the sequence and continuity of packets and further compensating for delays in transmission is disclosed. Each of two redundant switch sections has a high-priority queue and a low-priority queue for each of output ports. A high-priority output selector selects one of two high-priority queues corresponding to respective ones of the two switch sections to store an output of the selected one into a high-priority output queue. A low-priority output selector selects one of two low-priority queues corresponding to respective ones of the two switch sections to store an output of the selected one into a low-priority output queue. The high-priority and low-priority output selectors are controlled depending on a system switching signal and a packet storing status of each of the high-priority and low-priority queues.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: October 3, 2006
    Assignee: Juniper Networks, Inc.
    Inventor: Masahiko Honda
  • Patent number: 7113502
    Abstract: Broadband multimedia system including a communication bus, a router, connected to the communication bus and further between a plurality of media sources and a plurality of network transmitters, a session manager, connected to communication bus, where the session manager provides routing instructions to the router, for directing data received from the media sources to the network transmitters for transmitting over a broadband network.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: September 26, 2006
    Assignee: BigBand Networks, Inc.
    Inventors: Ran Oz, Nery Strasman, Amir Bassan-Eskenazi, Andrey Yruski, Oded Golan
  • Patent number: 7103057
    Abstract: An information processing apparatus includes a CPU and a memory connected to an internal local bus, and includes a data transmission/reception unit transmitting and receiving data to and from a public network, a voice encoding/decoding unit encoding and decoding voice data, an image encoding/decoding unit encoding and decoding image data, an external input/output interface controller controlling an input/output interface with an external unit, and an input/output switching unit selectively forming a data bus among the data transmission/reception unit, the voice encoding/decoding unit, the image encoding/decoding unit and the external input/output interface controller.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: September 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junichi Yoshizawa
  • Patent number: 7095726
    Abstract: An ATM switching system includes PVC allocation circuits 13-i corresponding to output queues 14-i is disclosed. At the time of arrival of the leading cell of each burst data, if the output line has a room, the PVC of the burst data is stored as information for admission and identification. The subsequently-arriving cells having the same PVC identification information as the stored identification information are “input to an output buffer, and the cells of the remaining burst data are all discarded. Even when a plurality of burst data compete for the same output line, the fact that all the cells other than the first-arriving admitted burst data are discarded prevents the cells from being input other than within a predetermined bandwidth and localizes the burst data affected by the cell discarding due to output queue overflow.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: August 22, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Morihito Miyagi, Manabu Okamoto
  • Patent number: 7079525
    Abstract: A network switch having a hybrid switch architecture, which is scalable to increase connectivity, buffering, and bandwidth by using multiple shared-memory switch fabrics and multiple crossbar switch fabrics. Each of the crossbar switch fabrics is coupled to each of the shared-memory switch fabrics. The shared-memory switch fabrics are configured to store and retrieve packets. The crossbar switch fabrics are configured to distribute and re-collect packets to and from each of the shared-memory switch fabrics. The network switch having a hybrid switch architecture distributes packets from a crossbar switch fabric to the multiple shared-memory switch fabrics to share the distributed packets among the multiple shared-memory switch fabrics.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: July 18, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Adam Goldstein, David Smith, Harish Devanagondi, Hugh Barrass, Kamran Torabi, Rajesh Patil
  • Patent number: 7068667
    Abstract: A method and system for managing an interconnect fabric that connects nodes. A network manager manages an interconnect fabric or network of routing devices (e.g., interconnect fabric modules, switches, or routers) to allow source nodes to transmit data to destination nodes. The network manager receives registration requests from source nodes to send data to destination nodes, configures the routing devices of the network to establish a path from each source node to its destination node, and provides a virtual address to each source node. The virtual address identifies a path from the source node to the destination node. The source node sends the data to its destination node by providing the data along with the virtual address to a routing device of the network.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: June 27, 2006
    Assignee: The Boeing Company
    Inventors: Michael S. Foster, Michael A. Dorsett
  • Patent number: 7068937
    Abstract: This invention provides a new architecture for a communication system between head-ends and end-users which expands bandwidth and reliability of the communication system. A mux-node receives communication signals from a head-end and forwards the received communication signals to one or more mini-fiber nodes. The connection to the head-end is via a small number of optical fibers and the connections to each of the mini-fiber nodes may be via one or more optical fibers that may provide full duplex communication. The head-end may communicate with the mux-node using digital or digital and analog signals. The mini-fiber nodes may combine the signals received from the head-end with loop-back signals used for local media access control prior to forwarding the signals to the end-users. Upstream data are received by the mini-fiber nodes and transmitted to the mux-node.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: June 27, 2006
    Assignee: AT&T Corp.
    Inventors: Charles D. Combs, Thomas Edward Darcie, Bhavesh N. Desai, Alan H. Gnauck, Xiaolin Lu, Esteban Sandino, Oleh J. Sniezko, Anthony G. Werner, Sheryl Leigh Woodward
  • Patent number: 7061928
    Abstract: A Unified XML integrated voice and data application delivery system includes a switch coupled to a first network and at least a second network, wherein the first network includes distinct voice and data applications and the second network includes one or more user devices, such as a cell phone, personal digital assistant (PDA), etc. The switch transfers voice and data between the applications and the user devices. A controller coupled to the switch includes a finite state machine controlling the interaction between the voice and data applications and the user devices. The finite state machine controls the transfer of voice and data between the applications and the user devices by the switch to enable a user to interact with the integrated instance of the voice and data applications simultaneously via the user devices.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: June 13, 2006
    Assignee: Azurn Networks, Inc.
    Inventors: Sudhir K. Giroti, Mandakini Pahooja
  • Patent number: 7058072
    Abstract: A connection apparatus for a public network switching system includes line ports connected to user terminals and trunk ports connected to Internet lines, a switching unit having diverging ports connected to the trunk ports and converging ports connected to the line ports. A control unit receives a request signal from a user terminal and establishes connections between one of the diverging ports and the converging ports which correspond to Internet lines specified by the request signal. The public network switching system connects the one diverging port to the user terminal and connects a line port and a trunk port.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: June 6, 2006
    Assignee: NEC Corporation
    Inventor: Saburou Ikeda
  • Patent number: 7050440
    Abstract: The present invention relates to switching in electronic networks. Many data transmission protocols and technologies used in such networks, such as TCP/IP and Ethernet, use variable-length packets for transmission. Often however, the nodes that make up these networks typically contain high-speed cell switches that only support fixed-size data units. To support variable-length packets in such a fixed-size cell switch non-interleaving switching and transmission must be offered. The present invention provides such a solution in essence by segmenting a variable-length frame into a plurality of fixed-length cells including a start-of-frame cell, one or more continuation cell(s), and an end-of-frame cell and routes said fixed-length cells through said switch, thereby providing, at an output of said switch, subsequent and deadlock-free transmission of consecutive cells of a certain frame, and block any cell of a different frame from interleaving.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: May 23, 2006
    Assignee: International Business Machines Corporation
    Inventors: Michel Colmant, Ferdinand Gramsamer, Cyriel Minkenberg
  • Patent number: 7035268
    Abstract: The present invention relates to a switching method and apparatus for performing a switching operation in a telecommunication network, wherein a side information and a service information generated based on a received call is converted into a switching technology independent identification information for identifying a start point and an end point of a connection to be switched in said switching apparatus. Thus, the physical resources of the switch are abstracted to a logical model which provides a clear interface for call control and signaling applications. Logical resources are controlled by resource managers, such that the physical resources are hidden by the switching technology independent identification information of the start point and end point of the connection. Thereby, problems with different switching technologies can be solved, and the complexity and maintenance of call control applications can be reduced, since they handle logical resources independent of the switching techniques.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: April 25, 2006
    Assignee: Nokia Corporation
    Inventor: Sami Tilander
  • Patent number: 7023840
    Abstract: A scheduling system and methodology for use in a network switch element having multiserver, multiple-arbiter architecture. Ingress ports and egress ports coupled to the cross-connect fabric of the network element are provided with multiple ingress and egress arbiters, respectively, for effectuating an iterative arbitration strategy such as RGA or RG. Arbiter architectures include singe-arbiter-per-port; single-arbiter-per-server; multiple-arbiters-per-port; and multiple-arbiters-per-server arrangements, wherein the arbiters can be implemented using RRA, BTA, Flexible Ring, or any other arbiter technology. Depending on the iteration strategy, ingress arbiter architecture and egress arbiter architecture, a variety of iterative, multiserver-capable scheduling algorithms can be obtained, which scheduling algorithms can also be implemented in QoS-aware network nodes.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: April 4, 2006
    Assignee: Alcatel
    Inventors: Prasad N. Golla, Gerard Damm, John Blanton, Mei Yang, Dominique Verchere, Hakki Candan Cankaya, Yijun Xiong
  • Patent number: 6996134
    Abstract: A method reliably communicates content for multiple subscriber lines via a single physical transmission medium between a telecommunication gateway and equipment at a customer location. In that method, content for two or more subscriber lines of the customer location is received and converted into packetized data for network communications and/or multiplexed to form an added-main-line (AML) signal that includes power. The packetized data or the AML signal is communicated between the customer location and the telecommunication gateway via the single physical transmission medium. External power can be used to extract the content for the two or more subscriber lines from the packetized data in a primary mode of operation, and the power from the AML signal can be used to extract the content for the two or more subscriber lines from the AML signal in a backup mode of operation.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: February 7, 2006
    Assignee: General Bandwidth Inc.
    Inventors: Peter J. Renucci, Matthew A. Pendleton
  • Patent number: 6987740
    Abstract: The Spanning Tree Protocol (STP) chooses a root switch. Each of the other switches has a “root” port and one or more “designated ports(s)” chosen by STP. Packets are transmitted upstream toward the root switch through the root port, and packets designated for downstream switches from the root switch are received by the root port and transmitted through the designated ports. In the invention, an administrator of the core network identifies which switch ports in the core network are boundary ports to customer networks. The administrator designates the boundary ports as “root guard protected” ports (RG ports). The STP then executes as required by the ordinary STP protocol, and if a RG port is selected by the STP to be a root portm then the status of the port is set to “blocked,” and no packets are transmitted through the port.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: January 17, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Marco Di Benedetto, Ramana Mellacheruvu, Umesh Mahajan
  • Patent number: 6980820
    Abstract: A method and a system for providing signaling in cellular telephone system providing broadcast services to fully integrate broadcast services with the services provided by the cellular telephone systems. The signaling method coordinate interaction between an access network and the subscriber station to allowing the subscriber station to decode the broadcast service, to receive paging messages while receiving the broadcast service, to properly transition between operation states, and other functions known to one of ordinary skill in the art.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: December 27, 2005
    Assignee: Qualcomm Inc.
    Inventors: Ragulan Sinnarajah, Jun Wang, Paul E. Bender, Tao Chen, Edward G. Tiedemann, Jr.
  • Patent number: 6954426
    Abstract: A method and system for routing in an ATM network, which has a plurality of nodes connected to each other via links and a network management centre connected to the ATM network. The optimisation information is defined in a centralized manner in the network management centre and the nodes apply the results of this centralized optimisation according to their own condition. The optimisation information is defined so that sum of rejected capacity for each connection between an origin node and a terminal node does not exceed a predetermined limit. The invention provides the advantage that the operation of individual nodes in setting up connections is very fast. Moreover, a fair distribution of network resources among users is achieved.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: October 11, 2005
    Assignee: Nokia Corporation
    Inventor: Jukka Suominen
  • Patent number: 6944148
    Abstract: A reliable Medium Access Control layer protocol and method employing centralized management of communication in a Time Division Multiple Access network architecture. The Medium Access Control layer protocol implements Quality of Service guaranties to the layers of the Open Systems Interconnection reference model above the Medium Access Control layer by providing guaranteed bandwidth links within the bandwidth range specified by those layers. The Medium Access Control layer protocol further provides variable data slot requisition, variable data slot allocation, dynamic data slot reallocation, and data slot deallocation.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: September 13, 2005
    Assignee: Pulse-LINK, Inc.
    Inventors: Stephan W. Gehring, Krisnawan Rahardja, Carlton J Sparrell
  • Patent number: 6937616
    Abstract: A method and apparatus for digital subscriber line (xDSL) communications between one or more digital signal processors (DSPs) and analog front ends (AFEs) each coupled to corresponding subscriber line(s). The apparatus transports channels of data between subscribers and the DSP(s). The apparatus includes a bus for the transport of digital data, a DSP AFE interfaces. The DSP interfaces couples the DSP to the bus. The DSP interface accepts downstream channels of digital data from the DSP and transmits packets each associated with a corresponding one of the downstream channels to the bus. Each of the packets identifies a targeted AFEs coupled to a selected one of the subscriber lines. The AFE interfaces each couple an associated one of the AFEs to the bus. Each of the AFE interfaces transmits selected packets to a selected one of the subscriber lines for the transport to the subscriber.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: August 30, 2005
    Assignee: Velocity Communication, Inc.
    Inventors: Behrooz Rezvani, Sam Heidari, Avadhani Shridhar, Omprakash S. Samaru, Firooz Massoudi
  • Patent number: 6928073
    Abstract: The implementation of transactions on an integrated circuit comprising a plurality of functional modules connected to a packet router is described. Each functional module generates request packets for implementing memory access operations, each request packet having an operation field comprising eight bits of which a packet type bit denotes the type of the packet, four operation family bit denote the function to be implemented by the packet and three operation qualifier bits act to qualify the function.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: August 9, 2005
    Assignee: STMicroelectronics Ltd.
    Inventors: Andrew M. Jones, John A. Carey
  • Patent number: 6898202
    Abstract: A method, apparatus, and computer program device enabling a computer network switching device to inform an attached requesting device of switch ports affected by configuration changes during the period of time since the last query by the particular requesting device. The switch device is initialized with a change index and data vector, the latter indicative of an initial port configuration. The switch increments the index in response to subsequent port configuration change events, and stores in association with the incremented index a data vector indicating the ports changed during the corresponding event. The switch stores an array of associated index and vector values. The switch responds to a query from an attached requesting device by informing the requesting device of specific ports affected by one or more configuration changes since the index value held by the requesting device was the current index value in the switch.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: May 24, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Gallagher, William J. Rooney
  • Patent number: 6891844
    Abstract: A subscriber network system is provided with is capable of reducing the response time and reducing the device cost. In the subscriber network system, a control cell is generated which includes modified information when modification is caused for the filter table 230 of the cell filter 24-1 to 24-n in the ATM concentrator 200. The cell filters 24-1 to 24-n of the ATM concentrator 200 distribute the cells input through the cell inserting and dividing portion 210 to the subscribers. The control cell terminating portion 220 terminates the control cell supplied from the ATM exchange 100. The filter table 230 stores the setting information for the cell filters 24-1 to 24-n in the control cell terminated at the control cell terminated at the control cell terminating portion 220.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: May 10, 2005
    Assignee: Juniper Networks, Inc.
    Inventor: Hiroshi Ueno
  • Patent number: 6885668
    Abstract: Disclosed is an apparatus and a method capable of processing low-speed circuit data lower than 64 kbps and high-speed packet data higher than 64 kbps in which a high-speed data network is constructed by converting an LCIN (local CDMA (code division multiple access) interconnection network) for supplying a communication path of packet data among sub-systems in a BSC (base station controller) of CDMA system to an ATM (asynchronous transfer mode) for processing high-speed data, installing a TSB (transcoder selector bank) or an SDU (selector distribution unit) for processing high-speed packet data higher than 64 kbps in the BSC, and linking an ATM switch to an MSC (mobile switching center) to provide a high-speed data service with respect to other network.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: April 26, 2005
    Assignee: UTStarcom, Inc.
    Inventors: Ho-Jin Lee, Chae-Moon Lee, Duck-Young Seo, Jin-Hyung Yang
  • Patent number: 6862742
    Abstract: An information distribution apparatus for a CATV system which apparatus is capable of transmitting an identical program directed to a plurality of set-top boxes with the use of a single communication path between a distribution control section and an information distributing section. When distribution of identical information is requested from a plurality of set-top boxes, path identification number decision unit determines an identification number of a single communication path for these set-top boxes. Distribution information transmitting unit transmits the requested distribution information to the information distributing section via the communication path with the thus-determined identification number. In the information distributing section, set-top box identifying unit identifies individual set-top boxes to which the distribution information is to be distributed, based on the identification number of the communication path used for transmission by the distribution information transmitting unit.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: March 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Koji Komatsu, Hiroyuki Asano
  • Patent number: 6850523
    Abstract: A bus interface for exchanging packets within a communication system between a single data link layer and a physical layer device which includes a link transmit interface on the link layer device, a PHY transmit interface on the physical layer devices electrically coupled to the link transmit interface, a link receive interface on the link layer device and a PHY receive interface on said physical layer device electrically coupled to the link receive interface, wherein data is transmitted from the link transmit interface to the PHY transmit interface and from the PHY receive interface to the link receive interface in packets of variable length in a word based format wherein each word has at least 1 byte.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: February 1, 2005
    Assignee: PMC-Sierra, Inc.
    Inventors: Travis James Karr, Martin Chalifoux
  • Patent number: 6848017
    Abstract: A procedure is described for determining which source to connect to which destination in a non-blocking crossbar switch through which a plurality of sources may be attempting to gain access to a plurality of destinations. To this end, a metric is dynamically associated with each source and with each destination. Matching of sources to destinations is accomplished by iteratively assigning the destination having the smallest metric of all currently unmatched destinations to the source having the smallest metric of all currently unmatched source.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: January 25, 2005
    Assignee: EMC Corporation
    Inventors: Stuart P. MacEachern, Jacob Y. Bast, Raju C. Bopardikar, Jack J. Stiffler
  • Patent number: 6842481
    Abstract: An arrangement for secure repeater communication in an IEEE 802.3 network by transmitting transmit data and a transmit enable signal on a selected repeater port based on an address lookup table in the repeater core. The other repeater ports that do not have a network address corresponding to the destination address of data packet receive corrupted data generated in response to signals from the respective repeater ports. The repeater ports cause generation of corrupted data by concurrently outputting an asserted transmit error signal and an unasserted transmit enable signal on the corresponding media independent interface. A physical layer transceiver, upon detecting the concurrent assertion of the transmit error signal and the deassertion of the transmit enable signal on the media independent interface, selectively outputs a prescribed data pattern as the transmit data to the network node.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: January 11, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventor: William Lo
  • Publication number: 20040246982
    Abstract: A method and system is adapted to provide for a low-cost and highly flexible system that can control and change configurations on one or more segments of a Compact Peripheral Component Interconnect Packet Switching Backplane (CPCI/PSB or CPCI and CPSB) during the backplane's lifetime that overcomes the limitations of the prior art. In one embodiment of the present invention, the segments are configurable to either a CPCI and CPSB configuration or a CPSB only configuration by controlling a CPCI indication signal, such as a PCI_PRESENT# signal. The PCI_PRESENT# signal of the present invention is to be controlled by a Chassis Management Controller (CMC) and the CMC software is used to configure each of the segments by driving zero or one on the segments (instead of hardwiring these segments to ground or open during the manufacturing of the backplane).
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Ramani Krishnamurthy, Raymond K. Ho, Balkar S. Sidhu
  • Patent number: 6813643
    Abstract: A multimedia apparatus is described comprising: a tuner for tuning to a carrier frequency and down-converting a frequency-modulated multimedia signal to a baseband multimedia signal; a selectable protocol module including QAM/MPEG logic and Data Over Cable Service Interface Specification (“DOCSIS”) logic configured to receive the baseband multimedia signal; and selection logic configured to select the QAM/MPEG logic for processing a first signal having a first signal format to produce a first processed signal, the selection logic further configured to select the DOCSIS logic for processing a second signal having a second signal format to produce a second processed signal.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: November 2, 2004
    Assignee: Digeo, Inc.
    Inventor: Stephen G. Perlman
  • Patent number: 6810032
    Abstract: A network control apparatus for controlling devices in a predetermined area of a communication network includes a request-receiving unit for receiving a first route-setting request, a database for storing device information and topology information, a request-range-judging unit for forming a judgment as to whether or not the first route-setting request is relevant to any of the controlled devices, and a request-transmitting unit for transmitting the first route-setting request to an upper-level network control apparatus in the case of the request-range-judging unit's judgment outcome indicating that the first route-setting request is irrelevant to any of the controlled devices.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: October 26, 2004
    Assignee: Fujitsu Limited
    Inventors: Shinya Kano, Shunsuke Kikuchi
  • Patent number: 6798777
    Abstract: A method and apparatus for performing a lookup in a switching device of a packet switched network where the lookup includes a plurality of distinct operations each of which returns a result that includes a pointer to a next operation in a sequence of operations for the lookup. The method includes determining a first lookup operation to be executed, executing the first lookup operation including returning a result and determining if the result includes a pointer to another lookup operation in the sequence of operations. If the result includes a pointer to another lookup operation, the lookup operation indicated by the result is executed. Else, the lookup is terminated.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: September 28, 2004
    Assignee: Juniper Networks, Inc.
    Inventors: Dennis C. Ferguson, Rajiv Patel, Gerald Cheung, Pradeep S. Sindhu
  • Patent number: 6798781
    Abstract: A passive optical network employing wavelength dependent routing uses two-phase signalling between a network controller and terminals. In a first phase, terminals are informed of the wavelength channel allocated to them for a second signalling phase, groups of terminals being allocated to each channel. In the second signalling phase, control signals indicate to the terminal the wavelength and time slots allocated to the terminal in the following data transmission phase.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: September 28, 2004
    Assignee: British Telecommunications public limited company
    Inventor: Alan M Hill
  • Patent number: 6781964
    Abstract: A method for realizing multipoint connections in a H.323 data communication network composed of a connection between first terminal equipment and second terminal equipment and of a consultation connection between the first terminal equipment and third terminal equipment. The multipoint connection setup is respectively initiated by the first terminal equipment with a connection setup to a conference unit. After the setup of signaling connections between the participating terminal equipment and the conference unit, and after releasing the connections between the terminal equipment, the conference unit initiates the opening of payload data channels between the terminal equipment via the conference unit. The setup of signaling connections between the participating terminal equipment and the conference unit is controlled in a call redirection initiated by the first terminal equipment and implemented in the other terminal equipment having the call redirection destination of conference unit.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: August 24, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventor: Karl Klaghofer
  • Patent number: 6781986
    Abstract: A method, apparatus and system for a scalable high capacity switch architecture involves a switching controller for use with a plurality of switching controllers in a switching system. Each switching controller has provisions for receiving a data packet, provisions for determining a destination of the data packet, provisions for determining whether any other switching controller in the system intends to transmit to the determined destination of the data packet and provisions for transmitting the received data packet to the determined destination when no other switching controllers intend to transmit to the determined destination.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: August 24, 2004
    Assignee: Nortel Networks Limited
    Inventors: Amr G. Sabaa, Ibrahim El-Etr
  • Patent number: 6778547
    Abstract: An integrated multiport switch operating in a packet switched network utilizes an internal rules checker (IRC) to process data frames. The IRC employs a modular, pipelined architecture that enables data frames to be processed simultaneously, thereby increasing data throughput.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: August 17, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Shashank C. Merchant
  • Publication number: 20040151195
    Abstract: A system of switch modules comprises input demultiplexers connected to ports on each of the modules and output multiplexers connected to each of the modules. Each module has output and input interfaces for mesh links and at least one output interface is looped back to an input interface on the same module. The arrangement reduces module-to-module traffic and corresponding increases the transmit bandwidth of a module.
    Type: Application
    Filed: June 6, 2003
    Publication date: August 5, 2004
    Applicant: 3Com Corporation
    Inventors: Bryan J. Donoghue, Richard A. Gahan, Kam Choi, Edele O'Malley, Eugene O'Neill
  • Publication number: 20040146062
    Abstract: The system provides an IP network card that comprises a redundancy configuration register; an interface; and redundancy mapping logic. The redundancy configuration register stores card configuration data. The interface receives slot active signals from other cards. The redundancy mapping logic is communicatively coupled to the register and interface. The logic maps a packet to a slot having an active card based on the data in the register, an address in the packet, and received slot active signals.
    Type: Application
    Filed: January 27, 2003
    Publication date: July 29, 2004
    Applicant: Nokia Inc.
    Inventors: Vimal Parikh, Amar Gupta, Chi Fai Ho
  • Publication number: 20040141465
    Abstract: An object of the present invention is to provide a routing control device and method of generating routing control information whereby the function of connected transfer devices can be more simplified and more efficient, and routing information can be grasped appropriately. A communication system includes a plurality of transfer devices R1-R6 and a routing control device. Each of the transfer devices R1-R6 is physically connected with the routing control device and transmits the topology information (link information and metric information) possessed individually to the routing control device. The routing control device has a routing control information generating unit that generates routing control information collectively based on routing information such as the topology information transmitted from the transfer devices R1-R6. The routing control information generating unit generates a routing control table for all of the transfer devices that transmitted routing information thereto.
    Type: Application
    Filed: October 3, 2003
    Publication date: July 22, 2004
    Applicant: NTT DoCoMo, Inc
    Inventors: Manhee Jo, Katsutoshi Nishida, Takatoshi Okagawa, Noriteru Shinagawa
  • Publication number: 20040131073
    Abstract: For fast ethernet switches, a modular and scalable structure using programmable one-port communication modules is disclosed. The forwarding process is sequential and operates in a store-and-forward mode. The design follows a strictly predictable scheme. The forwarding process, the distribution logic, maximum latency and programmable functions, i.e. traffic monitoring capabilities, traffic filtering/policing capabilities and network management function capabilities are described and explained with reference to typical examples.
    Type: Application
    Filed: July 31, 2003
    Publication date: July 8, 2004
    Inventors: Hans-Walter Hahn, Wolfram Busching, Peter Wahl, Robert Wolf
  • Patent number: 6760301
    Abstract: One or more nodes of a data communication system is automatically switched between two or more possible node configurations, such as between a DTE configuration and a DCE configuration, until the presence of a carrier or similar indicator signal is sensed. Configuration devices include relays and electronic switches. Control devices preferably are microprocessor based. In one aspect, upon power up or other initiation, the microprocessor toggles an output control signal so as to repeatedly toggle a switch between, e.g., DTE and DCE positions and to terminate the toggling when a link indicator is detected.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: July 6, 2004
    Assignee: Cisco Technology, Inc.
    Inventor: Peter R. Falk
  • Patent number: 6745265
    Abstract: A FIFO is provided which includes gray-encoded READ and WRITE counters in which partial capacity flags (referred to collectively as “WATERMARK level” flags herein) are generated when the difference between the count values in the two counters exceeds a first threshold level and which resets the flag when the difference between the count values drops below a second, lower threshold level. In accordance with the present invention, a single gray-coded WRITE pointer counter comprises a WRITE pointer register and a gray-code increment block. A READ pointer register comprises a shift register and a gray code increment block having plural stages and storing consecutive incremental WATERMARK values, based on the READ pulse count, therein. With each successive READ clock pulse, consecutive WATERMARK values are stored in the plural-stage READ pointer register, and with each READ clock pulse these values are incremented by one.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: June 1, 2004
    Assignee: Agere Systems Inc.
    Inventor: Vladimir Sindalovsky
  • Patent number: 6731644
    Abstract: A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in an asynchronous, multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: May 4, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Garry P. Epps, Michael Laor
  • Patent number: 6731646
    Abstract: A modular Fibre Channel switch includes a data switching path and a message switching path to provide logical point to point connections between switch ports. The data switching path includes a bank of shared SRAM memory devices that are accessed in a time-sliced protocol by each switch port. A receiving switch port writes a data frame to the bank of shared SRAM and the transmitting switch port then reads the data frame from the shared SRAM thereby effecting the logical point to point connection. Because the switch port includes a frame logic circuit that allows for an arbitrary start of frame address, each frame can be written to the first available DRAM device thus eliminating the need to buffer the data frame while waiting for a predetermined DRAM device to cycle in the time sliced protocol. The message switching path includes a message crossbar switch that is barrel shifted in a time sliced fashion to effect message passing among the switch ports.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: May 4, 2004
    Assignee: Brocade Communications System Inc
    Inventors: David C. Banks, Steven L. Farnworth, Bent Stoevhase, Paul Ramsay
  • Patent number: 6731631
    Abstract: A system, method and article of manufacture are provided for updating a switching table in a switch fabric. In general, one or more status packets are received by a switch fabric component without handshaking between the transmitting source(s) and the receiving switch fabric component. Each status packet includes information relating to a status of an output port. A switching table is then updated based on the status information of the received status packet.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: May 4, 2004
    Assignee: Paion Company, Limited
    Inventors: You-Sung Chang, Ju-Hwan Yi, Seung-Wang Lee, Moo-Kyung Kang
  • Patent number: 6707818
    Abstract: A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first internal memory communicating with the first data port interface, the second data port interface, and the third data port interface. A first memory management unit having an external memory interface for communicating data from at least one of the first data port interfaces and the second data port interface to and from an external memory is also provided.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: March 16, 2004
    Assignee: Broadcom Corporation
    Inventors: Shiri Kadambi, Shekhar Ambe
  • Publication number: 20040008698
    Abstract: A novel multiport overhead cell processor for processing overhead cells (e.g., SONET/SDH overhead bytes, etc.) in a telecommunications node is disclosed. Some embodiments of the present invention advantageously employ a single instance of logic to process overhead cells for all of a node's input ports. The illustrative embodiment comprises a single overhead cell processor and a memory for storing instances of state variables associated with each input port.
    Type: Application
    Filed: July 11, 2002
    Publication date: January 15, 2004
    Inventor: Peter J. Giacomini
  • Publication number: 20040008710
    Abstract: A controller (GK) of a communication system (SYS) including in each of a plurality of geographically distant zones (ZA, ZB, ZC) a zone-specific controller (GK) and one or more subscriber terminals (EP) comprises a controller characteristics memory (CCM) for storing at least a private network identifier (PNID), a private network configuration memory (PNCM) for storing the private network configuration, a private network configuration determing means (PMDM) for communicating with other controllers (GK) of the communication system to determine the private network configuration and a call router for routing a call setup message received from a subscriber terminal (EP-A3) in one zone (ZA) to another subscriber terminal (EP-B2) of another zone (ZB).
    Type: Application
    Filed: December 24, 2002
    Publication date: January 15, 2004
    Inventors: Francisco Parra-Moyano, Javier Perez Fernandez, Jesus-Javier Arauz-Rosado
  • Patent number: 6675222
    Abstract: Methods and apparatus for providing a network data switch and buffer system are disclosed. In a switch having a memory associated therewith, the memory including a general memory and a plurality of dedicated memory segments, the general memory being available to a plurality of users associated with one or more network devices and each one of the plurality of dedicated memory segments being associated with one of the plurality of users, a method of storing data includes receiving data from a source network device connected to the switch. The data is then stored in a data buffer so that a portion of one of the plurality of dedicated memory segments is allocated when the general memory has been depleted.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: January 6, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Brian A. Petersen, James R. Rivers
  • Patent number: 6671280
    Abstract: A method for integrating Asynchronous Transfer Mode (ATM) and frame-based traffic flows within a telecommunications network is disclosed. The telecommunications network includes a network processor having upside processing means for delivering an incoming flow from the telecommunications network to a switch and downside processing means for delivering outgoing network traffic from the switch to the telecommunications network. The incoming flow is initially received at the upside processing means as a frame-based flow. The incoming flow may be characterized as belonging to a group having frame-based flows and ATM flows. In response to the receipt of the incoming flow, the incoming flow is determined if it is destined for a legacy, ATM-only device. The incoming flow is then processed according to the determined routing requirements and the incoming flow characterization before delivering the incoming flow to the switch.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: December 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6667977
    Abstract: In an ATM cell multiplexing apparatus for assembling data, which arrives from multiple terminal lines, into cells, time-division multiplexing the cells and transmitting them to a network, traffic management is performed in each cell assembler, based upon service category and traffic, for every channel accommodated by the terminal lines, and traffic management on a per-cell-assembler basis is performed in an ATM bus scheduler taking into consideration service categories and traffic of all channels accommodated by the cell assemblers. Further, the ATM bus scheduler creates a main schedule table and a subschedule table, which is referred to after the main schedule table, for allocating more transmission privileges to a cell assembler that accommodates a CBR channel, and grants transmission privileges to the cell assemblers upon referring to the main schedule table and subschedule table.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: December 23, 2003
    Assignee: Fujitsu Limited
    Inventor: Yoshihisa Ono