Using Redundant Synchronization Words Patents (Class 370/511)
  • Patent number: 10334530
    Abstract: A system and method for managing power in a subnet having a hub in communication with one or more nodes is disclosed. The hub and nodes communicate using one or more non-contention access methods, such as scheduled, polled or posted access. The node may enter a sleep or hibernation state while no scheduled, polled or posted allocation interval is pending. The hibernation state allows the node to hibernate through one or more entire beacon periods. In the sleep state, the node may be asleep between any scheduled, polled and posted allocation intervals for the node or during another node's scheduled allocation interval in a current beacon period. By selecting which access scheme is in use, the node and hub can increase the node's chances to be in hibernation or sleep state and minimize power consumption.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: June 25, 2019
    Assignee: Texas Instruments Incorporated
    Inventor: Jin-Meng Ho
  • Patent number: 9866323
    Abstract: Optical wireless communication techniques are described and claimed. In one embodiment, the disclosure relates to method and apparatus to provide optical signaling with visible light having variable pulse position modulation (VPPM). The optical signal includes a Start Frame Delimiter (SFD) which indicates beginning of an asynchronous optical signaling. The VPPM signaling includes a lower frequency time varying amplitude component that when subsampled by a low frame rate camera results in alias induced flicker or blinking. Such signals are quickly recognizable as signals with modulated data. In another embodiment, the disclosure provides a system, device and method for decoding a Start Frame Delimiter (SFD) to indicate arrival of incoming VPPM optical data.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: January 9, 2018
    Assignee: Intel Corporation
    Inventors: Richard D. Roberts, Javier Perez-Ramirez, Parmoon Seddighrad, Roni Abiri
  • Patent number: 9480033
    Abstract: A system and method manages a stream of data to receive a data packet among a set of potentially colliding data packets. The stream of data is monitored with a first detector level to recognize a potential first data packet having a bit sequence that matches a known bit sequence. In response to a recognition of a potential first data packet by the first detector level, the stream of data is monitored with a second detector level to recognize a potential second data packet having a bit sequence that matches a known bit sequence while the first detector level is engaged with the potential first data packet.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 25, 2016
    Assignee: Itron, Inc.
    Inventors: Scott L. Cumeralto, Richard Nolan DeVries
  • Patent number: 8913633
    Abstract: A system and method for time synchronization in a communication network. The communication network includes a plurality of network nodes each having a respective internal clock, and a reference node having a reference clock and each configured transmits synchronization messages within the communication network. At least one network node is configured to determine an estimated reference clock time discretely upon arrival of a synchronization message at the at least one network node. To that end, the at least one network node includes a controller for determining a controlled time comprising a time-continuous estimate of the discreetly estimated reference clock time. The controller is configured to determine the controlled time based on an input that is extrapolated to an execution time instant of the controller, where the execution time instant is separated from the time instant of arrival of the synchronization message by a delay (?tdelay).
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: December 16, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventors: Dragan Obradovic, Ruxandra Scheiterer, Günter Steindl, Philipp Wolfrum
  • Patent number: 8861501
    Abstract: A timing source is provided for sending timing information via a packet network. The source comprises a first clock for generating the timing information and a packet forming section for forming a sequence of packets. An output section in the form of a packet launch control section transmits the packets via the network as packet bursts, each of which comprises a plurality of packets with the intervals between consecutive packets of each burst being less than the intervals between consecutive packets. A time-stamping section inserts into each packet a transmission time derived from the timing information generated by the clock.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: October 14, 2014
    Assignee: Microsemi Semiconductor Limited
    Inventors: Martin Richard Crowle, Timothy Michael Edmund Frost, Robertius Laurentius Van Der Valk
  • Publication number: 20140269781
    Abstract: A method of synchronizing a local estimation of global network time of a receiving node on a network to a global network time reference is provided. The free running nodes receive precise time protocol synchronization messages and determine a ratio and an offset based on time data extracted from the messages.
    Type: Application
    Filed: January 28, 2014
    Publication date: September 18, 2014
    Applicant: General Electric Company
    Inventors: Pavlo Bobrek, Jeffrey VanDorp, Harry Molling
  • Patent number: 8830816
    Abstract: A method and apparatus are provided for performing acquisition, synchronization and cell selection within an MIMO-OFDM communication system. A coarse synchronization is performed to determine a searching window. A fine synchronization is then performed by measuring correlations between subsets of signal samples, whose first signal sample lies within the searching window, and known values. The correlations are performed in the frequency domain of the received signal. In a multiple-output OFDM system, each antenna of the OFDM transmitter has a unique known value. The known value is transmitted as pairs of consecutive pilot symbols, each pair of pilot symbols being transmitted at the same subset of sub-carrier frequencies within the OFDM frame.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: September 9, 2014
    Assignee: Apple Inc.
    Inventors: Jianglei Ma, Ming Jia, Peiying Zhu, Wen Tong
  • Patent number: 8824612
    Abstract: Apparatuses, circuits, and methods are disclosed for reducing or eliminating unintended operation resulting from metastability in data synchronization. In one such example apparatus, a sampling circuit is configured to provide four samples of a data input signal. A first and a second of the four samples are associated with a first edge of a latching signal, and a third and a fourth of the four samples are associated with a second edge of the latching signal. A masking circuit is configured to selectively mask a signal corresponding to one of the four samples responsive to the four samples not sharing a common logic level. The masking circuit is also configured to provide a decision signal responsive to selectively masking or not masking the signal.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: September 2, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Yantao Ma
  • Patent number: 8804892
    Abstract: A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A first loop supplies a first clock signal to a second loop. The second loop modifies the first clock signal to produce the recovered clock signal and uses the recover clock signal to produce the recovered data signal. The first loop changes the frequency of the first clock signal based on frequency comparison and data transition density metrics.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 12, 2014
    Assignee: Vitesse Semiconductor Corporation
    Inventor: Ian Kyles
  • Patent number: 8717972
    Abstract: The present invention provides a method for range extension is wireless communication systems. One embodiment of the method includes determining whether a mobile unit is within a first range corresponding to a range of timing advances supported by a timing advance command. This embodiment also includes transmitting a plurality of timing advance commands to the mobile unit when the mobile unit is outside the first range so that the mobile unit can synchronize with the base station by combining information in the plurality of timing advance commands.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: May 6, 2014
    Assignee: Alcatel Lucent
    Inventors: Fang-Chen Cheng, Jung Ah Lee
  • Patent number: 8711990
    Abstract: A system including a demodulation module, a metric generation module, and a preamble detection module. The demodulation module is configured to generate demodulated signals based on demodulating, in accordance with a differential demodulation scheme, signals received from a base station. The signals received from the base station include a plurality of symbols. The demodulated signals comprise a plurality of real parts each having a corresponding magnitude. The metric generation module is configured to generate a plurality of metrics for the plurality of symbols based on the corresponding magnitudes of the plurality of real parts of the demodulated signals. The preamble detection module is configured to detect, based on the plurality of metrics, whether the plurality of symbols in the signals received from the base station includes a preamble symbol.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: April 29, 2014
    Assignee: Marvell International Ltd.
    Inventors: Jungwon Lee, Qing Zhao
  • Patent number: 8705579
    Abstract: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: April 22, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Jon James Anderson, Brian Steele, George Alan Wiley, Shashank Shekhar
  • Patent number: 8705656
    Abstract: A transmission apparatus includes a plurality of orthogonal frequency division multiplexing (OFDM) modulation signal generators, which generate a first OFDM modulation signal and a second OFDM modulation signal. The transmission apparatus also includes a transmitter that transmits the first OFDM modulation signal from a first antenna and the second OFDM modulation signal from a second antenna, in an identical frequency band.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Yutaka Murakami, Masayuki Orihashi, Akihiko Matsuoka
  • Patent number: 8681817
    Abstract: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: March 25, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Jon James Anderson, Brian Steele, George Alan Wiley, Shashank Shekhar
  • Patent number: 8675689
    Abstract: A method of synchronizing a local estimation of global network time of a receiving node on a network to a global network time reference is provided. The free running nodes receive precise time protocol synchronization messages and determine a ratio and an offset based on time data extracted from the messages.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: March 18, 2014
    Assignee: General Electric Company
    Inventors: Pavlo Bobrek, Jeffrey VanDorp, Harry Molling
  • Patent number: 8649454
    Abstract: A detector receives detects a first known signal in a packet signal. An LTF correlation unit performs correlation processing on the packet signal received by a receiving unit. Upon detecting the arrival timing, an update correlation unit terminates a first window and performs correlation processing on the packet signal received by the receiving unit, in a second window. When correction timing is detected and when correction timing is more likely to be accurate than the arrival timing, an estimation unit changes the correction timing to the arrival timing; when the arrival timing is more likely to be accurate than the correction timing, the estimation unit maintains the arrival timing.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: February 11, 2014
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Keisuke Higuchi
  • Patent number: 8619786
    Abstract: Methods and apparatuses are provided for facilitating distributed transmissions among a plurality of access terminals for a transmission sequence. An access point may assign a predecessor transmitter device for each of a plurality of access terminals, and may transmit to each access terminal an instruction to follow a respective preceding transmission by the predecessor transmitter. An access terminal may receive the transmission including the instruction, and may monitor for and detect the preceding transmission. The access terminal may then transmit a transmission after the completion of an interframe space that may follow the detected preceding transmission.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 31, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Maarten Menzo Wentink
  • Patent number: 8615032
    Abstract: Sub-microsecond time transfer in a GPS/GNSS receiver using a weak GPS/GNSS signal is provided. The digitized complex baseband signal and the generated PN code are cross-correlated for each code period so as to output a complex correlation value at each code epoch of the generated PN code, where a sequence of the output correlation values form a data stream representing the navigation message. Bit synchronization generates bit sync pulses at bit boundaries. The location of a target segment having a known sequence at a known bit location in the navigation message is detected by searching through a plurality of subframes and accumulating search results for the plurality of subframes. Transmission time of the target segment is determined from the detected location of the target segment, with a certain time ambiguity. Accurate local time is determined by solving the time ambiguity using approximate time obtained from an external source.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: December 24, 2013
    Assignee: Magellan Systems Japan, Inc.
    Inventor: Lawrence R. Weill
  • Patent number: 8605847
    Abstract: In described embodiments, a transceiver includes a clock and data recovery module (CDR) with an eye monitor and a cycle slip monitor. The cycle slip detector monitors a CDR lock condition, which might be through detection of slips in sampling and/or transition timing detection. The cycle slip detector provides a check point to sense system divergence, allowing for a mechanism to recover CDR lock. In addition, when the CDR is out-of-lock, the various parameters that are adaptively set (e.g., equalizer parameters) might be invalid during system divergence. Consequently, these parameters might be declared invalid by the system and not used.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: December 10, 2013
    Assignee: LSI Corporation
    Inventors: Mohammad Mobin, Mark Trafford, Ye Liu, Vladimir Sindalovsky, Amaresh Malipatil
  • Patent number: 8576961
    Abstract: A method for determining an overlap and add length estimate comprises determining a plurality of correlation values of a plurality of ordered frequency domain samples obtained from a data frame; comparing the correlation values of a first subset of the samples to a first predetermined threshold to determine a first edge sample; comparing the correlation values of a second subset of the samples to a second predetermined threshold to determine a second edge sample; using the first and second edge samples to determine an overlap and add length estimate; and providing the overlap and add length estimate to an overlap and add circuit.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: November 5, 2013
    Assignee: Olympus Corporation
    Inventors: Haidong Zhu, Dumitru Mihai Ionescu, Abu Amanullah
  • Patent number: 8571150
    Abstract: According to one embodiment, a frequency offset compensation apparatus includes a first estimation unit, a second estimation unit, a setting unit, a synthesis unit and a compensation unit. The first estimation unit estimates a first rotation. The second estimation unit estimates a second rotation. The setting unit sets a weighting factor for the second rotation to a first value if a received power is less than a threshold value, and sets the weighting factor for the rotation to a second value being smaller than the first value if the received power is not less than the threshold value. The synthesis unit calculates a compensation value. The compensation unit compensates for a frequency offset.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: October 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiichiro Horikawa, Koichiro Ban
  • Patent number: 8532234
    Abstract: The disclosure aims to implement an automatic frequency offset compensation of the frequency between emitter and receiver equipments, in radio frequency modules, with a frequency offset that can be larger than that the receiver can allow, without time loss and extra consumption. To solve this problem, the disclosure provides an automatic frequency offset compensation device comprising a reception front end, at least a filter, an I/Q demodulator for obtaining the I (In Phase) and Q (Quadrature) parameter, an automatic frequency control AFC unit for comparison of a received frequency with the real frequency of the equipment, and a microcontroller and a frequency synthesizer. In this device, the frequency offset is calculated by the AFC unit from the information given by the I/Q demodulator.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: September 10, 2013
    Assignee: Coronis, SAS
    Inventors: Laurent Maleysson, Fabien Bonjour
  • Patent number: 8526554
    Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: September 3, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Michael Hennedy
  • Patent number: 8520787
    Abstract: Apparatus and methods are disclosed, such as those involving deskewing serial data transmissions. One such apparatus includes a plurality of receivers, each of which is configured to receive a serial data stream. Each of the receivers includes a shift register including a plurality of stages arranged in sequence to propagate a stream of characters. Each of the stages is configured to store a character, and shift the character to a next stage in response to a clock signal. The receiver also includes a multiplexer having a plurality of inputs, each of the inputs being electrically coupled to a respective one of the stages of the shift register, and to select one of the stages to generate an output such that the outputs of the multiplexers in the receivers are deskewed.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: August 27, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Michael Hennedy
  • Patent number: 8514920
    Abstract: Methods and apparatus are provided for pseudo asynchronous testing of receive paths in serializer/deserializer (SerDes) devices. A SerDes device is tested by applying a source of serial data to a receive path of the SerDes device during a test mode. The receive path substantially aligns to incoming data using a bit clock. A phase is adjusted during the test mode of the bit clock relative to the source of serial data to evaluate the SerDes device. The source of serial data may be, for example, a reference clock used by a phase locked loop to generate the bit clock. The phase of the bit clock can be directly controlled during the test mode, for example, by a test phase control signal, such as a plurality of interpolation codes that are applied to an interpolator that alters a phase of the bit clock.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: August 20, 2013
    Assignee: LSI Corporation
    Inventors: Christopher J. Abel, Parag Parikh, Vladimir Sindalovsky
  • Patent number: 8509073
    Abstract: An error management system and process can be used to identify an erroneous data packet in a data stream. In response to identifying the erroneous data packet, a subsequent valid data packet is located in the data stream. In one embodiment, a plurality of candidate locations of header checksum windows are searched and checked for a valid checksum. Multiple integrity checks of multiple header checksums can be used to reduce the probability of a false positive integrity check. In another embodiment, one or more information data fields can used for determining packet integrity by determining if the fields contain valid information bits.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: August 13, 2013
    Assignee: Wi-Lan, Inc.
    Inventors: Yair Bourlas, Brian D. Petry, Peter J. Graumann, Kripps Asirvatham, Doraid Y. Sadiq, Karle J. Johnson, Kenneth L. Stanwood
  • Patent number: 8428206
    Abstract: A method and system of fine timing synchronization for an OFDM signal. The OFDM signal is coarse timing synchronized, generating a synchronization sequence and a CFR (Channel Frequency Response). The synchronization sequence is removed. A correlation coefficient of the correlation between the CFR applied to a number of carriers and the number of carriers with different window shifts is calculated. The largest window shift corresponding to a downsampling factor is indicated by the lowest correlation coefficient greater than a threshold. The CFR is downsampled by the downsampling factor, and an inverse FFT is performed on the downsampled CFR with a reduced number of calculations reduced by the downsampling factor, transforming the CFR into a CIR. A fine timing synchronization position is determined from the CIR and is utilized by an FFT unit within an OFDM receiver to accurately receive OFDM symbols of the OFDM signal.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: April 23, 2013
    Assignee: NXP B.V.
    Inventor: Yan Li
  • Patent number: 8416902
    Abstract: A clock and data recovery device recovers data from a sequential stream of data that includes bursts of data separated by gaps. Each burst of data arrives with its own phase and with its own deviation from a nominal frequency. The bursts of data begin with a preamble that is utilized to determine the timing of the burst. The clock and data recovery device determines the timing of a burst of data using signals from one or more demultiplexers or samplers. At the start of each burst of data, sampled input signals are analyzed by an edge detector to determine a sample phase for the burst. A selector utilizes the sample phase determined by the edge detector to choose which of the sampled input signals to use to produce output data signals from the clock and data recovery device.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: April 9, 2013
    Inventors: Ian Kyles, Eugene Pahomsky
  • Patent number: 8412250
    Abstract: Methods and systems for slow associated control channel signaling are disclosed. An example method for securing communications in a mobile network disclosed herein comprises transmitting a first variant of a message of a first type on a first slow associated control channel (SACCH) before ciphering is started on the first SACCH, and after ciphering is started on the first SACCH, transmitting a second variant of the message of the first type on the first SACCH, and subsequently transmitting the second variant of the message of the first type on the first SACCH, wherein the subsequently transmitted second variant of the message of the first type is the next transmitted message of the first type on the first SACCH.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: April 2, 2013
    Assignee: Research In Motion Limited
    Inventors: David Hole, Eswar Kalyan Vutukuri
  • Patent number: 8392931
    Abstract: A method for communicating between devices in a network includes creating an I/O tunnel between a first device and a second device through the network. The I/O tunnel is associated with I/O resources in both the first device and the second device, and wherein at least one of the I/O resources comprises a buffer resource. A data transfer operation may be sent between the first device and the second device by consuming at least some of the I/O resources associated with the I/O tunnel. A plurality of commands or a plurality of responses can be aggregated into a single buffer resource. Upon completion of the data transfer operation, the I/O resources that are consumed are automatically renewed.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Clark Lubbers, Susan Elkington, Randy Hess, Stephen J. Sicola, James McCarty, Anuja Korgaonkar, Jason Leveille
  • Patent number: 8391341
    Abstract: Sub-microsecond time transfer in a GPS/GNSS receiver using a weak GPS/GNSS signal is provided. The digitized complex baseband signal and the generated PN code are cross-correlated for each code period so as to output a complex correlation value at each code epoch of the generated PN code, where a sequence of the output correlation values form a data stream representing the navigation message. Bit synchronization generates bit sync pulses at bit boundaries. The location of a target segment having a known sequence at a known bit location in the navigation message is detected by searching through a plurality of sub-frames and accumulating search results for the plurality of subframes. Transmission time of the target segment is determined from the detected location of the target segment, with a certain time ambiguity. Accurate local time is determined by solving the time ambiguity using approximate time obtained from an external source.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: March 5, 2013
    Assignee: Magellan Systems Japan, Inc.
    Inventor: Lawrence R. Weill
  • Patent number: 8385374
    Abstract: A multilane communication device and methods for using the multilane communication device. In one embodiment, a physical coding sub-layer module comprising includes multiple data transfer lanes in a port of a multi-lane Ethernet switch for transferring blocks of data between devices in the port. The physical coding sub-layer module further includes a synchronization marker generator for generating synchronization markers to be periodically transmitted over the multiple data transfer lanes. The physical coding sub-layer module further includes a data marker module configured to generate at least two data marker blocks from a respective portion of a synchronization marker and a respective portion of a block of data, and to provide the at least two data marker blocks to respective first and second ones of the multiple of data transfer lanes.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: February 26, 2013
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventor: Aron Wohlgemuth
  • Patent number: 8374229
    Abstract: A method for the generation of a signal including a minimum of disturbances and noise is provided. A method for the detection of a signal including a minimum of disturbances and noise is also provided. An element of the signal is functionally dependent on at least one further element of the signal.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: February 12, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jaroslaw Kussyk
  • Patent number: 8369386
    Abstract: A receiver includes a receiving unit that receives a signal from a satellite, a frequency conversion-discretization unit that converts the signal received in the receiving unit into an intermediate frequency signal of a frequency bandwidth including 0 Hz, and discretizes the frequency-converted intermediate frequency signal with a predetermined sampling frequency, a filter unit that filters the discretized signal, which is output from the frequency conversion-discretization unit, through a predetermined filter, a synchronization acquisition unit that acquires synchronization of a spreading code in the discretized signal filtered by the filter unit, and a synchronization holding unit that holds the synchronization of the spreading code, which is acquired by the synchronization acquisition unit.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: February 5, 2013
    Assignee: Sony Corporation
    Inventors: Hideki Takahashi, Katsuyuki Tanaka
  • Patent number: 8363681
    Abstract: According to various embodiments of the disclosure, systems, methods and apparatuses are provided for using ranging to improve network efficiency. In particular, various embodiments of the disclosure provide ranging to improve local clock time synchronization. According to one embodiment, a method for synchronizing a plurality of nodes on a communication network is provided, comprising: exchanging local clock times between a first node and a second node over the communication network; performing a ranging method between the first and second nodes based on the local clock times exchanged between the first and second nodes, wherein the ranging method results in an estimated propagation delay between the first and second nodes; and adjusting the local clock times of the first and second nodes based on the estimated propagation delay, thereby resulting in a synchronized local clock time at the first and second nodes.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: January 29, 2013
    Assignee: Entropic Communications, Inc.
    Inventor: Arndt Mueller
  • Patent number: 8358726
    Abstract: A source synchronous signal synchronization system includes a differential signal receiver; a tunable input delay element coupled to the receiver; an input serializer/deserializer (ISerDes) coupled to the tunable input delay; an alignment unit coupled to the ISerDes; and a delay control unit coupled to the tunable input delay, the ISerDes, and the alignment unit.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: January 22, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Junquiang Hu, Tyrone Kwok, Ting Wang
  • Patent number: 8345714
    Abstract: A cell search method and apparatus for an asynchronous mobile communication system are provided. A Secondary Synchronization Code (SSC) correlator despreads a signal at every slot boundary in accordance with a z-sequence to output a SSC correlation value. The signal is received over a first symbol duration. A Primary Synchronization Code (PSC) correlator despreads the received signal in accordance with a PSC to output a PSC correlation value. A dot product calculator performs dot product calculation between the SSC correlation value and the PSC correlation value to output a correlation result of the SSC. A frame synchronization detector extracts frame synchronization information from the correlation result.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Dong Ryeol Ryu, Kwang Man Ok
  • Patent number: 8320360
    Abstract: A method and apparatus for transmitting a primary and secondary synchronization channel is provided herein. During operation a transmitter will transmit a primary synchronization channel (P-SCH) in a subframe and a secondary synchronization channel (S-SCH) in the subframe. The S-SCH is modulated by a complex exponential wave and scrambled with a scrambling code. In certain embodiments of the present invention the P-SCH comprises a GCL sequence or a Zadoff-Chu sequence and the scrambling code is based on the GCL sequence index of the P-SCH.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: November 27, 2012
    Assignee: Motorola Mobility LLC
    Inventors: Masaya Fukuta, Hidenori Akita
  • Patent number: 8320508
    Abstract: A system including an estimation module, a processing module, and a control module. The estimation module is configured to generate a first set of channel estimates for a plurality of subcarriers of a received signal. The processing module is configured to generate a second set of channel estimates for the plurality of subcarriers, in which the second set of channel estimates are generated based on the first set of channel estimates. The control module is configured to estimate a preamble sequence in the received signal based on each of (i) the first set of channel estimates and (ii) the second set of channel estimates.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: November 27, 2012
    Assignee: Marvell International Ltd.
    Inventors: Jungwon Lee, Hui-Ling Lou
  • Patent number: 8311031
    Abstract: A method of and an apparatus therefor searching a cell in a mobile station of a communication system in which a plurality of cells are grouped into a plurality of cell groups, and each cell group includes at least two cells. The method includes detecting a primary synchronization signal and a secondary synchronization signal from a received signal, and identifying a cell based on a combination of the primary synchronization signal and the secondary synchronization signal. The secondary synchronization signal is related to the cell group to which the mobile station belongs and the primary synchronization signal is related to the cell to which the mobile station belongs within the cell group.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: November 13, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Il-Gyu Kim, Hyeong-Geun Park, Young-Jo Ko, Kapseok Chang, Hyoseok Yi, Young-Hoon Kim, Seung-Chan Bang
  • Patent number: 8290094
    Abstract: Some embodiments disclosed herein relate to a method. In the method, a duration of a first synchronization pulse is measured. A fixed, predetermined number of ticks are equally spaced at a first time interval over the first sync pulse, regardless of the duration of the first synchronization pulse. A duration of a first data pulse is then measured by periodically incrementing a tick count value at the first time interval during the entire duration of the first data pulse. The tick count value at an end of the first data pulse is then correlated to a first digital value encoded on the first data pulse.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: October 16, 2012
    Assignee: Infineon Technologies AG
    Inventors: Andreas Kolof, Dietmar König
  • Patent number: 8284888
    Abstract: A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A first loop supplies a first clock signal to a second loop. The second loop modifies the first clock signal to produce the recovered clock signal and uses the recover clock signal to produce the recovered data signal. The first loop changes the frequency of the first clock signal based on frequency comparison and data transition density metrics.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: October 9, 2012
    Inventor: Ian Kyles
  • Patent number: 8284872
    Abstract: A burst mode receiver including a CDR circuit that does not perform bit synchronization determination at a wrong position even when a burst signal waveform containing a distortion is input is provided. The burst mode receiver includes a CDR circuit for reproducing clock and data from a received signal, a bit synchronization determination circuit for determining whether the CDR circuit is in an optimum phase, a waveform distortion determination circuit for determining from the received signal whether there is waveform distortion, and a CDR output enable determination circuit for determining whether an output of the CDR circuit is valid or invalid. The CDR output enable determination circuit performs CDR output enable determination based on a bit synchronization determination result and a waveform distortion determination result.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: October 9, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Jun Sugawa, Hiroki Ikeda, Masayoshi Yagyu
  • Patent number: 8279986
    Abstract: Provided are: plural circuit components including a circuit component which constitutes a receiving unit receiving a signal sequence which is arranged so that a desired signal and a signal different from the desired signal are lined up in time series, the desired signal indicating desired data which includes at least one of text data, sound data, image data, and a computer program product; and an operating parameter changing unit which changes an operating parameter of at least one of the plural circuit components, during a period in which the receiving unit receives the signal different from the desired signal.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: October 2, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Nobuyoshi Kaiki
  • Patent number: 8275025
    Abstract: Methods and apparatus are provided for pseudo asynchronous testing of receive paths in serializer/deserializer (SerDes) devices. A SerDes device is tested by applying a source of serial data to a receive path of the SerDes device during a test mode. The receive path substantially aligns to incoming data using a bit clock. A phase is adjusted during the test mode of the bit clock relative to the source of serial data to evaluate the SerDes device. The source of serial data may be, for example, a reference clock used by a phase locked loop to generate the bit clock. The phase of the bit clock can be directly controlled during the test mode, for example, by a test phase control signal, such as a plurality of interpolation codes that are applied to an interpolator that alters a phase of the bit clock.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: September 25, 2012
    Assignee: LSI Corporation
    Inventors: Christopher J. Abel, Parag Parikh, Vladimir Sindalovsky
  • Patent number: 8270545
    Abstract: Certain embodiments of the present disclosure relate to a method for tracking of a carrier frequency offset. A soft combined frequency tracking discriminator is proposed as a part of the closed loop structure that can provide fast tracking of the frequency offset in an initial pull-in mode, and can also track small residual frequency variance in a fine-tracking mode.
    Type: Grant
    Filed: March 1, 2009
    Date of Patent: September 18, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Junqiang Li, Madihally J. Narasimha, Je Woo Kim
  • Publication number: 20120207183
    Abstract: A method of synchronizing a local estimation of global network time of a receiving node on a network to a global network time reference is provided. The free running nodes receive precise time protocol synchronization messages and determine a ratio and an offset based on time data extracted from the messages.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 16, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Pavlo Bobrek, Jeffrey VanDorp, Harry Molling
  • Patent number: 8238490
    Abstract: A method for determining a Doppler shift of a first signal is provided. First, a plurality of Doppler frequency hypotheses is combined to obtain a joint Doppler signal. The first signal is the correlated according to the joint Doppler signal and a plurality of code signals with phases corresponding to a series of code phase hypotheses to obtain a series of correlation results which are then examined to determine whether the Doppler shift does lie in the Doppler hypotheses. A fine Doppler search is then performed to determine the Doppler shift when the Doppler shift lies in the Doppler hypotheses.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: August 7, 2012
    Assignee: Mediatek Inc.
    Inventors: Hsin-Chung Yeh, Kuan-I Li
  • Patent number: 8228923
    Abstract: A network device having a system performance measurement unit employing one or more global time stamps for measuring the device performance is disclosed. The device includes an ingress circuit, a global time counter, an egress circuit, and a processor. The ingress circuit is configured to receive a packet from an input port while the global time counter generates an arrival time stamp in accordance with the arrival time of the packet. The egress circuit is capable of forwarding the packet to other network devices via an output port. The processor, in one embodiment, is configured to calculate packet latency in response to the arrival time stamp.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: July 24, 2012
    Assignee: Tellabs Operations, Inc.
    Inventors: Naveen K. Jain, Venkata Rangavajjhala
  • Patent number: 8229052
    Abstract: An apparatus and method for transmitting/receiving an S-SCH in an Institute of Electrical and Electronics Engineers (IEEE) 802.16m wireless communication system are provided. A method for transmitting, by a transmitter, a Secondary Synchronization CHannel (S-SCH) in a communication system includes generating a sequence depending on a cell IDentification (ID), determining a subcarrier set comprising subcarriers to map the generated sequence, based on a Fast Fourier Transform (FFT) size and a segment ID, and mapping the generated sequence to the subcarriers of the determined subcarrier set.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: July 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Eun Park, Jae-Weon Cho, Seung-Hoon Choi, Chi-Woo Lim, Song-Nam Hong