Synchronizing Patents (Class 370/503)
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Patent number: 11832070Abstract: A microphone device includes a number N of at least two serially coupled microphones forming a microphone chain. The microphones are configured to transmit data to a controller via the microphone chain. The microphone chain is configured to output time-multiplexed data transmitted by the microphones.Type: GrantFiled: December 16, 2021Date of Patent: November 28, 2023Assignee: Infineon Technologies AGInventors: Victor Popescu-Stroe, Matthias Boehm
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Patent number: 11831402Abstract: A slave node (300) is slave equipment that operates in accordance with a control frame transmitted from a master node (200). The slave node calculates a control frame statistic that is a statistic of one or more control frames transmitted from the master equipment and estimates a master environment value based on the calculated control frame statistic. The slave node measures a slave environment value. The slave node estimates a frequency deviation of a master clock based on the estimated master environment value and estimates a frequency deviation of a slave clock based on the measured slave environment value. The slave node modifies a clock value of the slave clock based on a difference between the frequency deviation of the master clock and the frequency deviation of the slave clock.Type: GrantFiled: July 22, 2021Date of Patent: November 28, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Akio Idehara, Hirotaka Motai, Yurika Terada, Bampei Kaji, Toshiyuki Otani
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Patent number: 11824696Abstract: Messages are transmitted in closely-spaced subcarriers in 5G and 6G, configured so that each subcarrier signal is orthogonal to the adjacent subcarrier signals. However, many effects can penetrate that orthogonality—distortion, interference, frequency variations, amplitude variations, crosstalk, etc.—collectively termed energy spill-over. To combat this problem, a receiver can determine the total energy spill-over into adjacent subcarriers by measuring a residual signal in a subcarrier with no transmission, adjacent to another subcarrier with a known transmission. The receiver can measure the amplitude, phase, temporal or spectral properties, and so forth of the residual signal. The receiver can then correct the message during signal processing, by calculating a function of the residual signal and subtracting it from each digitized subcarrier signal of a message.Type: GrantFiled: November 21, 2022Date of Patent: November 21, 2023Inventors: David E. Newman, R. Kemp Massengill
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Patent number: 11816051Abstract: In some implementations, a device may receive, via a universal serial bus (USB) interface, configuration information and a supply of power from a network device. The device may receive, via an antenna that is external to the device, a first signal indicating timing information. The device may generate, based on the first signal, a second signal and a third signal, wherein the second signal comprises a one pulse per second signal and the third signal comprises a ten-megahertz signal. The device may provide, to the network device, the second signal and the third signal. The device may receive, via an input port, a clock signal to provide an extended holdover functionality to the network device.Type: GrantFiled: May 10, 2022Date of Patent: November 14, 2023Assignee: Juniper Networks, Inc.Inventors: John B. Kenney, Kamatchi S. Gopalakrishnan, Jack W. Kohn, Sushma B. Bavache, Amit Verma, Rafik P.
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Patent number: 11811505Abstract: The Digital Time Processing using Rational Number Filters (DTP RNF) disclosed herein is contributing methods, systems and circuits for using a Precision Time Protocol (PTP) such as IEEE 1588 for distributing a master time secured by a master unit to slave units by utilizing slave clocks, synchronous to referencing frames communicated with PTP messages or compatible with them data receiver clocks, for maintaining a local slave time which is increased to a local master time by adding to it an estimate of a transmission delay derived by processing PTP messages or by other means, wherein such distribution of the master time includes filtering out phase noise of the timing referencing signals with the Rational Number Filters in order to produce accurate and stable timing implementing signals such as the slave clock, local slave time and local master time.Type: GrantFiled: November 25, 2022Date of Patent: November 7, 2023Inventor: John W. Bogdan
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Patent number: 11811665Abstract: A network device comprising a set of queues and a time-aware shaper which comprises a set of transmission gates and gate control instructions. The gate control list comprises a set of individual gate control lists, each individual gate control list configured to control a respective gate and which comprises a sequence of entries, each entry comprising a duration of time.Type: GrantFiled: January 24, 2018Date of Patent: November 7, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Christian Mardmoeller, Thorsten Hoffleit
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Patent number: 11804920Abstract: A signal transfer management apparatus manages operations of a plurality of signal transfer devices. The signal transfer management apparatus includes a gate calculation unit configured to calculate a gate start time of each of uplink time gates and a gate start time of each of downlink time gates of a plurality of signal transfer devices and open each of the time gates, a comparison unit configured to compare uplink time synchronization messages from the plurality of slave devices to a master device and detect a conflict between the uplink time synchronization messages, and an offset unit configured to, when the comparison unit detects a conflict, adjusts the gate start time of each of the uplink time gates and the gate start time of each of the downlink time gates of the signal transfer devices and set the adjusted gate start times in the signal transfer devices.Type: GrantFiled: February 18, 2020Date of Patent: October 31, 2023Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Keita Takahashi, Naotaka Shibata, Jun Terada
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Patent number: 11805026Abstract: Systems, apparatuses, and methods for utilizing training sequences on a replica lane are described. A transmitter is coupled to a receiver via a communication channel with a plurality of lanes. One of the lanes is a replica lane used for tracking the drift in the optimal sampling point due to temperature variations, power supply variations, or other factors. While data is sent on the data lanes, test patterns are sent on the replica lane to determine if the optimal sampling point for the replica lane has drifted since a previous test. If the optimal sampling point has drifted for the replica lane, adjustments are made to the sampling point of the replica lane and to the sampling points of the data lanes.Type: GrantFiled: August 14, 2020Date of Patent: October 31, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Stanley Ames Lackey, Jr., Damon Tohidi, Gerald R. Talbot, Edoardo Prete
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Patent number: 11800469Abstract: This application provides a communication method and a communications device. One example method includes: receiving, by a first communications device, first information from a third communications device; and sending, by the third communications device, the first information to the first communications device.Type: GrantFiled: January 13, 2023Date of Patent: October 24, 2023Assignee: Huawei Technologies Co., Ltd.Inventors: Feng Yu, Bo Lin, Guangwei Yu, Jiangwei Ying
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Patent number: 11799599Abstract: A receiver includes an interface and a processor. The interface is configured to receive a signal including symbols carrying bit values in respective symbol intervals, and to convert the received signal into a serial sequence of digital samples, the received signal being modulated using a Differential Manchester Encoding (DME) scheme that (i) represents a first bit value by a first symbol type having a level transition in the corresponding symbol interval and (ii) represents a second bit value by a second symbol type having a constant level in the corresponding symbol interval. The processor is configured to derive an error signal from the digital samples, and to produce a quality measure of the received signal based on the derived error signal.Type: GrantFiled: February 20, 2022Date of Patent: October 24, 2023Assignee: MARVELL ASIA PTE LTDInventors: Shaoan Dai, Xing Wu, Wensheng Sun, Liang Zhu
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Patent number: 11799578Abstract: This is provided a time synchronization method, including: an adjustment stage including N adjustment cycles, N being an integer greater than 1; in each adjustment cycle, generating a physical clock signal at least according to a pre-acquired frequency control word corresponding to the adjustment cycle, and obtaining logical time at least according to the physical clock signal and a physical time deviation; a clock slope of the physical clock signal generated in each adjustment cycle reaches its corresponding target value, and the target values of the clock slopes of the physical clock signals in the N adjustment cycles gradually approach 1; the physical time deviation is: a time difference between the reference time and the physical time corresponding to the physical clock signal in an Nth adjustment cycle at the end of the Nth adjustment cycle. A time synchronization device and a network node device are provided.Type: GrantFiled: January 19, 2020Date of Patent: October 24, 2023Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xiangye Wei, Liming Xiu, Yiming Bai
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Patent number: 11790368Abstract: An example operation may include one or more of computing historical patterns related to fraudulent attempts from a transaction log, predicting future fraud attempts from public data, correlating the historical patterns and the predicted future fraud attempts, modifying one or more endorsement policies based on the correlations, and adding the modified one or more endorsement policies to a smart contract.Type: GrantFiled: March 5, 2019Date of Patent: October 17, 2023Assignee: International Business Machines CorporationInventors: Shikhar Kwatra, Jeronimo Irazabal, Edgar A. Zamora Duran, Roxana Monge Nunez, Sarbajit K. Rakshit
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Patent number: 11784619Abstract: A circuit includes a first system-on-chip (SoC) driven by a first clock generator and a second SoC driven by a second clock generator where the first clock generator and the second clock generator have independent time bases. The first and second clock generators are synchronized using an RLC circuit external to the first clock generator and the second clock generator that converts an output of the first clock generator into current pulses and injects the current pulses into the second clock generator to pull an output of the second clock generator into synchronization with the output of the first clock generator. The RLC circuit converts a voltage output of the first clock generator into current pulses at the resonant frequency or specific harmonics of the output of the first clock generator. The second clock generator may include a ring oscillator into which the current pulses are injected.Type: GrantFiled: October 5, 2021Date of Patent: October 10, 2023Assignee: Snap Inc.Inventors: Jason Heger, Gerald Nilles
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Patent number: 11784849Abstract: A communication control device for a user station for a serial bus system. The communication control device controls a communication of the user station with at least one other user station of the bus system, and generates a transmission signal for transmission onto a bus of the bus system and/or to receive a signal from the bus. The communication control device generates the transmission signal according to a frame in which bits having a predetermined temporal length are provided. The communication control device is designed to shorten, in comparison to some other bit of the bit sequence, at least one bit in the frame that is situated in a bit sequence of at least two bits having the same logical value, and the communication control device is designed to not shorten bits that are not situated in a bit sequence of at least two bits having the same logical value.Type: GrantFiled: December 3, 2021Date of Patent: October 10, 2023Assignee: ROBERT BOSCH GMBHInventors: Arthur Mutter, Simon Weissenmayer
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Patent number: 11782792Abstract: A device is provided to include: a transceiver configured to transmit and receive data; and a skip ordered set (SKP OS) control logic in communication with the transceiver and configured to generate an SKP OS and control the transceiver to transmit the SKP OS and a data block to a link connecting to an external device and including a plurality of lanes. The SKP OS control logic is configured to increase or decrease transmission interval of the SKP OS based on a transmission history of the SKP OS, in response to an entry of the link to a recovery state that is used to recover the link from an error.Type: GrantFiled: June 17, 2021Date of Patent: October 10, 2023Assignee: SK HYNIX INC.Inventors: Yong Tae Jeon, Dae Sik Park, Jae Young Jang
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Patent number: 11777765Abstract: A receiver decoding apparatus includes a first receiver decoder, a demultiplexer, a first receiver encoder and a second receiver decoder. The first receiver decoder decodes a plurality of N-bit code words received from a transmitter encoding apparatus to generate a plurality of I-bit code words, wherein N and I are both positive integers and N is not equal to I. The demultiplexer alternately deinterleaves and assigns the plurality of I-bit code words to a plurality of output terminals of the demultiplexer. The first receiver encoder encodes a plurality of outputs of the output terminals of the demultiplexer to a fifth digital signal comprising a plurality of J-bit code words and a sixth digital signal comprising a plurality of J-bit code words, wherein J is a positive integer and not equal to I. The second receiver decoder decodes the fifth digital signal and the sixth digital signal.Type: GrantFiled: January 16, 2023Date of Patent: October 3, 2023Assignee: Realtek Semiconductor CorporationInventors: Hsu-Jung Tung, Lien-Hsiang Sung
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Patent number: 11765410Abstract: Systems and methods for synchronizing the playback of OTT or other time sensitive content on multiple playback devices is disclosed. The systems and methods include receiving time information based on a network time source in the playback devices. The playback clock in each playback device is set based upon the time information. Stream initiation information derived using the time information from the network time source is received by each of the playback device from the media provider. The playback devices use the stream initiation information to adjust the presentation time stamps of the frames of the media content in the stream.Type: GrantFiled: March 4, 2022Date of Patent: September 19, 2023Assignee: DIVX, LLCInventors: William David Amidei, Jason Braness
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Patent number: 11765735Abstract: Provided is a method for designing downlink control channel for satisfying requirement of the different usage scenarios from each other in a next-generation/5G radio access network which has been discussed in the 3rd generation partnership project (3GPP). In particular, a method of a base station may be provided for transmitting/receiving data in a next-generation radio access network. The method may include configuring a time domain scheduling unit made up of at least one OFDM symbol for each user equipment, allocating a downlink data channel transmission resource with the time domain scheduling unit for a first user equipment, and puncturing a part of the downlink data channel transmission resource for the first user equipment and allocating the punctured resource to the downlink data channel transmission resource for a second user equipment.Type: GrantFiled: May 4, 2021Date of Patent: September 19, 2023Assignee: KT CorporationInventors: Kyujin Park, Woo-jin Choi
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Patent number: 11750698Abstract: A network device synchronization method is provided. In various embodiments, a first SSM and a second SSM are received. The first SSM carries a first SSM code indicating a quality level of a first clock source and a first eSSM code indicating the quality level of the first clock source, the second SSM carries a second SSM code indicating a quality level of a second clock source. The second SSM lacks an eSSM code indicating the quality level of the second clock source, and a value of the first SSM code is equal to a value of the second SSM code. When a value of the first eSSM code is less than 0xFF, calibrating a frequency of the network device based on a timing signal of the first clock source.Type: GrantFiled: February 15, 2022Date of Patent: September 5, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jingfei Lv, Yawei Zhang
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Patent number: 11743848Abstract: Aspects provide for wireless communication between a UE and a radio access network (RAN) node in a wireless communication network. The RAN node may generate a re-synchronization signal (RSS) for a bandwidth part (BWP) of a plurality of BWPs and transmit the RSS in the BWP of a downlink to the UE. A first bandwidth of the RSS may be based on a second bandwidth of the BWP. The UE may receive the RSS in different RRC states and perform a measurement of the RSS for synchronization, for an early detection of a paging or wake-up signal, and/or for radio resource management (RRM) measurements or radio link monitoring (RLM) measurements. The UE may utilize a communication link with the RAN node based on the measurement and the RAN node may utilize the communication link to communicate with a group of UEs sharing at least one same RSS beam.Type: GrantFiled: July 13, 2021Date of Patent: August 29, 2023Assignee: QUALCOMM IncorporatedInventors: Jing Lei, Wanshi Chen, Krishna Kiran Mukkavilli
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Patent number: 11740652Abstract: A method for synchronizing clocks of at least two devices in a distributed network of a vehicle, comprising: establishing unencrypted communication between the at least two devices to determine a temporal difference between the clocks of the two devices, exchanging messages between the at least two devices via the unencrypted communication, ascertaining a temporal difference between the clocks of the at least two devices using the messages, establishing encrypted communication between the at least two devices to authenticate the exchange of messages, authenticating the messages that were used to ascertain the temporal difference, using the ascertained temporal difference, when the authentication of exchanged messages has been completed successfully.Type: GrantFiled: December 7, 2021Date of Patent: August 29, 2023Assignee: VOLKSWAGEN AKTIENGESELLSCHAFTInventors: Arul Matheswaran, Jürgen Elberich, Rijo Varghese
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Method and apparatus for transmitting and receiving a synchronization signal and transmission system
Patent number: 11729036Abstract: Disclosed is a method and apparatus for transmitting and receiving a synchronization signal and a transmission system. In the method, a transmitting node determines a frequency band range in which a carrier is located, and configures or assumes synchronization channel information on the carrier according to the frequency band range, where the synchronization channel information includes at least one of: a subcarrier spacing or orthogonal frequency division multiplexing (OFDM) symbol information of a synchronization channel; and the transmitting node transmits the synchronization signal using the synchronization channel information.Type: GrantFiled: February 16, 2022Date of Patent: August 15, 2023Assignee: ZTE CorporationInventors: Wei Gou, Feng Bi, Peng Hao, Junfeng Zhang -
Patent number: 11711159Abstract: In a transceiver, the accuracy of a packet time stamp can be improved by compensating for errors introduced by processing of the packet. A received packet can be received via multiple lanes. A packet time stamp can be measured using a start of frame delimiter (SFD). A last arriving lane can be used to provide a recovered clock signal. A phase offset between the recovered clock signal and the system clock of the transceiver can be used to adjust the time stamp. A position of the SFD within a data block can be used to adjust the time stamp. A position of the data block within a combined group of data blocks can be used to adjust the time stamp. Also, a serializer-deserializer delay associated with the last arriving lane can be used to adjust the time stamp.Type: GrantFiled: December 24, 2020Date of Patent: July 25, 2023Assignee: Intel CorporationInventors: Mark Bordogna, Janardhan Satyanarayana, Yoni Landau, Diwakar Suvvari
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Patent number: 11704021Abstract: According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.Type: GrantFiled: November 29, 2021Date of Patent: July 18, 2023Assignee: Kioxia CorporationInventors: Naoki Esaka, Shinichi Kanno
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Patent number: 11689347Abstract: A communication system (500) includes a plurality of communication apparatuses (100) and selects from the plurality of communication apparatuses (100), a grandmaster that is to be a standard of time. A difference calculation unit (110), when receiving a synchronization message that includes time of the grandmaster from the grandmaster, calculates a time difference between the time of the grandmaster and time of the communication apparatus (100). A correction unit (120) changes count speed of a time counter that counts the time of the communication apparatus (100) in a way that the time of the communication apparatus (100) synchronizes with the time of the grandmaster at a time when a time correction period that is specified beforehand elapses, based on the time difference.Type: GrantFiled: January 27, 2021Date of Patent: June 27, 2023Assignee: Mitsubishi Electric CorporationInventor: Taichi Sakaue
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Patent number: 11683148Abstract: Disclosed are a method and a receiving device for clock frequency synchronization. The method includes the following. A user datagram protocol (UDP) packet is obtained by a receiving device. A value of the data volume of the UDP packet in the cache and a first value are performed, by the receiving device, an operation to obtain the absolute value of the difference between the value of the data volume and the first value. When the absolute value is greater than the preset threshold, a clock frequency of the crystal oscillator in the receiving device is adjusted to obtain a target clock frequency, where after the clock frequency of the crystal oscillator is adjusted, the absolute value of the difference is less than or equal to the preset threshold. The receiving device maintains clock frequency synchronization between the receiving device and the transmitting device based on the target clock frequency.Type: GrantFiled: June 29, 2021Date of Patent: June 20, 2023Assignee: SHENZHEN LENKENG TECHNOLOGY CO., LTDInventor: Binghai Gao
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Patent number: 11678288Abstract: A method and apparatus may include receiving, by a radio access network (RAN), at least one burst arrival time (BAT) parameter from at least one session management function (SMF). The method may further include determining, by the RAN, if at least one actual BAT is offset from the at least one received BAT parameter by at least one threshold. The method may further include setting, by the RAN, at least one BAT correction parameter based upon at least one offset time. The method may further include calculating, by the RAN, at least one new BAT parameter according to the one BAT correction parameter. The method may further include adjusting, by the RAN, at least one burst schedule based upon one or more of the at least one BAT correction parameter or the at least one new BAT parameter.Type: GrantFiled: July 28, 2021Date of Patent: June 13, 2023Assignee: Nokia Technologies OyInventors: Colin Kahn, Devaki Chandramouli
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Patent number: 11678284Abstract: An operation method of a first terminal, for synchronized operations according to time-sensitive networking, may comprise: receiving information on a reference time from a base station; obtaining an offset of the first terminal with respect to the reference time or information for deriving the offset, and deriving the offset from the information for deriving the offset; determining a timing at which uplink transmission is performed by reflecting the offset to the reference time; and performing the uplink transmission at the determined timing.Type: GrantFiled: April 16, 2021Date of Patent: June 13, 2023Assignee: Electronics and Telecommunications Research InstituteInventors: Cheul Soon Kim, Jae Heung Kim, Sung Hyun Moon, Jung Hoon Lee, Sung Cheol Chang
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Patent number: 11671825Abstract: The present invention relates to a method for authenticating a device with a wireless access point. The method includes receiving an audio signal at the device via a microphone; processing the audio signal to extract a code; using the code to authenticate the device, at least in part, with the wireless access point; and in response to the authentication, providing access to one or more network Services to the device via the wireless access point. A system and software are also disclosed.Type: GrantFiled: March 23, 2018Date of Patent: June 6, 2023Assignee: Sonos Experience LimitedInventors: Daniel John Jones, James Andrew Nesfield
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Patent number: 11663122Abstract: According to one embodiment, a controller of a memory system writes write data associated with a set of received write requests to a first write destination storage region in a first write mode of writing a plurality of bits per memory cell, without writing the write data to a second storage region. When receiving from a host a first request to cause a state of the first write destination storage region to transition to a second state in which writing is suspended, the controller transfers un-transferred remaining write data from a write buffer of the host to an internal buffer, and writes the remaining write data to the second storage region in a second write mode of writing 1 bit per memory cell.Type: GrantFiled: March 21, 2022Date of Patent: May 30, 2023Assignee: Kioxia CorporationInventors: Shinichi Kanno, Naoki Esaka
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Patent number: 11664969Abstract: A communication apparatus includes a first counter configured to synchronize with a reference time, a second counter configured to synchronize with the first counter, a generation unit configured to generate a synchronization signal each time when a value of the second counter is incremented by a predetermined number, a correction unit configured to correct the value of the second counter toward a value of the first counter, and a control unit configured to control the correction unit to cause the correction unit to calculate a difference between the value of the first counter and the value of the second counter and, in a case where the calculated difference is greater than a predetermined threshold value, the correction unit to correct the value of the second counter step by step.Type: GrantFiled: December 10, 2021Date of Patent: May 30, 2023Assignee: Canon Kabushiki KaishaInventor: Mitsumasa Abe
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Patent number: 11663191Abstract: Techniques perform log management. Such techniques involve obtaining a count value of a counter associated with a log entry in the log, the count value of the counter incrementing at a predetermined frequency. Such techniques further involve determining a rough time instant when the log entry is created based on the count value, a reference count value of the counter associated with the log entry, a reference time corresponding to the reference count value and the frequency. Such techniques further involve correcting the rough time instant based at least in part on the frequency and a set of count values of the counter corresponding to a set of time instants, to determine a corrected time when the log entry is created. Accordingly, the log backed up to the external storage device has accurate time information.Type: GrantFiled: March 25, 2019Date of Patent: May 30, 2023Assignee: EMC IP Holding Company LLCInventors: Naifeng Li, Jiajie Sun, Jun Wu, Zihao Jiang, Minggang Lu
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Patent number: 11653317Abstract: Methods, systems, and devices for wireless communications are described. In an example, a method includes a first node receiving a precision time protocol (PTP) message, identifying one or more timing domains to be supported by the first node based at least in part on the PTP message, and sending, to a second node of the wireless communication network, an indicator of the one or more timing domains to be supported by the first node. Another example at a node includes receiving, from additional nodes of the wireless communication network, indicators of one or more timing domains supported by the additional nodes, receiving a PTP message associated with a timing domain, and sending the PTP message to a subset of the additional nodes based at least in a part on the indicators of one or more timing domains supported by the additional nodes.Type: GrantFiled: January 27, 2021Date of Patent: May 16, 2023Assignee: QUALCOMM IncorporatedInventors: Vinay Joseph, Rajat Prakash, Peerapol Tinnakornsrisuphap, Fatih Ulupinar
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Patent number: 11646907Abstract: Systems, devices, and methods for managing a premises management system are described. A method may comprise initiating a first communication session with a premises device and using the first communication session to transmit a command to the premise device by a gateway device. The command may be associated with event data associated with a premises. The method may further comprise initiating a second communication session with the gateway device and using the second communication session to transmit the event data to the gateway device by the premises device.Type: GrantFiled: August 4, 2017Date of Patent: May 9, 2023Assignee: iControl Networks, Inc.Inventor: Paul Dawes
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Patent number: 11641651Abstract: Various methods of allocating uplink control channels in a communication system are implemented at a resource scheduler or a user equipment (UE). In one method the scheduler reserves resources for a downlink data channel and signals a corresponding downlink data channel grant and also reserves resources for a persistent uplink control channel for a longer duration than the data channel grant. Signaling overhead associated with a grant for this persistent uplink control channel is reduced over a full dynamic grant. A predetermined rule can be used at the scheduler and at the UE to avoid overhead signaling associated with a grant for this persistent control channel. Predetermined rules at the UE and scheduler can also be used to reserve appropriate resources and select appropriate MCS levels for control information and the control information and uplink data can be transported over a common uplink channel when a time overlap occurs between an uplink data channel and the persistent control channel.Type: GrantFiled: March 1, 2021Date of Patent: May 2, 2023Assignee: Apple Inc.Inventors: James McCoy, Leo Dehner, Jayesh Kotecha, Jayakrishnan Mundarath
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Patent number: 11641326Abstract: Examples are described herein that relate to a mesh in a switch fabric. The mesh can include one or more buses that permit operations (e.g., read, write, or responses) to continue in the same direction, drop off to a memory, drop off a bus to permit another operation to use the bus, or receive operations that are changing direction. A latency estimate can be determined at least for operations that drop off from a bus to permit another operation to use the bus or receive and channel operations that are changing direction. An operation with a highest latency estimate (e.g., time of traversing a mesh) can be permitted to use the bus, even causing another operation, that is not to change direction, to drop off the bus and re-enter later.Type: GrantFiled: August 23, 2019Date of Patent: May 2, 2023Assignee: Intel CorporationInventors: Karl S. Papadantonakis, Robert Southworth, Arvind Srinivasan, Helia A. Naeimi, James E. McCormick, Jr., Jonathan Dama, Ramakrishna Huggahalli, Roberto Penaranda Cebrian
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Patent number: 11637645Abstract: A method for measuring asynchronous timestamp requests includes receiving a timestamp (“TS”) request from a client device during a first interval of a time of day (“TOD”) clock, and calculating, using the TOD clock, at a next interval of the TOD clock, a TS correction of the TS request relative to a reference point of the first TOD clock interval. The method further includes adding the TS correction to the reference point of the first interval of the TOD clock, and outputting the corrected TS to the client device.Type: GrantFiled: September 18, 2020Date of Patent: April 25, 2023Assignee: XILINX, INC.Inventor: Paolo Novellini
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Patent number: 11638228Abstract: [Problem] An object is to obtain a time quality of another GM with high accuracy on the basis of a GM a time quality of which is known already. [Solution] A first TC 20 includes a time comparison unit 23 that calculates time difference information by comparing first time information of a first PTP processing unit 12 and second time information of a second PTP processing unit 22 with each other. In addition, a quality calculation device 5 measures time difference information until time difference information obtained by a time comparison unit 23 of the first TC 20 and time difference information obtained by a time comparison unit 43 of a second TC 40 match each other, and obtains a GM time quality of a second GM 30 on the basis of a transmission time error of the time transmission network 2 at a timing when both of pieces of the time difference information match each other.Type: GrantFiled: November 28, 2019Date of Patent: April 25, 2023Assignee: Nippon Telegraph and Telephone CorporationInventors: Kaoru Arai, Hiroki Sakuma, Masahiro Nakagawa, Shunichi Tsuboi
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Patent number: 11632425Abstract: Methods of synchronizing sequence numbers of a number of devices of a network are disclosed. A method may include incrementing, at each of a first device and a second device of a network, a sequence number, wherein the sequence number is indicative of a number of frames generated at the associated device since the timing event. The method may also include inserting, at each of the first device and the second device, the sequence number into an associated frame. Related networks and devices are also disclosed.Type: GrantFiled: August 20, 2021Date of Patent: April 18, 2023Assignee: Microchip Technology IncorporatedInventor: Lars Ellegaard
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Patent number: 11632776Abstract: Aspects described herein relate to receiving a timing adjustment (TA) command indicating to adjust timing for an uplink transmission in a time division, adjusting, by the UE and based on the TA command, the timing for the uplink transmission in the time division, and where the uplink transmission includes an overlapping portion that at least partially overlaps in time with a previous uplink transmission scheduled for transmission in a previous time division, due to the TA command, and a non-overlapping portion that does not at least partially overlap in time with the previous uplink transmission, refraining from transmitting the non-overlapping portion of the uplink transmission that is scheduled in the time division. Other aspects relate to transmitting the TA command and not receiving an overlapping uplink transmission.Type: GrantFiled: September 3, 2021Date of Patent: April 18, 2023Assignee: QUALCOMM IncorporatedInventor: Anthony Richard Morris
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Patent number: 11632748Abstract: Wireless communication where a wireless network transmits a control channel message to a terminal. A receiver to receive the control channel message located in one or more control channel elements within a plurality of search spaces, each of the plurality of search spaces being configured from a plurality of control channel elements within a time interval for scheduling decision by using a pseudorandom function. A decoder to decode the control channel message by making a selection of locations for blind decoding the plurality of search spaces within the sub-frame, using the pseudorandom function, wherein, the pseudo-random function is a function based on a sum of a first value and a second value, wherein the first value is a pseudo-random factor, and the second value is based on an aggregation level and a total of control channel elements in a sub-frame.Type: GrantFiled: July 31, 2020Date of Patent: April 18, 2023Assignee: FUJITSU LIMITEDInventor: Timothy Moulsley
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Patent number: 11619719Abstract: A sensor network, which includes a sensor controller serially coupled to a plurality of sensor modules, is configured to program the sensor modules so as to transfer measurement data to the sensor controller and to synchronize the sensor modules to picosecond accuracy via on-chip or on-module custom circuits and a physical layer protocol. The sensor network has applications for use in PET, LiDAR or FLIM applications. Synchronization, within picosecond accuracy, is achieved through use of a picosecond time digitization circuit. Specifically, the picosecond time digitization circuit is used to measure on-chip delays with high accuracy and precision. The delay measurements are directly comparable between separate chips even with voltage and temperature variations between chips.Type: GrantFiled: February 1, 2019Date of Patent: April 4, 2023Assignee: Anacapa Semiconductor, Inc.Inventor: Marc Loinaz
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Patent number: 11619914Abstract: Methods and apparatus for an arrayed time to digital converter (TDC) having matched delay line sampling. In embodiments, a TDC includes a coarse counter circuit to provide an event coarse timing measurement for an event, a coarse counter delivery network to deliver a count value in the coarse counter circuit to a memory storage element circuit, and an array of matched delay lines to provide an event fine timing measurement to the memory storage element circuit. An array of event sample signal generators can generate signals for the event and an array of encoders can encode fine timing measurement information from the memory storage element circuit, where an output of the encoder and the event coarse timing measurement information provide a timestamp for the event. A global delay-locked loop can incorporate a matched delay line coupled to the array of matched delay lines.Type: GrantFiled: June 2, 2022Date of Patent: April 4, 2023Assignee: ALLEGRO MICROSYSTEMS, LLCInventors: Charles Myers, Shunming Sun, Adam Lee
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Patent number: 11606155Abstract: A method for exchanging a clock synchronization packet performed by a network apparatus, including: exchanging a clock synchronization packet with a first clock source, where the network apparatus includes a boundary clock; determining a first time deviation of the boundary clock relative to the first clock source according to the clock synchronization packet exchanged with the first clock source, where the boundary clock avoids performing an operation of calibrating a time of a local clock of the boundary clock according to the first time deviation; and sending a clock synchronization packet to a first slave clock of the boundary clock, where the clock synchronization packet includes a first timestamp, a value of the first timestamp is equal to a first corrected value, and the first corrected value is a value obtained by the boundary clock by correcting the time of the local clock by using the first time deviation.Type: GrantFiled: July 13, 2021Date of Patent: March 14, 2023Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jinhui Wang, Chuan Xu
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Patent number: 11606410Abstract: According to one embodiment, there is provided a multiplexing method including: receiving a TS over IP packet from a plurality of encoders which are disposed at physically remote places, or which are disposed in a virtual environment on a cloud computing system where physical locations are unidentifiable; performing multiplexing after compensating for a delay and jitter of a transmission path, based on a timestamp which is stamped on an RTP header of the TS over IP packet; and performing, with respect to a PCR packet, either multiplexing after compensating for the delay and the jitter, based on a time re-generated in a multiplexing apparatus, or multiplexing by generating a PCR packet in the multiplexing apparatus.Type: GrantFiled: December 1, 2021Date of Patent: March 14, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Infrastructure Systems & Solutions CorporationInventor: Tomoo Yamakage
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Patent number: 11601900Abstract: A communication method and a communications apparatus are provided. The communication method includes: sending, by a terminal device, a first indication message, where the first indication message is used to indicate a first time type and/or a first time precision, or the first indication message is used to indicate an access network device to send time information to the terminal device; receiving, by the terminal device, the time information; and synchronizing, by the terminal device, a time of the terminal device based on the time information. Correspondingly, a communications apparatus is further provided. According to the embodiments of this application, the terminal device can obtain, based on requirements of different application scenarios, a time type and/or time precision preferred by the terminal device.Type: GrantFiled: October 2, 2020Date of Patent: March 7, 2023Assignee: Huawei Technologies Co., Ltd.Inventors: Guangnan Wan, Feng Yu, Bo Lin, Guangwei Yu
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Patent number: 11593162Abstract: A method of managing operation of a computing device is provided. The method includes (a) running a system scheduler that schedules execution of a first application and a second application on a central processing unit (CPU) core of the computing device; (b) while the first application is executing on the core, detecting, by the first application, a context-switch opportunity; and (c) issuing, by the first application in response to detecting the context-switch opportunity, a blocking operation that triggers the system scheduler to perform a rescheduling operation between the first and second applications on the CPU core. An apparatus, system, and computer program product for performing a similar method are also provided.Type: GrantFiled: October 20, 2020Date of Patent: February 28, 2023Assignee: EMC IP Holding Company LLCInventors: Lior Kamran, Amitai Alkalay, Liran Loya
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Patent number: 11593542Abstract: A soft error-mitigating semiconductor design system and associated methods that tailor circuit design steps to mitigate corruption of data in storage elements (e.g., flip flops) due to Single Events Effects (SEEs). Required storage elements are automatically mapped to triplicated redundant nodes controlled by a voting element that enforces majority-voting logic for fault-free output (i.e., Triple Modular Redundancy (TMR)). Storage elements are also optimally positioned for placement in keeping with SEE-tolerant spacing constraints. Additionally, clock delay insertion (employing either a single global clock or clock triplication) in the TMR specification may introduce useful skew that protects against glitch propagation through the designed device.Type: GrantFiled: February 26, 2021Date of Patent: February 28, 2023Assignee: Fermi Research Alliance, LLCInventors: Sandeep Miryala, James Richard Hoff, Grzegorz W. Deptuch
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Patent number: 11588668Abstract: In accordance with a first aspect of the present disclosure, a channel equalizer is provided for use in a near field communication (NFC) device, the channel equalizer comprising: a filter configured to receive an input signal and to generate a filtered output signal; an estimator configured to determine filter coefficients to be used by said filter; a synchronizer configured to determine when to enable the channel equalizer and to provide one or more corresponding control signals to the estimator. In accordance with a second aspect of the present disclosure, a corresponding method of operating a channel equalizer for use in a near field communication (NFC) device is conceived.Type: GrantFiled: April 16, 2021Date of Patent: February 21, 2023Assignee: NXP B.V.Inventors: Ulrich Andreas Muehlmann, Wolfgang Hrauda, Gregor Hauseder, Tim Daniel Raspel
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Rate matching for synchronization signal block (SSB) transmissions in non-terrestrial networks (NTN)
Patent number: 11582707Abstract: Certain aspects of the present disclosure provide techniques for rate matching of synchronization signal block (SSB) transmissions in non-terrestrial networks (NTNs). A method that may be performed by a user equipment (UE) includes receiving configuration information indicating a beam-specific rate matching pattern for at least one beam of a plurality of beams configured for the UE, wherein a SSB transmission corresponding to each of the plurality of beams is configured using the same set of frequencies, receiving a data channel using the at least one beam, and processing the data channel based on the rate matching pattern.Type: GrantFiled: February 5, 2021Date of Patent: February 14, 2023Assignee: QUALCOMM IncorporatedInventors: Liangping Ma, Xiao Feng Wang, Huilin Xu, Alberto Rico Alvarino