Synchronizing Patents (Class 370/503)
  • Patent number: 10313173
    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The present invention discloses a transmitting and receiving method capable of estimating an accurate time and a frequency synchronization using a sequence in a filter bank multiple transmission system.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: June 4, 2019
    Assignees: Samsung Electronics Co., Ltd., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Daesik Hong, Wonsuk Chung, Chanhong Kim
  • Patent number: 10305539
    Abstract: A method for controlling an electronic apparatus and a method therefor are disclosed. The electronic device may be configured as a master device configured to control a piconet in a wireless communication network including a plurality of piconets. The controlling method includes periodically receiving, from an external coordinator device, radio frequency channel state information, virtual address information, and clock information corresponding to the piconet allocated by the coordinator device, and performing wireless data communication based on the radio frequency channel state information, the virtual address information, and the clock information.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: May 28, 2019
    Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
    Inventors: Sangsoon Lim, Weiping Sun, Sunghyun Choi, Woo-jin Park, Dae-hyun Ban, Seong-won Han
  • Patent number: 10296288
    Abstract: An example method includes receiving data indicating a configuration of one or more playback devices. The one or more playback devices may include one or more transducers. The method further includes, based on the received data, associating each of one or more audio streams respectively with at least one transducer of the one or more transducers. The method further includes generating the one or more audio streams and sending at least one of the generated one or more audio streams to each of the one or more playback devices. An example non-transitory computer readable medium and an example computing device related to the example method are also disclosed herein.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: May 21, 2019
    Assignee: Sonos, Inc.
    Inventors: Ted Lin, Romi Kadri
  • Patent number: 10290333
    Abstract: A semiconductor device includes an internal operation control circuit suitable for generating a set period signal which is enabled for a set period, in response to a write command and an internal operation control signal, and generating a column select signal, an output control signal and an input control signal in response to the set period signal; and an internal operation circuit suitable for performing an internal operation of converting parity data generated from input data and storing the converted parity data in a memory cell array, in response to the column select signal, the output control signal and the input control signal.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: May 14, 2019
    Assignee: SK hynix Inc.
    Inventors: Seol Hee Lee, Chang Hyun Kim, Dae Yong Shim, Kang Seol Lee
  • Patent number: 10292154
    Abstract: A communication establishment method, mobile station and transfer device based on transfer mode. The method comprises: a first mobile station sends to the transfer device control information including the slot used by the first mobile station and the control signalings corresponding to different service types, in order that the transfer device determines a transfer slot and gets ready for communication according to the control signalings; and the first mobile station communicates with a target mobile station group through the transfer slot. The transfer device can accurately acquire the slot used by the mobile station, thus reducing communication error rate and solving the problem that the transfer device can not identify the slot in the use of the mobile station and can not support delayed access. Meanwhile, the technical solution can be compatible with existing transfer device and mobile station.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: May 14, 2019
    Assignee: Hytera Communications Corporation Limited
    Inventors: Yingzhe Zhang, Chia Han Siong Samuel, Yan Xu, Yang Yu
  • Patent number: 10282332
    Abstract: A subscriber station for a bus system and a method for time-optimized data transmission in a bus system are provided. The subscriber station comprises a coding device for coding and/or decoding bits of a message to/from at least one further subscriber station of the bus system, in which at least temporarily an exclusive, collision-free access of a subscriber station to a bus line of the bus system is ensured, wherein the coding device is designed to allocate, during the coding of the message, to at least two bits as bit combination, a predetermined voltage level for a bit time and/or wherein the coding device is designed to allocate, during the decoding of the message, at least two bits as bit combination to a predetermined voltage level for a bit time.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: May 7, 2019
    Assignee: Robert Bosch GmbH
    Inventor: Stefan Thiele
  • Patent number: 10284363
    Abstract: A serial transmitter that outputs one symbol every unit interval (UI) from a data source is presented. The serial transmitter includes a serial output port that outputs one symbol every unit interval (UI) from a data source. The serial transmitter also includes a plurality of driver segments that jointly drive the serial output port. Each driver segment is configured to use one of N phases of a sampling clock to serialize and transmit data from the data source. Different sets of the driver segments are configured to use different phases of the sampling clock for serializing and transmitting data, the sampling clock being a half-rate clock having a period of two UI.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 7, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy O. Dickson, Mounir Meghelli
  • Patent number: 10271113
    Abstract: The present invention is to provide a chassis switch, which comprises a chassis for accommodating a designated number of line cards therein; a backplane installed on the back side of the chassis and having a plurality of connectors disposed thereon; at least one line card plugged into one of the connectors corresponding thereto via a front side of the chassis and each having an access switch chip adapted to switch local network signals and an interconnect switch chip adapted to switch the signals between ports of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnect switch chip respectively through the connectors, so as to enable each line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: April 23, 2019
    Assignee: ALPHA NETWORKS INC.
    Inventors: Chung-Wang Lee, Chi-Yung Ko
  • Patent number: 10263655
    Abstract: An electronic device is provided. The electronic device includes a subscriber identification module (SIM) configured to store at least one provisioning profile, and a processor configured to control operation of the SIM, and if execution of provisioning through a first network with a server device which provides a profile fails, the processor is further configured to collect information for connecting to the server device and to perform provisioning through a second network based on the collected information.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 16, 2019
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Soon Hyun Cha, Sang Soo Lee, Duc Key Lee
  • Patent number: 10250264
    Abstract: A multiplying delay-locked loop circuit includes a delay chain including a plurality of variable delay circuits connected in series and having a delay chain output, and a feedback loop including circuitry for deriving a digital control signal representing magnitude and sign of phase offset in the delay chain output, for controlling delay in ones of the variable delay circuits. The circuitry for deriving a digital control signal includes a sampling time-to-digital converter (STDC) configured to operate on a time delay between inputs to generate the digital control signal. The STDC subtracts a second difference the signals derived from the delay chain output and output of the feedback divider from a first difference between the signals derived from the delay chain output and output of the feedback divider to provide a difference value, and the difference value indicates sign and magnitude of output offset in the delay chain output.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 2, 2019
    Assignee: Marvell World Trade Ltd.
    Inventors: Haisong Wang, Olivier Burg
  • Patent number: 10251149
    Abstract: An apparatus for detecting and timing a transmitting device is disclosed. The device includes a receiving system receiving a signal containing at least a preamble code of a known length and at least one pulse within a receive window after the preamble code, a circuit receiving the at least one pulse comprising a zero-crossing circuit for indicting a zero-voltage crossing of the at least one pulse and a trigger device for latching the indication of zero-voltage crossing, and a ripple circuit counter, receiving the latched indication of said zero-voltage crossing and associating a time to the receipt of the latched indication. A system for detecting and locating a transmitting device is further disclosed.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: April 2, 2019
    Assignee: BINJ Laboratories, Inc.
    Inventor: Joseph S. Noonan
  • Patent number: 10230606
    Abstract: A communication device performs communication with an external device. The communication device includes: a measurement packet transmission unit that transmits a measurement packet at a first transmission time point; a return packet reception unit that receives a return packet at a second reception time point, the return packet being transmitted at a second transmission time point, the return packet including information relating to a processing time indicating a duration from a first reception time point at which the measurement packet is received by the external device, to the second transmission time point, the return packet having a same packet size as the measurement packet; and a delay time specification unit that specifies, as a round-trip delay time, a duration obtained by subtracting the processing time from a duration from the first transmission time point to the second reception time point.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: March 12, 2019
    Assignee: NEC CORPORATION
    Inventors: Motohiro Suzuki, Kanako Anetai
  • Patent number: 10225597
    Abstract: Aspects of the disclosure relate to control of transmission and consumption of content in a device, such as an end-point rendering device. The content can include linear-programming content assets and/or time-shifted content assets. Consumption can be mediated by a control device that can coordinate the functional interaction between the device and a content distribution network node or an access network node that can supply the content and related information.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: March 5, 2019
    Assignee: Comcast Cable Communications, LLC
    Inventor: Bruce Bradley
  • Patent number: 10216653
    Abstract: A serial communication system includes a transmitting circuit for serially transmitting data via a serial communication link including N channels where N is an integer greater than 1. The transmitting circuit includes an input buffer having storage for input data frames each including M bytes forming N segments of M/N contiguous bytes. The transmitting circuit additionally includes a reordering circuit coupled to the input buffer. The reordering circuit includes a reorder buffer including multiple entries. The reordering circuit buffers, in each of multiple entries of the reorder buffer, a byte in a common byte position in each of the N segments of an input data frame. The reordering circuit sequentially outputs the contents of the entries of the reorder buffer via the N channels of the serial communication link.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: February 26, 2019
    Assignee: International Busiess Machines Corporation
    Inventors: Lakshminarayana Baba Arimilli, Yiftach Benjamini, Bartholomew Blaner, Daniel M. Dreps, John David Irish, David J. Krolak, Lonny Lambrecht, Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli, Kenneth M. Valk, Curtis C. Wollbrink
  • Patent number: 10209684
    Abstract: A self-configuring extremum-seeking controller includes a dither signal generator, a communications interface, a phase delay estimator, and a bandwidth estimator. The dither signal generator identifies a stored dither frequency, generates a dither signal having the stored dither frequency, and uses the dither signal to perturb a control input for a plant. The communications interface provides the perturbed control input to the plant and receives an output signal from the plant resulting from the perturbed control input. The phase delay estimator estimates a phase delay between the output signal and the dither signal. The bandwidth estimator estimates a bandwidth of the plant based on the estimated phase delay. The dither signal generator updates the stored dither frequency based on the estimated bandwidth.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: February 19, 2019
    Assignee: Johnson Controls Technology Company
    Inventors: Timothy I. Salsbury, John M. House
  • Patent number: 10211941
    Abstract: Configuring a node (410, A-I, L-O) of a synchronization network, involves determining information about synchronization sources of a plurality of synchronization trails for passing synchronization information from the synchronization source (A, L, O, PRC) to the node to provide a synchronization reference. After determining automatically (210, 230, 330, 335, 340) synchonization transmission characteristics of trails (EF, FG, GH, HM, MN, OF, FI, IH) which use packet-based communication, the trails are compared automatically (240, 370), using their source information and their synchronization transmission characteristics, for selecting which of these trails to use for providing the synchronization reference for the node (N).
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: February 19, 2019
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Stefano Ruffini, Giulio Bottari, Manuel Nardelli
  • Patent number: 10207675
    Abstract: At acquisition of a first unit command signal RC(1) of which storage is completed and in a case that the ring buffer stores a part of a second unit command signal RC(2), the CPU acquires the first unit command signal and the part of the second unit command signal upon receiving a first interrupt signal BQ(1), and then separates the first unit command signal and the part of the second unit command signal from each other. When having received a second interrupt signal BQ(2), the CPU acquires the remaining of the second unit command signal, and combines the remaining of the second unit command signal and the part of the second unit command signal. Accordingly, the second unit command signal once separated is acquired as a signal having all data completed.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: February 19, 2019
    Assignee: CALSONIC KANSEI CORPORATION
    Inventor: Yuuki Nakashima
  • Patent number: 10205584
    Abstract: A distributed antenna system (DAS) includes: signal interface units to receive downlink asynchronous radio carrier signals for radio frequency carriers from external device(s), each having a different clock, the signal interface units configured to: re-clock the downlink asynchronous radio carrier signals to a master clock of the DAS and convert the downlink asynchronous radio carrier signals to downlink digital signals; a host unit communicatively coupled to signal interface units and configured to combine at least two downlink digital signals into an aggregate downlink digital signal; an antenna unit coupled to the host unit and configured to: receive the aggregate downlink digital signal from the host unit, convert the aggregate downlink digital signal(s) and/or another signal based on the aggregate downlink digital signal into downlink radio frequency signals, and wirelessly transmit downlink radio frequency signals to a subscriber unit.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: February 12, 2019
    Assignee: CommScope Technologies LLC
    Inventors: Dean Zavadsky, Philip M. Wala
  • Patent number: 10205970
    Abstract: Systems and methods for generating a master video stream from at least two live video streams are provided in this disclosure. The systems include a combination component that combines the live video streams to generate the master video stream. In one aspect, the live video streams can be copies of the same recording that are multicast from different locations according to User Datagram Protocol. The live video streams suffer different errors, such as stream corruption or stream error, due to the transmission. The combination component eliminates the errors in the live video streams due to transmission and creates a substantially error-free master video stream.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: February 12, 2019
    Assignee: GOOGLE LLC
    Inventors: Nils Oliver Krahnstoever, Thomas Edward DeWeese, Michael A. Glover
  • Patent number: 10198019
    Abstract: A method and apparatus for sequence of event (SOE) data logging. In one embodiment, the method comprises continuously recording, at a power conditioner coupled to a power distribution line, data obtained by sampling a waveform of the power distribution line during a sampling window; analyzing, by the power conditioner, the data to determine whether an event has occurred; and based on the analysis, maintaining the data when it is determined that the event has occurred, and discarding the data when it is determined that the event has not occurred.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: February 5, 2019
    Assignee: Enphase Energy, Inc.
    Inventor: Joseph Phillips Matamoros
  • Patent number: 10198027
    Abstract: In one embodiment, a processor includes a credit circuit to communicate credit information between a first clock domain of the processor and a second clock domain of the processor. The credit circuit may include: a loopback path to communicate the credit information between the first clock domain and the second clock domain; and a bypass path to cause the credit information to traverse only a portion of the loopback path, based at least in part on a state of the second clock domain. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: February 5, 2019
    Assignee: Intel Corporation
    Inventors: Alexander Gendler, Ariel Szapiro, Mark Gutman
  • Patent number: 10200129
    Abstract: An apparatus in a passive optical network (PON) is configured to modify a preamble of a data packet to include channel bonding information. The apparatus may further fragment the data packet into a plurality of data frames and transmit the fragmented data frames through multiple channels. The channel bonding information may be used to identify different channels and to identify data frames transmitted through each channel.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: February 5, 2019
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Duane Remein, Frank Effenberger, Yuanqiu Luo
  • Patent number: 10194407
    Abstract: [Object] To provide a mechanism that makes it possible to perform synchronization control that is different in accordance with synchronization signals. [Solution] There is provided a terminal device including: a synchronization processing unit configured to perform synchronization processing on the basis of a synchronization signal for radio communication; and a control unit configured to control a monitoring period of a synchronization state of the synchronization signal in accordance with a transmission path of the synchronization signal that is subjected to the synchronization processing, and to control processing that is different in accordance with a monitoring result of a synchronization state for the monitoring period.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: January 29, 2019
    Assignee: SONY CORPORATION
    Inventor: Hiroaki Takano
  • Patent number: 10185696
    Abstract: An example method for initializing an interface includes driving a low voltage signal on data lanes and clock lanes. The method further includes performing a reset sequence and an initialization of a link configuration register. The method also includes driving a high voltage signal to the clock lanes and the data lanes. The method further includes driving a bus turn-around (BTA) sequence on the data lanes. The method also includes detecting that the BTA is acknowledged by a host controller.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Zhenyu Zhu, Nobuyuki Suzuki, Anoop Mukker, Daniel Nemiroff, David W. Vogel
  • Patent number: 10181923
    Abstract: A method and apparatus is for generating a modulation signal that comprises a resource block. A resource element sequence, Mnp, of M pilot symbols is determined that corresponds to an nth of N subcarriers. A pilot frequency domain sample sequence, rnp, corresponding to the resource element sequence Mnp comprises a quantity, RnNZ, of non-zero magnitude pilot frequency domain samples. RnNZ is determined based on M and an excess bandwidth, ?, of an adjacent subcarrier filter. The resource element sequence Mnp, which has no inter-subcarrier interference, is multiplexed with N?1 resource element sequences to form the resource block. The modulation signal is generated by modulating each subcarrier of the N subcarriers with a corresponding resource element sequence of the N resource element sequences and filtering each of the modulated subcarriers using a subcarrier filter. The resource element sequence Mnp is used during receiving for efficiently determining a channel estimate.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: January 15, 2019
    Assignee: Motorola Mobility LLC
    Inventors: Vahid Pourahmadi, Vijay Nangia
  • Patent number: 10177958
    Abstract: A one-to-multi multimedia stream method separately gets video and audio sources form the video and audio chips of a mobile device and reanalyzes related source data to correct the timestamp of video and audio data to ensure the synchronization of the output video and audio. Thus the incapability caused by not synchronized audio and video in stream decoding server can be solved. The present invention is configured to retrieve video and audio via mobile device without ffmpeg open source kits for format transformation, which greatly reduces operation and power consumption of CPU of mobile phone, and the mobile device can proceed one-to-multi video and audio transmission to a plurality of multimedia stream servers simultaneously.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: January 8, 2019
    Assignee: DA SHENG INC.
    Inventors: Chang-Yu Wu, Shun-Hsiang Hsu, Yao-Chung Hsu, Chi-Hung Wu
  • Patent number: 10177898
    Abstract: The present disclosure relates to methods and devices for signal detection. More particularly the disclosure pertains to methods and arrangements for signal detection systems with sparse synchronization signal rate. According to some aspects, the disclosure relates to a method, performed in a radio network node, of detecting at least one signal transmitted from a wireless device, wherein the radio network node transmits a synchronization signal to the wireless device with a synchronization signal rate. The method comprises determining a period of time that has passed since the most recent transmission of the synchronization signal to the wireless device and configuring, in the radio network node, at least one radio setting related to detecting the at least one signal, based on the determined period of time. The method further comprises monitoring a radio spectrum for the at least one signal using the at least one radio setting.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: January 8, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventors: Bengt Lindoff, Shehzad Ali Ashraf
  • Patent number: 10162406
    Abstract: The systems and methods provided herein identify a command acquisition mode from a plurality of command acquisition modes of a command interface of a memory device. A state of a chip select signal (CS) is identified. When the CS transitions to low from high, a first portion of a command address is captured in a first clock cycle after the CS transitions. When the command acquisition mode is in a first mode, a second portion of the command address is captured in a second clock cycle immediately after the first clock cycle. Otherwise, when the command acquisition mode is in a second mode, the second portion of the command address is captured in a third clock cycle immediately following the second clock signal. An internal command is fired, using the first portion of the command address and the second portion of the command address.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: December 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Kallol Mazumder, Parthasarathy Gajapathy
  • Patent number: 10164759
    Abstract: Provided are systems and methods for implementing a reliable precision time architecture in a network device. In various implementations, a first port of the network device can be configured to synchronize to a first network time from the network. A second port can be configure to receive the first network time from the first port, and further provide the first network time to the network. A third port of the network device can further be configured to synchronize to a second network time from the network. A fourth port can be configured to receive the second network time from the third port, and provide the second network time to the network. The network device can further be configured to use the first network time as a current time.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: December 25, 2018
    Assignee: Amazon Technologies, Inc.
    Inventor: Thomas A. Volpe
  • Patent number: 10162380
    Abstract: A method for synchronizing a plurality of components that are networked via a plurality of high speed switches, the method includes frequency-locking to a master clock component clocks of the plurality of components, and synchronizing to a master counter, driven by the master clock, component counters of the plurality of components, so that the frequency-locked component clocks drive the component counters in synchrony with the master counter.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: December 25, 2018
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Steven John Woloschek, Nathanael Dale Huffman, Brian Breuer, Eric Aasen
  • Patent number: 10164749
    Abstract: Embodiments of the present invention provide a channel-state information process processing method, a network device, and a user equipment, where the channel-state information process processing method includes: after receiving a first channel-state information CSI request sent by a first network device, if CSI corresponding to multiple aperiodic CSI processes has not been reported by a user equipment, dropping CSI corresponding to a part of aperiodic CSI processes among the multiple aperiodic CSI processes, where each CSI process is associated with a channel measurement resource and an interference measurement resource. A problem existing after a CoMP technology is introduced can be solved that the UE cannot implement processing of multiple CSI processes.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: December 25, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jingyuan Sun, David jean-Marie Mazzarese, Yongxing Zhou, Liang Xia, Xiaotao Ren, Yan Cheng
  • Patent number: 10158444
    Abstract: The present invention generally relates to methods and apparatuses for event-driven and stateless precision time transfer. In one embodiment, a master device creates and launches Precision Timing Protocol (PTP) Sync packets, as well as Follow-up packets in the case of two-step clock operation, on an event-driven basis in response to the receipt of a Delay Request message from a slave device, rather than based on scheduling performed by the master device. Doing so reduces the load on the master device and permits the master to serve a larger number of slave devices. In addition, PTP Announce messages, which are not used for calculating the time offset between master and slave devices, may be sent in response to some Delay Request messages using an adjustable sampling rate (e.g., 1 every x Delay Request messages).
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: December 18, 2018
    Assignee: Microsemi Corporation
    Inventor: Samer Darras
  • Patent number: 10157041
    Abstract: At least one processor that performs at least one of determine at least two audio signals, determine at least one directionality of at least one audio source from the at least two audio signals, determine at least one timing of the at least one audio source from the at least two audio signals, generate at least one context for the at least two audio signals based on the at least one directionality and the at least one timing of the at least two audio signals, and provide at least one user interface based on the generated at least one context.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: December 18, 2018
    Assignee: Open Invention Network LLC
    Inventor: David Gerard Ledet
  • Patent number: 10158441
    Abstract: Systems and methods are provided for validating time between a local clock included in the slave node of a network with a master clock included in the master node of the network. The master node determines a propagation delay between the master node and the slave node, sends a synchronization message to the slave node at a first time, determines an expected receipt time of the synchronization message at the slave node based on the first time, the determined propagation delay between the master node and the slave node, and a rate ratio of the master clock to the local clock, and sends a follow up message to the slave node, the follow up message including the first time and the expected receipt time.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: December 18, 2018
    Assignee: Apple Inc.
    Inventors: Ashley I. Butterworth, Matthew X. Mora
  • Patent number: 10158907
    Abstract: An example method for performing playout of multiple media recordings includes receiving a plurality of media recordings, indexing the plurality of media recordings for storage into a database, dividing each of the plurality of media recordings into multiple segments, and for each segment of each media recording, (i) comparing the segment with the indexed plurality of media recordings stored in the database to determine one or more matches to the segment, and (ii) determining a relative time offset of the segment within each matched media recording. Following, the method includes performing playout of a representation of the plurality of media recordings based on the relative time offset of each matched segment.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: December 18, 2018
    Assignee: Shazam Investments Ltd.
    Inventors: Avery Wang, Maxwell Leslie Szabo
  • Patent number: 10152380
    Abstract: A memory device includes a memory cell array including a plurality of memory cells; a counting circuit configured to obtain a counting result by performing a counting operation on data read from the plurality of memory cells; and a control logic configured to perform a data restoring operation based on the counting result without involvement of a memory controller.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: December 11, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-jin Yim, Seung-jae Lee, Il-han Park, Kang-bin Lee
  • Patent number: 10154154
    Abstract: A centralized theft-proof device includes a main control, several sub-controls, and optionally a remote control. The main control includes a process, a display, a wireless receiver, and an alarm, and each sub-control includes a SCM and several interfaces connected to the SCM. The processor and SCM are in series connection. The processor is electrically connected to the display, the wireless receiver, and the alarm, respectively. The main control is connected to at least one adapter, and each sub-control is connected to at least one adapter.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: December 11, 2018
    Assignee: Hangzhou Langhong Technology Co., Ltd.
    Inventor: Hong Xin
  • Patent number: 10146615
    Abstract: A system and method are disclosed that include recovery of the system directory when an uncorrectable error is detected. According to the various aspects and embodiments of the invention, the system and method disclosed can manage single bit error detection and two-bit error detection.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: December 4, 2018
    Assignee: ARTERIS, Inc.
    Inventor: Parimal Gaikwad
  • Patent number: 10146722
    Abstract: Operation of a PCIe Retimer over an Optical Cable has been disclosed. In one implementation a Optical Idle ordered set (OIOS) is introduced as well as a high Z ordered set (HZOS).
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: December 4, 2018
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: David Alan Brown, Dzung Xuan Tran
  • Patent number: 10122486
    Abstract: A method and system is provided for clock synchronization between two devices comprising a clock. The method comprises the following steps: a step of determining a duration necessary for transmission of a data packet between the two devices, a step of sending by one of the devices a data packet containing a sending time of this packet, and a step of determining the time by the other device by adding the transmission duration to the sending time of the packet.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: November 6, 2018
    Assignee: THALES
    Inventors: Jean-Yves Philippe, Olivier Pierrelee
  • Patent number: 10111189
    Abstract: In one embodiment, a timing slave packet switching device receives a received primary reference clock signal. The timing slave packet switching device communicates a first plurality of packet network synchronization packets over a packet switching network with a remote primary reference clock source and derives an over-network clock based on the first plurality of packet network synchronization packets. A phase offset between the phase of the over-network clock and the phase of the received primary reference clock signal is determined and typically stored in non-volatile storage. Subsequent to said determining the phase offset, the timing slave packet switching device communicates a second plurality of packet network synchronization packets over the packet switching network with the remote primary reference clock source and adjusts the phase of a clock derived from the second plurality of packet network synchronization packets based on the phase offset.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: October 23, 2018
    Assignee: Cisco Technology, Inc.
    Inventors: Ishwardutt Parulkar, Karuppusamy Marappagounder, Manoj I. Somakumaran
  • Patent number: 10104148
    Abstract: In methods, systems, and devices, master and slave node timestamp synchronization units identify a node start frame delimiter of a time protocol message on transmission medium by matching patterns in the time protocol message to known start frame delimiter patterns. Master and slave node processors of such timestamp synchronization units capture a corresponding node clock time at which the node start frame delimiter is identified by referring to a corresponding node clock signal while each is identifying the node start frame delimiter. The master and slave node processors perform compensation of the node clock time by making adjustments to the node clock time for known time latency. The master and slave node timestamp synchronization units then output the node clock time as timestamps to corresponding timestamp units.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: October 16, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kai Yang, Adrian Butter, Bin Sun, Bin Yu
  • Patent number: 10103907
    Abstract: A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: October 16, 2018
    Assignee: Rambus Inc.
    Inventors: Jared L. Zerbe, Vladimir M. Stojanovic, Fred F. Chen
  • Patent number: 10097316
    Abstract: A method and apparatus for operating a controller for a satellite communications system during inter-beam handovers. In some aspects, the controller may perform an inter-beam handover by switching communications with a user terminal from a first beam to a second beam of a satellite. The controller receives a feedback message form the user terminal, via the first beam, after the inter-beam handover is completed, and may then selectively retransmit data to the user terminal via the second beam based at least in part on the feedback message.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: October 9, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jelena Damnjanovic, Gene Wesley Marsh, Mario Maro Scipione, Qiang Wu
  • Patent number: 10091751
    Abstract: A mobile unit as well as a method for time-stamping a first message of the first mobile unit to a second mobile unit are provided. The method includes the steps of: determining a roundtrip time between the first mobile unit and a base station, receiving the first message sent by the first mobile unit in the base station, adding a timestamp to the first message in the base station while taking into account the roundtrip time, and sending the time-stamped first message to the second mobile unit.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: October 2, 2018
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Armin Bartsch, Horst Kloeden, Felix Klanner, Andreas Rauch
  • Patent number: 10082825
    Abstract: Disclosed are a method of and system for providing time synchronization among first and second computer systems, where each of the computer systems includes hardware, operating system software and a layer of microcode operating between said hardware and said software. The method comprises the steps of using the microcode of the first computer system to provide a first timestamp, using the microcode of the second computer system to provide a second timestamp and a third timestamp, and using the microcode of the first computer system to provide a fourth timestamp. The method comprises the further steps of using the first, second, third and fourth timestamps to determine a timing difference between the first and second computer systems, and adjusting the timing among said first and second computer systems on the basis of said determined timing difference.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: September 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Scott M. Carlson, David A. Elko, Richard K. Errickson
  • Patent number: 10079747
    Abstract: A method is implemented by a network device to establish a one-way active measurement protocol (OWAMP) test session to verify that a session-sender and session-reflector support a timestamp format extension including a Precision Time Protocol Version 2 (PTPv2) timestamp format. The PTPv2 timestamp format is to be utilized in place of a Network Time Protocol (NTP) timestamp format. The network device acts as a control-client that communicates with a server to establish an OWAMP test session between the session-sender and the session-receiver.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: September 18, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventor: Gregory Mirsky
  • Patent number: 10075253
    Abstract: Method and arrangement for providing delay information to synchronization packets passing a transport network node. In a transport network node synchronization packets propagate from a synchronization master node towards boundary clock nodes. The synchronization packets pass the transport network node, in which the synchronization packets are received, and a level of delay is determined. Furthermore, when the level of delay for the synchronization packets is above a threshold, the synchronization packets are marked with a delay indication. The received synchronization packets are sent to the boundary clock node or ordinary clock node, whether or not they are marked. By implementing functionality for determining a level of delay of synchronization packets, and marking passing synchronization packets with delay indications, boundary clock nodes and ordinary clock nodes may differentiate the received synchronization packets based on the delay identifications.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: September 11, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Mikael Olofsson, Stefano Ruffini
  • Patent number: 10068625
    Abstract: A buffer memory and display drive device are described herein. In one example, a buffer memory is arranged so that write and read address counters are controlled according to a wraparound method, and subjected to no reset in count value, which enables the avoidance of data destruction in a boundary portion of a block. In the buffer memory, block head addresses of the write and read address counters are managed centrally. So, even in the event of undesired change in count value, the influence thereof can be intercepted halfway. While reducing the memory capacity of the buffer memory which is supplied with data in blocks, the following are made possible: to prevent the deviation in read data owing to an undesired change in the address counter from lasting; and to prevent data, handled in blocks, from disappearing near a block boundary.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: September 4, 2018
    Assignee: Synaptics Japan GK
    Inventors: Hiroshi Morimoto, Kanehiro Masumitsu
  • Patent number: 10069584
    Abstract: A frequency calibration apparatus and method are provided. An oscillator of the frequency calibration apparatus has an operation frequency. The frequency calibration apparatus receives a plurality of time packets from an NTP server at a plurality of first time points. Each of the time packets records a second time point that the NTP server transmits the time packet. The frequency calibration apparatus calculates an offset for each of the time packets in a subset of all the time packets, calculates a clock skew according to the first time points and the offsets of the time packets in the subset, calculates a difference between the clock skew and a standard frequency value, determines that an absolute value of the difference is greater than a threshold, and adjusts the operation frequency to an initial frequency after determining that the absolute value of the difference is greater than the threshold.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: September 4, 2018
    Assignee: Institute For Information Industry
    Inventors: Ding-Jie Huang, Yi-Chih Tung, Chih-Hsiang Ho, Muh Wu, Shu-Min Chuang