Abstract: An alignment logic together with an MFI extractor are adapted to compensate for differential delays. The MFI extractor extracts the MFI disposed in the path overhead of each constituent time-slot. The alignment logic uses the extracted MFI to align corresponding data words (i.e., data words that are transmitted during the same time period) at the receiving end of virtually concatenated channels and that occupy different time-slots of the same channel. To perform alignment, the alignment logic stores each data word in a RAM location that is defined by an associated MFI. The data words so stored are aligned when read sequentially from their stored locations. The synchronization logic in the alignment logic synchronizes all the constituent time-slots.

Abstract: Transcoder multiplexers that transport digital packets, such as MPEG2 packets, between boards in a chassis using a serial differential protocol are disclosed. The disclosed multiplexers achieve data transfer rates at least twice as fast as conventional systems. Digital data packets are thereby efficiently communicated to target processing engines on other boards across the backplane. Prior art requirements for custom backplane designs, together with discrete hardware for sending data in parallel form between boards, are obviated. Instead, a backplane architecture designed specifically for IP data traffic from any slot to any slot is utilized. Also, an improved protocol is applied for transmitting data serially between boards to provide an inexpensive, upgradeable and flexible hardware solution. Preferred embodiments use LVDS transmitter/receiver pairs with high link speeds.

Abstract: Described is a method and system for processing data packets of a data stream in a communication system. The data packets are processed depending on a feature of the header of a data packet in a faster path or in a slower path. To avoid a disorder by the different processing paths, the fast processed data packets are stored in a memory. The stored fast processed data packets are output after all slowly processed data packets which before the processing were in order before the fast data packets have been put to the output. In this way, the processed data packets are in the same order as prior to the processing.

Abstract: Disclosed are a system and method of transmitting data frames between media independent interfaces (MIIs) in a bus conversion device. Data frames received at a first MII may be formatted according to a first data transmission protocol. A bus conversion device formats the data frame for forwarding to a second MII. The bus conversion device may transmit data frames between MIIs having different associated data rates and data frame formats.

Abstract: There is provided a serial compressed bus interface having a reduced pin count. The interface includes a serial-to-parallel converter having a single serial data input line adapted to receive time-division multiplexed serial data from a plurality of data sources. Enable logic is adapted to input at least one data valid signal that identifies each of a plurality of data consumers for which the time-division multiplexed serial data is valid.

Abstract: A data transmission system that detects fiber faults receives a plurality of data packets carried on a plurality of Gigabit Ethernet links at a plurality of Gigabit Ethernet input/output ports. The system then multiplexes, on a bit by bit basis, the data packets onto an optical link. When the system detects a loss of signal in one of the Gigabit Ethernet links, a signal loss code insert is generated. The system then multiplexes the signal loss code insert with the data packets.

Abstract: A MAC master apparatus for executing a multi-point control protocol (MPCP) data in an optical line termination (OLT) of an Ethernet passive optical network (PON) is provided. The MPCP master apparatus includes a CPU interface unit, two or more memory arbitration control units, a SGA table memory, a RTT table memory, a static grant generation unit, a dynamic grant generation unit, a static grant queue, a dynamic grant queue, a sending message queue, a sending multiplexing unit, a time setting unit, a receiving window generation unit, an upstream grant queue, a received demultiplexing unit, a report queue and a received message queue. Therefore, any frame, including MPCP frames from/to the CPU can be sent or received, and a grant can be allocated statically according to a setting or dynamically according to a report from the ONUs.

Abstract: A method and apparatus are provided that uses the feedback information from an ARQ signal that is received to control the transmit diversity of a transmitter. The method provides for improved performance over some existing ARQ plus open loop transmit diversity schemes in terms of bit-error rate for a given Eb/No. Furthermore, the method does not require extra signaling used by closed loop TD schemes.

Abstract: In a multi-format transport stream decoder that performs a desired process on first transport streams of different formats to generate a second transport stream, a process request information input unit (APR) is supplied with process target packet data (Pi) and process request information (ScW) indicative of process details. A stream identification information providing unit (TSRi) provides stream identification information (TSID). A packet data retaining and identifying unit (DBA) retains each pieces of first packet data (Pi), and compares the stream identification information (TSIDe) and packet data identification information (PIDe) of the first packet data (Pi) with the process request information (ScW) to determine whether the information is to be processed.

Abstract: An on-chip RAM FIFO (first-in-first-out) buffer for storing SPE overhead bytes wherein each entry of the RAM FIFO stores (1) a byte of the SPE overhead; (2) an indication of which byte of the SPE overhead is currently stored in that entry; and (3) an indication of which STS signal that byte was taken from.

Abstract: The present invention provides an Ethernet switching apparatus using frame multiplexing and demultiplexing. The Ethernet switching apparatus has a plurality of frame demultiplexers, a plurality of frame multiplexers and a switch fabric chip set. The frame demultiplexers convert at least one 10 gigabits Ethernet frame into a plurality of gigabit Ethernet frames. The frame multiplexers convert a plurality of gigabit Ethernet frames into at least one 10 gigabits Ethernet frame. The switch fabric chip set is provided with input and output interfaces using the GMII, and is connected to the frame demultiplexers and the frame multiplexers in the GMII format. The switch fabric chip set outputs frames through an arbitrary usable one of a plurality of GMII ports connected to a corresponding frame multiplexer if the frames are transmitted to the corresponding frame multiplexer.

Abstract: A method of transferring a serial data stream to a data framer includes converting the serial data stream to parallel data streams. The parallel data streams are synchronized and formed into one or more groups of synchronized parallel data streams. The one or more groups of synchronized parallel data streams are then transferred to the data framer at a transfer rate determined by the forming of the one or more groups.

Abstract: A multiplex transmission system according to the invention includes a transmitter and a receiver. The transmitter is provided with an idle frame inserting unit that inserts a specific idle frame different from an idle frame inserted into a surplus band of another signal into a surplus band of a predetermined signal and generates an internal signal, a multiplexing unit that multiplexes internal signals by time division and generates a multiplexed signal and a framing unit that transmits the multiplexed signal to a transmission line interface.

Abstract: A method for transmitting a stream of data over a channel made up of a plurality of subchannels having respective subchannel rates. The method includes partitioning the data among the subchannels, such that successive words of the data are mapped to the subchannels in alternation responsive to the respective subchannel rates. The words of the data are transmitted over the subchannels to which they are mapped, and are then received and processed to recover the stream of data.

Abstract: Time-based grooming and degrooming methods and systems of data units that utilize a common time reference is disclosed. Time is divided into a plurality of contiguous periodic time frames with a plurality of time frame durations. The system and method enable the grooming and switching of data units from a plurality of low speed links into one or more high-speed links. The system and method further enable the grooming and switching of data units from one or more high-speed links into a plurality of low speed links. The plurality of data units that are contained in each of the time frames are forwarded in a pipelined manner through the network switches. The system operates with high-speed wavelength division multiplexing (WDM) links, i.e., with multiple lambdas. The outcome of this method is called fractional lambda grooming.

Abstract: A subband channelizer that includes a demultiplexer that receives input samples of a signal and distributes the input samples to a plurality of channelizer filter banks. A Fourier transform module that receives outputs from the plurality of channelizer filter banks and performs Fourier transformation on each of the outputs of the channelizer filters, and outputs a plurality of Fourier signals. A plurality of multiplier modules that receive the Fourier signals, and each of the Fourier signals is multiplied with an exponential value assigned to each of the plurality of multiplier modules to produce oversampled subbands. A combiner for generating a wideband signal from a plurality of input subbands is also included.

Abstract: A communication method for a radio LAN system provides communication at a first transmission rate. In the method, a first signal of the first transmission rate is time-divisionally distributed into n?1 second signals (n=3, 4, . . . ). The n?1 second signals are respectively converted into n?1 third signals of a second transmission rate less than the first transmission rate. The n?1 third signals of the second transmission rate are also transmitted through radio transmission paths between n?1 radio base stations and a terminal station connected to at least one terminal unit.

Abstract: A tunneling system includes an encoding module, which is typically located in the production studio, and a decoding module, which is typically located in the entertainment venue. The encoding module is configured to incorporate DMX codes into an Audio Engineering Society (AES) digital audio stream to provide additional scenes, props, special effects, lights, sounds, and music in the entertainment venue. The DMX codes are typically incorporated into the AES digital audio stream so that they are synchronized with the performance recorded on the digital video stream. The encoding module is used to add, embed or record the AES digital audio stream with DMX codes, e.g., lighting data or queues, etc., which control the equipment in the entertainment venue. The recording module is used to make the standard AES/European Broadcasting Union (EBU) audio channels hold codes such as lighting data to enhance the entertainment experience.

Abstract: Multiplexing structures presented overcome problems and disadvantages in the delivery of an interactive program guide. An apparatus for forming a multiplexed transport stream to deliver an interactive program guide includes: an encoder and packetizer adapted (i) to receive a plurality of video inputs, an audio input, and a plurality of data inputs, and (ii) to encode and packetize the inputs to generate a plurality of video packet streams, an audio packet stream, and a plurality of data packet streams; and a multiplexer and assigner adapted (i) to receive the plurality of video packet streams, the audio packet stream, and the plurality of data packet streams, (ii) to assign program identifiers (PIDs) to said packet streams, and (iii) to multiplex said packet streams to form the transport stream.

Abstract: A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.

Abstract: A loopback processing method includes detecting a loopback at a first entity in a wide area network. The detection is accomplished by recognizing that a “memorized” frame has returned on the same communications interface within a given period of time. The time interval between sending the frame and detecting it returning at the same port may be recorded and sent to an operator to provide information on the relative location of the loopback in the network. A loopback detect sequence is sent from the first entity to a second entity on the communications interface in loopback. Because of the loopback, both entities receive the loopback detect sequence.

Abstract: In the preferred embodiment of the invention, an output clock synchronizes an output CPU with an n-way demultiplexer to allow the demultiplexer to know which output is which. To do so, the invention provides a synchronization scheme in which a synchronization string is always written to channel zero before the output is allowed to be clocked. Once synchronization is established, each channel has its own word-length output buffer. Thus, each time the clock sends out a signal, a new word is put into the output buffer, unless it happens to be for channel zero which does not need a memory.

Abstract: Communication occurs between a source and a destination over plural communications paths by first identifying content to be sent to a destination via a communications system. After discovering that plural communications paths connecting directly to the destination are available, the content is divided into plural different portions and is transmitted to the destination such that each of the plural different portions is routed via a different one of the plural communications paths.

Abstract: Coding a data stream is provided, wherein the data stream comprises at least one packet having a given packet length and respective partitions of the at least one packet are coded with different error protection rates, the respective lengths of the respective partitions being determined by respective predetermined percentages of the packet length or a fraction of the packet length.

Abstract: The present invention relates to a computer network and a method for using the network The network and method employ powered multiplexing connection devices which electronically couple two or more network devices to the network. The signals from the network devices to the network are multiplexed at the powered multiplexing connection devices and the signals from the network to the network devices are demultiplexed at the powered multiplexing connection devices. The multiplexing enables the various work-center devices to communicate with the network and, in some cases, to receive power over the network connection. The intelligent electronic circuitry is also capable of aiding in network security and management and in monitoring the status of the network infrastructure.

Abstract: The preferred embodiment of the present invention provides an improved transport demultiplexor that can receive and filter different data types before sending the data to system memory. The preferred embodiment provides a string comparator to facilitate real time filtering of continuous incoming data before loading the data into system memory. The string comparator preferably uses a bit-maskable matching filter that filters system data in real time as the data is being delivered to system memory. When data matching the filter is located, the destination address of that data is determined and delivered to the processor. This allows the processor to quickly locate the desired data and thus facilitates the real time processing of that data.

Abstract: The invention concerns a switching apparatus comprising a low order switch subtended from a high order switch. In order to compensate for delays incurred by passing a data frame through the high order switch to the low order switch and delays incurred by the operation of the low order switch, the apparatus is arranged to advance the payload of a received data frame with respect to the fixed overhead of the data frame by an amount corresponding to the incurred delays. The low order switch uses the advanced payload to create an output frame, for sending to the high order switch, which is advanced with respect to the data frame that it receives. The apparatus, which is particularly suitable for use in SDH and/or SONET systems, obviates the need to provide an alignment apparatus, such as a VT/TU aligner between the high order switch and the subtended low order switch.

Abstract: A transport stream (TS) demultiplexer has a TS input switch unit and an output switch unit, whereby inputs and outputs can be selected as desired, external output can be easily changed by changing selected information of the TS input switch unit and the output switch unit, without changing inputs. Therefore, the TS demultiplexer receives a plurality of TSs such as MPEG-2 TSs and DSS TSs, and can selectively demultiplex the TSs, and particularly, the TS demultiplexer can store the TSs in a storage medium such as a hard disc drive, or it can easily transmit the TS data over an IEEE1394 bus or a PCI bus.

Abstract: A method in reception of a multiplex signal, comprising one or more data units, and at least one framing data block in each multiplex signal. The method comprises: searching for said framing data block from a received multiplex signal; demultiplexing said one or more data units according to the information in said framing data block; generating one or more demultiplexed signals from said demultiplexed data units, and forwarding said demultiplexed signals for decoding (50). At multiplexing possible invalidity of demultiplexed video data units is detected (51), and as a response to a detected invalidity in a demultiplexed video data unit, an error indication to the demultiplexed video data signal is added (52).

Abstract: A system and method for processing control cells to prevent event missequencing and data loss are described. At least one control unit is processed to retrieve communication information related to data received along one or more communication links in a network. The at least one control unit is then stored in one or buffers. Finally, the at least one control unit is further processed to retrieve link information related to the one or more communication links.

Abstract: A method and apparatus for simultaneously sync hunting signals is described. In one embodiment of the invention, a computer implemented method comprises initializing a first and second subset of a set of per-alignment state machines, receiving a first and second signal, and simultaneously sync hunting the first signal with the first subset of the set of per-alignment state machines and the second signal with the second subset of the set of per-alignment state machines.

Abstract: A system target decoder operable to receive and process information. The system target decoder has a first demultiplexer that can demultiplex a transport stream into packets each having a given packet identifier. There are at least two transport buffers that can receive packets with the same packet identifier from the first demultiplexer. The transport buffers transfer the data to a smoothing buffer that in turn sends the data to a second demultiplexer. The second demultiplexer demultiplexes data from within the packets from the smoothing buffer into data access units.

Abstract: A separating device and method and a signal receiving device and method are presented. The separating device and method receive plural data streams and then separate and extract at least a portion of data from the received data streams. The signal receiving device and method receive plural data streams and then select, separate and extract at least a portion of the data from the data streams. Then the signal receiving device and method apply signal processing to the portion of the data that has been selected, separated and extracted.

Abstract: A method and device is described for converting an STM-1 signal into a sub-STM-1 signal in synchronous radio transmission. The invention provides for the use of a pure regenerator network element without any multiplexing function. The method according to the invention provides in transmission, for reducing the received STM-1 signal by one third (only the first TUG-3 is considered as valid and is transmitted in the radio link, whereas the second and the third TUG-3 are considered in an unequipped condition and are not transmitted), thus maintaining the STM-1 structure. In reception, the method provides for reconstructing the signal with the complete regenaration of the payload and the correct structure of the AU-4 without incurring any parity control infringement.

Abstract: A decoder is provided which includes a demultiplexing unit for separating a multiplexed stream into plural streams by a demultiplexing process and a decoding unit for carrying out a decoding process for one of the plural separated streams, wherein the decoder selects one of the plural separated streams to output the same to the decoding unit such that a decoding process for one stream in the decoding unit is switched to a decoding process for another stream. The decoder is thus able to decode plural streams composing a multiplexed stream with one decoding unit.

Abstract: An Ethernet architecture is provided for connecting a computer system or other network entity to a dedicated Ethernet network medium. The network interface enables the transmission and receipt of data by striping individual Ethernet frames across a plurality of logical channels and may thus operate at substantially the sum of the individual channel rates. Each channel may be conveyed by a separate conductor (e.g., in a bundle) or the channels may be carried simultaneously on a shared medium (e.g., an electrical or optical conductor that employs a form of multiplexing). On a sending station, a distributor within the sender's network interface receives Ethernet frames (e.g., from a MAC) and distributes frame bytes in a round-robin fashion on the plurality of channels. Each “mini-frame” is separately framed and encoded for transmission across its channel. On a receiving station, the receiver's network interface includes a collector for collecting the multiple mini-frames (e.g.

Abstract: The invention relates particularly to the switching of an SDH low order VC-3 using a high order switching apparatus, such as an STS switch. A low order VC-3 is aligned with a TU-3 pointer to form a TU-3. The TU-3 is mapped into a high order VC-3 type data structure which, in turn, is aligned with an AU-3 pointer to form an AU-3 type data structure. The AU-3 type data structure is suitable for switching by the high order switch. After switching, the AU-3 type data structure is combined with similar AU-3 type data structures and converted into an AU-4 suitable for transmission across an SDH/SONET network. Advantageously, the arrangement is such that each AU-3 pointer has the same fixed value. Hence, conversion to an AU-4 is achieved by a fixed pointer replacement operation.

Abstract: Systems, methods, and computer program products for parsing a packetized, multi-program transport stream are disclosed. A packetized, multi-program transport stream is received in a demultiplexer. Program specific information is extracted from the program stream and displayed on a user interface. A user may select a program from the program stream for further processing. The user interface generates a signal indicative of the selected program, and the demultiplexer output is configured based on the selection signal.

Abstract: A novel and useful mechanism of synchronizing and aligning a plurality of data streams. The invention comprises a plurality of sync machines and an alignment circuit which in combination function to synchronize and align multiple variable length cell streams. Each sync machine is operative to control the output clocking of a corresponding FIFO queue. The data stream output of each FIFO queue is monitored by a sync machine and all the sync machines are coupled to the alignment circuit. In operation, the sync machines synchronize to the cells by searching for the error checks sequence (ECS) at the end of each cell. Upon synchronization being achieved for all the data streams, the alignment circuit causes each sync machine to freeze its respective FIFO until the ECS arrives on the data stream most delayed in time. Once the ECS is received on the slowest data stream, the alignment circuit releases the hold and consequently the FIFOs are released by the sync machines.

Abstract: Techniques for transmitting voice/data and packet data services such that packet data transmissions have less impact on voice/data transmissions. In one aspect, voice/data and packet data can be multiplexed within a transmission interval such that the available resources are efficiently utilized. In another aspect, the amount of variation in the total transmit power from a base station is controlled to reduce degradation to transmissions from this and other base stations. In a specific method for concurrently transmitting a number of types of data, a first data type (e.g., voice, overhead, and some data) and a second data type are respectively processed in accordance with first and second signal processing schemes to generate first and second payloads, respectively. First and second partitions are then defined in a transmission interval. The first and second payloads are time multiplexed into the first and second partitions, respectively, and the multiplexed payloads are transmitted.

Abstract: A system for transparently transporting m synchronous data streams as an aggregate data stream on a single channel of a Wave Division Multiplexed (WDM) optical link without pointer processing uses m unique encoding schemes to enable recovery of the respective m data streams from the aggregate data stream. The encoding schemes are preferably self-inverting. The respective m data streams are parsed into data units and encoded. The data units are then interleaved to form the aggregate data stream. Recovery is accomplished using a reverse process.

Abstract: Circuitry for a node of an optical communication network has a mux and/or a demux. In one embodiment, the circuitry has a mux and a demux implemented on a single circuit board, where (1) the mux is configured to combine up to eight different incoming OC3/OC12-rate electrical signals into a single outgoing OC48-rate electrical signal for conversion into two copies of an outgoing OC48 optical signal and (2) the demux is configured to split a working incoming OC48-rate electrical signal (selected from two incoming OC48-rate electrical signals converted from two incoming OC48 optical signals) into up to eight different outgoing OC3/OC12-rate electrical signals. The node is configured to perform automatic signal provisioning, which may be (a) the addition of a new OC3/OC12 signal; (b) the deletion of an existing OC3/OC12 signal; (c) the rate-upgrading of an existing OC3 signal to an OC12 signal; or (d) the rate-downgrading of an existing OC12 signal to an OC3 signal.

Abstract: A multiplexed audio data decoder apparatus is provided in which integration of an audio decoder is easy, and has a high flexibility when the number of the formats to be processed is increased or when the specification is changed. In an external ROM 60 there are accumulated a plurality of decoding program codes corresponding to respective plural methods for compressing and encoding. A controller means 50 transfers the decoding program code corresponding to the method for compressing and encoding after changing thereof, from the external ROM 60 to an internal RAM 25. A DSP 22 starts decoding processing by using the decoding program code which is transmitted into the internal RAM 25.

Abstract: The protection of data against illicit transfer with respect to specific data can be ensured. An integrated receiver decoder determines whether or not ATRAC (Adaptive Transform Acoustic Coding) data requiring authentication is contained in selected piece-of-music data in accordance with determination data added into transmitted data. When ATRAC data requiring authentication is contained, the integrated receiver decoder performs an authentication process between it and a storage which is a transfer destination of the ATRAC data, and performs downloading of the ATRAC data after confirming that the storage is a valid apparatus to which the downloading may be performed.

Abstract: A multiplexing video decoding apparatus for decoding video signals of a plurality of channels and a method therefor are provided. The multiplexing video decoding method receives bit streams, each of which has a plurality of slices, in a plurality of channels and decodes bit streams of the plurality of channels in a multiplexed mode. The multiplexing video decoding method includes sequentially decoding video signals of the bit stream on a slice interval basis in one channel in the plurality of channels, and when the slice has been decoded, switching to decode a slice for each of the other channels; and decoding in a multiplexed mode bit streams of a plurality of channels by repeating the above steps to the following slice of each of the channels. The apparatus includes a plurality of FIFO memories for receiving and processing the multiple bit streams in parallel, a processor for sequentially decoding the bit streams from the FIFO memories, and a video processor to reproduce a video signal.

Abstract: A demultiplexer, capable of extracting specific individual data from among packets in which the specific individual data is stored in predetermined units with a high efficiency, for A packet demultiplexer demultiplexes first to third packets and an extractor extracts additional information from the third pocket. The extractor has a first comparator for comparing control data in a harder region of the third packet and first comparison data based on mask data, and a second comparing comparator for comparing the control data and second comparison data based on the first comparison data and the mask data. The additional information is extracted from the third packet when the result of comparison of the first comparator indicates coincidence and result of comparison of the second comparator indicates noncoincidence.

Abstract: A method to restore the original order of packets in an end-to-end data flow after the flow has been multiplexed over a set of communication or switching paths whose available bandwidth varies significantly over time. To convey the relative path ordering, the method considers all possible path pairs. For each such path pair it enumerates the packet block transmissions, i.e., the sequences of packets transmitted on a selected path of the given path pair which are not interleaved by the packets transmitted on the other path of the same pair. Packet block enumeration for each path pair is performed independently and does not take into account any packets transmitted on the other paths. A packet transmitted on a given path carries a set of packet block identifications for each path pair the given path belongs to. Increasing the range of the packet block enumeration, the robustness of the method can be adjusted to an arbitrary level of packet loss tolerance.

Abstract: In accordance with a specific aspect of the present invention, a compressed video stream, such as an MPEG-2 video stream, is received by a transport demultiplexor, synchronized, parsed into separate packet types, and written to buffer locations external the demultiplexor. Adaptation field is handled by a separate parser. In addition, primary elementary stream data can be handled by separate primary elementary stream parsers based upon the packet identifier of the primary elementary stream. Video packets can be parsed based upon stream identifier values. Specific packets of data are stored in one or more system memory or video memory buffers by an output controller based upon allocation table information. Private data associated with specific elementary streams or packet adaptation fields are repacketized, and written to an output buffer location. In specific implementations, the hardware associated with the system is used to acquire the data stream without any knowledge of the specific protocol of the stream.

Abstract: A real-time load-balancing system for distributing a sequence of incoming data packets emanating from a high speed communication line to a plurality of processing means, each operating at a capacity that is lower than the capacity of the high speed communication line; the system according to the invention comprises: a parser capable of extracting a configurable set of classifier bits from the incoming packets for feeding into a compression means; the compression means is capable of reducing a bit pattern of length K to a bit pattern having a length L which is a fraction of K; a pipeline block for delaying incoming packets until a load balancing decision is found, and an inverse demultiplexer for receiving a port identifier output from said compression means as selector and for directing pipelined packets to the appropriate output port.

Abstract: The transmission system comprises a transmitter (10) and a receiver (14). The transmitter (10) can transmit a number of multiplex signals (12) to the receiver (14). The receiver (14) comprises storage means (20) for storing data sections included in the multiplex signals (12) in dependence on information present in the multiplex signals (12). The information for the complete set of multiplex signals (12) is contained in a single information section in at least one of the multiplex signals (12).