Loopback Mode Patents (Class 375/221)
  • Publication number: 20090207896
    Abstract: An integrated circuit radio transceiver and method therefor includes an integrated circuit radio transceiver operable to provide specified gain levels and transmit path filter responses to correspond with a selected power spectral density mask. Changes in gain may be provided solely digital gain changes or may include analog gain module gain changes. A transmitter selects from one of at least three masks to reduce or eliminate spectral regrowth out of band to satisfy EVM requirements. Circuitry is provided to allow a transceiver to determine in advance what pre-distortion compensation settings are required for the various gain settings.
    Type: Application
    Filed: February 14, 2008
    Publication date: August 20, 2009
    Applicant: BROADCOM CORPORATION
    Inventor: Arya Reza Behzad
  • Patent number: 7571363
    Abstract: A phase comparator is used to test a device under test comprising an input/output (I/O) circuit by applying a signal to the device under test; extracting a phase signal from the phase comparator; and determining parametric information pertaining to the I/O circuit of the device under test from the phase signal.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: August 4, 2009
    Assignee: Agilent Technologies, Inc.
    Inventors: Hugh S. Wallace, Adrian Wan-Chew Seet, Klaus-Dieter Hilliges
  • Patent number: 7564893
    Abstract: A test system is capable of performing parallel modulation error measurement of transceivers using a loop-back configuration. Each transceiver includes a transmitter and a receiver. A signal generator generates a first modulated signal for input to the receivers of the transceivers. A tester is operable to measure a first demodulation error produced by the receiver in response to the first modulated signal and to measure a modulation error of the transmitter based on the first demodulation error and a second demodulation error. The second demodulation error is produced by the receiver in response to a second modulated signal generated by the transmitter and coupled from the transmitter to the receiver.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: July 21, 2009
    Assignee: Agilent Technologies, Inc.
    Inventor: Peter Mark O'Neill
  • Patent number: 7564895
    Abstract: Method and apparatus for retrieving the channel frequency response H(f), the noise N(f), measured at initialization and the signal to noise ratio SNR(f) measured at show time on a per bin basis, in the upstream or downstream direction. Initialization H(f) is used for analyzing the physical copper loop condition between tip and ring. Initialization N(f) is used for analyzing the crosstalk. Showtime SNR(f) is used for analyzing time dependent changes in crosstalk levels and line attenuation. The combination of H(f), N(f) and SNR(f) allows analysis of the line conditions for reaching the maximum data rate of a given loop, scheduling maintenance and plant update.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 21, 2009
    Assignee: Nortel Networks Limited
    Inventors: Gin Liu, Andrew Dempster, Mike M. J. Wingrove, Gwendolyn Kate Harris, Michel M. Darveau, Leslie Humphrey, Mohammed Reza Pakravan
  • Patent number: 7564904
    Abstract: A novel mechanism for detecting the presence of powered devices over a network. A unique, infinite pseudo-random sequence of pulses are generated and transmitted over the network to the link partner attached to the other end of the cable. At each time unit, the PSE decides whether or not to transmit a pulse at that time. Thus, the pulses generated have pseudo-random inter-pulse delays between them. In addition, each pulse is pseudo-randomly selected to have either positive or negative polarity. If the link partner is a powered device it will be in loopback mode and the transmitted pulses will be looped back to the transmitter (i.e. the PSE). The PSE, at each time unit regardless of whether or not a pulse was transmitted, opens a search window in which it listens to the RX line for the appropriate expected behavior. If a pulse was transmitted, the PSE expects to see a pulse looped back. Similarly, if no pulse was transmitted, the PSE does not expect to receive a signal during the search window.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: July 21, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Ori Isachar, Pablo D. Cusnir, Nohik Semel, Daniel Sharon, Daniel Wajcer, Guy Millet
  • Publication number: 20090168856
    Abstract: A system and method for adaptive equalization of in-package signals. A method for operating a wireless communications device having a transmitter and a receiver includes receiving a transmitted signal at the receiver, wherein the receiving of the transmitted signal occurs by mutual inductance, converting the received transmitted signal into a baseband signal, equalizing the baseband signal, computing a correction signal from the equalized baseband signal, and providing the correction signal to the transmitter. The equalizing of the baseband signal helps to eliminate or reduce multipath arising from mutual inductance between the transmitter and the receiver. The elimination of the multipath helps to improve the quality of the correction signal, thereby helping to increase the performance of the wireless communications device.
    Type: Application
    Filed: February 12, 2008
    Publication date: July 2, 2009
    Inventor: Khurram Muhammad
  • Publication number: 20090161740
    Abstract: A transceiver includes a receiver unit including a clock and data recovery unit. The transceiver includes a transmitter unit and a digital core coupled to the receiver unit and the transmitter unit. A switch circuit is positioned after the clock and data recovery unit, and is configured to route data from the receiver unit to the transmitter unit in a test mode of the transceiver.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Inventor: Holger Wenske
  • Patent number: 7545866
    Abstract: A communications link is adapted based on a quality estimate for a signal transmitted via the communications link. The method comprises receiving and demodulating the transmitted signal, assessing the demodulated signal to derive a first estimate for the signal quality that is to be used in a link adaptation scheme, and further processing and decoding the demodulated signal. Based on at least one of the further processed, non-decoded signal and information obtained prior to conclusion of decoding, a first control signal indicative of the signal quality is generated and utilized to control the link adaptation scheme.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: June 9, 2009
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Hans Dieter Schotten, Matthias Schulist, Ralf Weber
  • Patent number: 7542514
    Abstract: The present invention discloses a method and device for adaptive modulation and coding based on second order statistics of channel information in OFDM system, characterized in that, by means of variance of Signal-to-Noise ratio (SNR) an appropriate adaptation time window is selected dynamically to trace time-varying channel better; and in that a decision criterion of second order, namely selecting an appropriate modulation and coding schemes (MCS) according to average value of SNR and variance of SNR, is employed to obtain accurate mapping from SNR to MCS. The mapping enhances practicability of the adaptive modulation and coding, decreases probability of system outage, and thus results in better performance of bit error rate.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: June 2, 2009
    Assignee: ALCATEL
    Inventors: Pengpeng Song, Liyu Cai, Yan Wan
  • Patent number: 7539461
    Abstract: A PDMA terminal establishes communication by forming a plurality of spatial paths to another single radio apparatus. A plurality of antennas constituting an array antenna are divided into a plurality of subarrays corresponding to the plurality of spatial paths respectively. An adaptive array processing unit can perform an adaptive array processing for each of the plurality of subarrays. A memory stores in advance information on the number of antennas associated with the number of spatial paths that can be formed by the array antenna. A control unit controls a processing to transmit possible multiplicity information to another radio apparatus at a prescribed timing.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: May 26, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yoshiharu Doi
  • Patent number: 7532665
    Abstract: A wireless communication apparatus for transmission/reception of a wireless communication signal, including first and second circuits that process a transmission/reception signal, an oscillator that generates a reception clock on a first circuit side, the reception clock being used for an operation reference, a first interface that supplies the reception clock from the first circuit to the second circuit, a second interface that supplies, to the first circuit, transmission data output from the second circuit synchronously with the reception clock supplied from the first circuit, and delay compensation that compensates for a delay between the reception clock and transmission data at the first circuit, the reception clock and transmission data being input via the second interface.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: May 12, 2009
    Assignee: Sony Corporation
    Inventors: Keiji Akiyama, Katsuyuki Tanaka, Masayuki Takada
  • Patent number: 7522672
    Abstract: The present invention provides a digital (computational) branch calibrator which uses a feedback signal sensed from an RF transmit signal path following the combining stage of LINC circuitry of a transmitter to compensate for gain and phase imbalances occurring between branch fragment signals leading to the combiner. The calibrator feeds a quiet (zero) base band signal through the transmit path during the calibration sequence (i.e. a period when data is not transmitted) and adjusts the phase and gain of the phasor fragment signals input thereto by driving the sensed output power to zero. The calibration is performed by alternating phase and gain adjustments with predetermined (programmable) and multiple update parameters stages (speeds). A baseband modulation is preferably used to distinguish false leakage (e.g. due to local oscillator, LO, feed through and DC offset in the base band Tx) from imbalance leakage.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: April 21, 2009
    Inventor: Aryan Saed
  • Patent number: 7493095
    Abstract: A device and a method for processing high data rate serial data includes circuitry for recovering a clock based on the high data rate input data stream. A transceiver includes a coarse loop of a phase-locked loop that selectively provides a clock having accuracy that is within a specified amount. In a sample mode of operation, only the coarse loop PLL is coupled to provide an error signal from which an oscillation signal and clock may be derived. In a second mode (lock) of operation, the transceiver may lock to the received serial data stream by coupling the fine loop PLL to provide an adjusted error signal. In a third mode of operation, (automatic) the transceiver initially performs coarse loop calibration by de-coupling the fine loop PLL and coupling the coarse loop PLL until a steady state has been reached.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: February 17, 2009
    Assignee: Xilinx, Inc.
    Inventors: Jerry Chuang, William C. Black, Scott A. Irwin
  • Publication number: 20090041101
    Abstract: A test apparatus includes a transmitting-side jitter measuring unit which measures a jitter of a transmission signal output from a transmitting circuit, a jitter applying unit which applies a jitter to the transmission signal and inputs the signal to a receiving circuit, a jitter range measuring unit which determines whether the logical value of the transmission signal detected by the receiving circuit is equal to a preset expectation value for each amplitude of the jitter applied to the transmission signal by the jitter applying unit, and measures the range of jitter amplitudes within which the logical value of the transmission signal is equal to the expectation value, and a jitter tolerance measuring unit which calculates jitter tolerance of the receiving circuit based on the jitter of the transmission signal measured by the transmitting-side jitter measuring unit and the range of jitter amplitudes measured by the jitter range measuring unit.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Applicant: ADVANTEST CORPORATION
    Inventor: KENICHI NAGATANI
  • Publication number: 20090041102
    Abstract: Provided is a jitter injection circuit that injects jitter having a predetermined amplitude to a transmission signal outputted from a transmission circuit, and inputs the resulting transmission signal to a reception circuit, the jitter injection circuit including: a retiming section that receives the transmission signal from the transmission circuit, and performs retiming on an edge timing of the received transmission signal in accordance with a given clock signal; and a jitter injection section that injects the jitter having the predetermined amplitude to the transmission signal outputted from the retiming section, and inputs the resulting transmission signal to the reception circuit.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Applicant: ADVANTEST CORPORATION
    Inventor: KENICHI NAGATANI
  • Publication number: 20090041150
    Abstract: A method includes broadcasting, at a transmitter, messages comprising antenna configuration, antenna spacing and a number of antenna of the transmitter and reference signals; generating, at a receiver, a codebook comprising a plurality of antenna beams based on the broadcasted messages; receiving, at the receiver, the broadcasted reference signals; selecting, at the receiver, an antenna beam among the plurality of antenna beams within the codebook in dependence upon a predetermined performance criteria of a data communication system and in dependence upon the broadcasted reference signals; feedbacking to the transmitter, at the receiver, information comprising the antenna beam selected by the receiver; optimizing, at the transmitter, a beamforming process by utilizing the feedback information from the receiver; transmitting, at the transmitter, data signals by utilizing the optimized beamforming process; and receiving and processing, at the receiver, the data signals in dependence upon the selected antenna be
    Type: Application
    Filed: April 25, 2008
    Publication date: February 12, 2009
    Inventors: Jiann-An Tsai, Cornelius Van Rensburg, Jianzhong Zhang
  • Patent number: 7489724
    Abstract: A system for controlling communications between a host and a target, the system having a data input for receiving a data signal, a clock input for receiving a clock signal, an oversampling circuit for sampling a received data signal and generating a control signal to control processing of the received data signal based at least in part on samples of the received data signal.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: February 10, 2009
    Assignee: STMicroelectronics Limited
    Inventor: Robert Geoffrey Warren
  • Patent number: 7486722
    Abstract: A MUD enabled cable modem that provides efficient use of cable television network bandwidth in the presence of interference and noise is disclosed. The modem design provides for compatibility with existing network hardware and protocols so that bandwidth efficient modems configured in accordance with the principles of the present invention may be added to the network without removing installed hardware and software. A bandwidth efficient modem in the cable network head-end increases reverse link capacity from the terminals to the head end, while bandwidth efficient modems in cable network terminals increases forward link capacity from the head end to the terminals. Bidirectional bandwidth efficiency is thereby enabled.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: February 3, 2009
    Assignee: Bae Systems Information and Electronic Systems Integration Inc.
    Inventors: Karl D Brommer, Edward D Russell
  • Publication number: 20090010317
    Abstract: According to one exemplary embodiment, a transceiver for nullification of a noise component in a transmitter comprises a noise nullification module loading a selected node in the transmitter. The noise nullification module comprises a mixer that receives inputs from the selected node and a local oscillator, where the mixer is also coupled to a filter such that the noise nullification module presents a low impedance at an approximate frequency of a noise component so as to nullify the noise component. In one embodiment, the noise nullification module results in band-pass filtering of an approximate receive signal frequency so as to nullify a noise component at the receive frequency. In another embodiment, the noise nullification module results in notch filtering of an approximate transmit signal frequency so as to nullify a noise component at a receive signal frequency.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 8, 2009
    Applicant: BROADCOM CORPORATION
    Inventors: Ahmad Mirzaei, Hooman Darabi
  • Patent number: 7472318
    Abstract: A method and system for evaluating performance of a device by on-chip determination of BER may include establishing and generating PRBS test packets in a closed communication path internally within a physical layer device (PLD) and a remote PLD. A BER for the PLD may be determined from within the PLD based on a comparison of at least a portion of the generated test packets with at least a portion of the generated test packets transmitted over the closed communication path received by the PLD via the closed communication path from the remote PLD. A transmit path of the PLD may be internally coupled to a receive path of the PLD, and a receive path of the PLD may be internally coupled to a transmit path of the PLD. The PLD may be internally configured to operate in an internal optical loopback mode or an internal electrical loopback mode.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: December 30, 2008
    Assignee: Broadcom Corporation
    Inventors: Nong Fan, Tuan Hoang, Hongtao Jiang
  • Patent number: 7444558
    Abstract: A serial point to point link that communicatively couples an integrated circuit (IC) device to another IC device is initialized by transferring a training sequence of symbols over the link. Registers of the IC device are programmed, to set a symbol data pattern and configure a lane transmitter for the link. A start bit in a register of the IC device is programmed, to request that the link be placed in a measurement mode. In this mode, the IC device instructs the other IC device to enter a loopback mode for the link. The IC device transmits a sequence of test symbols over the link and evaluates a loopback version of the sequence for errors. The sequence of test symbols have a data pattern, and are transmitted, as configured by the registers. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: October 28, 2008
    Assignee: Intel Corporation
    Inventors: Suneel G. Mitbander, Cass A. Blodgett, Andrew W. Martwick, Lyonel Renaud, Theodore Z. Schoenborn
  • Publication number: 20080259891
    Abstract: A multi-bit acknowledgement word (44) is prepared by a first communications station 22 (such as a base station) for separately acknowledging the success or failure of data packets received over plural communication channels (42) from respective plural second communication stations 28 (such as terminals). The acknowledgement word (44) is a “joint” or “common” acknowledgement word in the sense that one and the same acknowledgement word provides acknowledgement information for data packets received from plural second communication stations. Either separately or in conjunction with the joint acknowledgement word, a terminal checking code (62) can be employed for determining whether a packet is received on a both in a correct channel and from a correct terminal. The terminal checking code (62) comprise a cyclic redundancy check code formed over data bits (66) of the data packet and a terminal identifier (68) of the terminal (28).
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Inventor: Paul W. Dent
  • Publication number: 20080240209
    Abstract: A communications system including: a plurality of sub-surface portable transceivers each including: a digital data source, a modulator coupled to the digital data source, a power amplifier coupled to the modulator and a loop antenna inductively coupled to the power amplifier; and a base transceiver including: an electrically insulated ferrite core antenna for receiving magnetic signals, an electric di-pole antenna for receiving ambient noise, a noise canceller coupled to the insulated ferrite core antenna and electric dipole antenna and responsive to the electric-dipole antenna to filter noise from signals received via the insulated ferrite core antenna, a demodulator coupled to the noise canceller and a decoder coupled to the demodulator.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 2, 2008
    Inventor: David O. Levan
  • Publication number: 20080240212
    Abstract: A transmitter/receiver device includes: a transmitter unit including a parallel/serial converting circuit, a waveform deteriorating circuit, and a transmitter circuit; and a receiver unit including a receiver circuit, a serial/parallel converting circuit, and an error detecting circuit. The parallel/serial converting circuit converts a transmitter-side parallel signal to a transmitter-side serial signal. The waveform deteriorating circuit deteriorates a signal waveform of the transmitter-side serial signal. The transmitter circuit transmits to the receiver unit the signal whose waveform is deteriorated. The receiver circuit receives, as a receiver-side serial signal, the signal transmitted from the transmitter circuit. The serial/parallel converting circuit converts the receiver-side serial signal to a receiver-side parallel signal. The error detecting circuit detects a bit error rate of the receiver-side parallel signal.
    Type: Application
    Filed: September 26, 2007
    Publication date: October 2, 2008
    Inventor: Tsutomu Satou
  • Patent number: 7426235
    Abstract: Circuitry for equalizing a high data rate serial data stream that receives low frequency and high frequency test tones, accurately measures an amount of attenuation experienced by the high frequency test tone in relation to the low frequency test tone, and accordingly, produces equalization data that results in a corresponding amount of equalization or pre-emphasis being added to an outgoing signal. More specifically, however, the present invention includes both open loop and closed loop systems for equalizing or adding pre-emphasis to a signal with attenuation. In the open loop transceiver system, a presumption is made that an amount of attenuation in both the outgoing and ingoing directions are equal. In the closed loop transceiver system, a receiver determines an amount of equalization and produces the equalization data to a remote transceiver.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: September 16, 2008
    Assignee: Xilinx, Inc.
    Inventors: Stephen D. Anderson, David E. Tetzlaff, Michael J. Gaboury, Matthew L. Bibee
  • Patent number: 7426599
    Abstract: Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Additionally, a communications infrastructure may be established across multiple circuit cards.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: September 16, 2008
    Assignee: L-3 Communications Integrated Systems L.P.
    Inventors: Jerry W. Yancey, Yea Z. Kuo
  • Publication number: 20080219334
    Abstract: In one embodiment, a method includes receiving, from a decoder connected to a wireless receiver for communication with a remote apparatus, first error data that indicates a current error rate that corresponds to a first inbound data packet received from the remote apparatus. Based in part on the first error data, it is determined whether the remote apparatus should increase a current signal to noise ratio. If so, then a first outbound data packet is sent to an encoder connected to a wireless transmitter. The first outbound data packet includes first link conditioning request data that indicates a current signal to noise ratio for one or more data packets received from the remote apparatus based at least in part on the first error data. The remote apparatus increases signal to noise ratio of transmissions in response to receiving the outbound data packet.
    Type: Application
    Filed: March 5, 2007
    Publication date: September 11, 2008
    Inventors: Alain Brainos, David Buster, Christopher James Lefelhocz
  • Publication number: 20080205498
    Abstract: A method is provided for edge formation of signals and transmitter/receiver component for a bus system. A transmitter/receiver component for a bus system comprises a driver transistor, which is to be looped between a bus line of the bus system and a reference potential and is used to output signals on the bus line, a control unit for the driver transistor, a high-frequency interference detector, which is configured in such a way that it detects a high-frequency interference level on the bus line of the bus system, whereby the control unit is configured in such a way that it controls the driver transistor, depending on the detected high-frequency interference level, in such a way that an edge steepness of the output signals increases when the high-frequency interference level on the bus line increases, and an edge steepness of the output signals decreases when the high-frequency interference level on the bus line decreases.
    Type: Application
    Filed: December 4, 2007
    Publication date: August 28, 2008
    Inventors: Fred Liebermann, Axel Pannwitz
  • Publication number: 20080195920
    Abstract: A digital interface (22) includes a self-test structure (56). The structure (56) includes a transmit section (52) and a receive section (36) having a correlator (68). A method (114) of testing the interface (22) entails coupling the receive section (36) with the transmit section (52) and communicating a test data structure (86) from the transmit section (52) to the receive section (36) at a high data rate. The test data structure (86) includes a pre-defined sync pattern (88), a header (90), and a payload (92). The receive section (36) detects the sync pattern (88) and performs time frame synchronization (148) at the correlator (68). When synchronization (148) is successful, the receive section (36) decodes (154, 162) the header (90) and the payload (92). If time frame synchronization (148) and decoding (154, 162) are successful, a validation indicator (100) is output for external observation at a low data rate.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 14, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lawrence B. Luce, Paul Kelleher, Diarmuid McSwiney
  • Publication number: 20080165836
    Abstract: Aspects of a method and system for controlling and regulating services and resources in high-performance downlink channels may include receiving, at a second communication device, from a first communication device, one or more process data packets. For one or more feedback classes, at least one feedback message may be generated from the one or more process data packets associated with a process that may be associated with the one or more feedback classes. One or more feedback messages may be generated from the at least one generated feedback message and transmitted from the second communication device to the first communication device.
    Type: Application
    Filed: August 15, 2007
    Publication date: July 10, 2008
    Inventors: Uri Landau, Mark Kent
  • Patent number: 7385959
    Abstract: A wireless data communications device having a corresponding method and computer program comprises a Multiple Input, Multiple Output (MIMO) transceiver to communicate on an Orthogonal Frequency Division Modulation (OFDM) channel; a measurement circuit having an active state and an inactive state, wherein the measurement circuit measures a channel condition of the OFDM channel in the active state; and a controller to place the measurement circuit in the active state after a request for the channel condition is received on the OFDM channel, and to place the measurement circuit in the inactive state after the measurement circuit measures the channel condition of the OFDM channel and until a further request for the channel condition is received on the OFDM channel.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: June 10, 2008
    Assignee: Marvell International Ltd.
    Inventor: Peter Loc
  • Patent number: 7379494
    Abstract: Method and apparatus for combining high data rate traffic and low data rate traffic on a common transmission medium while maximizing efficient use of available spectrum. Since spectrum is an economically valuable resource and transport of data generates revenue, the present invention directly leads to more profitable network operation. The disclosed systems are applicable to both wired and wireless transmission media. In one embodiment, a bandwidth reservation scheme provides that data rate may be varied so that when a particular data communication device is allocated a frame, it is also assigned a data rate for use in that frame. Because bandwidth usage varies with data rate, the division of available spectrum into channels for use by individual data communication devices may also vary among frames.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: May 27, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Gregory G. Raleigh, Vincent K. Jones, IV, Michael A. Pollack
  • Patent number: 7362826
    Abstract: A receiver circuit includes an oscillator circuit configured to generate a calibration tone and a phase locked loop (PLL) reference signal. An output frequency of the VCO may be divided by respective amounts to derive a desired calibration tone frequency and a desired PLL reference signal frequency. In addition to the oscillator circuit, the receiver circuit may further include a phase locked circuit configured to generate a PLL output signal that is phase locked in relation to the PLL reference signal. During a calibration mode, a quadrature generator may be used to generate quadrature mixer local oscillator signals dependent upon the PLL output signal, and an in-phase/quadrature mixer may be used to mix the calibration tone with the quadrature mixer LO signals.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: April 22, 2008
    Assignee: Silicon Laboratories, Inc.
    Inventor: Scott D. Willingham
  • Publication number: 20080089398
    Abstract: In one aspect, the invention is a method that includes transferring data at an initial mode from a transmitter to a receiver, determining a suggested mode based on the data transferred and determining a count of the data transferred from the transmitter to the receiver. The method also includes transferring the suggested mode and the count to the transmitter and determining a pending mode based on the suggested mode and the count.
    Type: Application
    Filed: October 12, 2006
    Publication date: April 17, 2008
    Inventors: Daniel R. Cormier, Peter Do, Alan V. Ly
  • Patent number: 7360127
    Abstract: A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive circuit. A similar pattern of information is generated in the receive circuit and used as a reference. The receive circuit compares the patterns. Any differences between the patterns are observable. In one embodiment, a linear feedback shift register (LFSR) is implemented to produce patterns. An embodiment of the present disclosure may be practiced with various types of signaling systems, including those with single-ended signals and those with differential signals. An embodiment of the present disclosure may be applied to systems communicating a single bit of information on a single conductor at a given time and to systems communicating multiple bits of information on a single conductor simultaneously.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: April 15, 2008
    Assignee: Rambus Inc.
    Inventors: Jared Zerbe, Pak Shing Chau, William Franklin Stonecypher
  • Patent number: 7343431
    Abstract: Methods, systems, apparatus, and computer-readable media are provided for disabling a BIOS-provided console redirection facility in the presence of an incompatible device. According to the method, a determination is made as to whether a port has been enabled for utilization with a BIOS-provided console redirection facility. If it is determined that a communications port has been enabled for console redirection, the BIOS is operative to determine whether a device is connected to the communications port that is incompatible with the console redirection facility. If an incompatible device is detected, the BIOS will disable the console redirection facility. Otherwise, the BIOS-provided console redirection facility is enabled for operation.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: March 11, 2008
    Assignee: American Megatrends, Inc.
    Inventor: Sivaprasath Swaminathan
  • Patent number: 7330502
    Abstract: An input/output circuit includes a reference clock generator configured to generate a reference clock. A signal transmitter is configured to transmit serial data in synchronization with one of the reference clock and a test clock. A signal-receiving circuit is configured to receive the serial data, and to generate a converted signal from the serial data. A test circuit is configured to detect an error between each phase of the converted signal and the test clock when the signal transmitter operates in synchronization with the test clock.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: February 12, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Hotta
  • Publication number: 20080031311
    Abstract: This algorithm and apparatus provides the ability to determine the amount of skew that should be injected into a high-speed data communications system comprising of a plurality of lanes comprising a data bus on a per lane basis, relative to a reference lane, for the purpose of compensating for inherent system skew. By knowing the relative amount of skew that each lane requires for alignment, an appropriate amount of skew can then be injected on each lane to provide alignment and thus compliancy with relevant standards, such as the SxI-5 standard, in terms of data skew specifications. These relative skew amounts for each transmitting lane are determined using dual loopback methods.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Inventors: Wally Haas, Mutema Pittman, Chuck Rumbolt
  • Publication number: 20080031312
    Abstract: This algorithm and apparatus provides the ability to deskew a plurality of lanes comprising a data bus in a high-speed data communications system. This deskewing is necessary due to inherent system skew. By iterating through the possible intervals within the maximum expected skew search space, the correct combination of search space intervals for all lanes can be determined to provide alignment and thus compliancy with relevant standards, such as the SxI-5 standard, in terms of data skew specifications.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Inventors: Wally Haas, Mutema Pittman, Chuck Rumbolt
  • Patent number: 7321614
    Abstract: Apparatus and methods for selecting a transmit power level and subcarrier modulation assignments based on measured channel conditions to achieve a performance level for communications over a symbol-modulated subcarrier communication channel are provided. In some embodiments, the transmit power level may be changed depending on whether a desired packet error rate and/or a desired link data rate can be achieved based on selected subcarrier modulation assignments and a selected transmit power level.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: January 22, 2008
    Assignee: Intel Corporation
    Inventors: Eric A. Jacobsen, Adrian P Stephens
  • Patent number: 7321616
    Abstract: A method and apparatus for reducing processing requirements of a pool of soft modems is disclosed. In one embodiment, the method comprises queuing one or more retrain requests and responding to the queued retrain requests within a period of time to one or more modems that correspond to the queued retrain requests.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: January 22, 2008
    Assignee: Intel Corporation
    Inventor: Robert David Wachel
  • Publication number: 20080013609
    Abstract: Any number of transceiver channels is tested for jitter generation/tolerance simultaneously. Tested channels use a serial loopback path to connect a transceiver transmit channel to a transceiver receiver channel. Both the transmitter and receiver PLLs are connected to a common reference clock. The reference clock is modulated with jitter at a frequency below the bandwidth of the transmitter PLL but above the bandwidth of the receiver PLL. The magnitude of eye closure (in an eye diagram), which is equivalent to the amplitude of the jitter, is used to filter out bad transceiver units.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 17, 2008
    Applicant: Altera Corporation
    Inventors: Kenneth T. Daxer, Sergey Shumarayev
  • Patent number: 7319716
    Abstract: In a transceiver comprising a time-division-duplex (TDD) of transmit and receive functions, the characteristics of unwanted image signal energy being transmitted from the transceiver are determined, and thereafter feedback is provided to the transmitter to reduce this unwanted image signal energy. The image signal energy is measured by the receiver component of the transceiver and fed back to the transmitter component of the transceiver. The transmitter component uses the fed back information to adjust the gain and or phase relationship between the quadrature signals that are subsequently quadrature-phase modulated and transmitted. A variety of techniques can be employed to allow the image signal energy to be measured directly by the receiver component. The phase modulation signals at the transmitter can be interchanged, so that the unwanted image signal energy is transmitted in the sideband of the intended signal.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: January 15, 2008
    Assignee: NXP B.V.
    Inventor: Rishi Mohindra
  • Patent number: 7295618
    Abstract: A data communication system includes a transmitter unit and a receiver unit. The transmission unit has a transmission characteristic that is adjustable in accordance with equalization information. The transmission unit is operable to transmit a predetermined signal and the receiver unit is operable to receive the predetermined signal. The receiver unit is further operable to generate the equalization information by examining the eye opening of the received signal, and to transmit the equalization information to the transmitter unit.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: November 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Karl D. Selander, Michael A. Sorna, Jeremy K. Stephens, Huihao Xu
  • Patent number: 7277477
    Abstract: A method and system that communicates adaptive transmit-side filter updates between a receiver and transmitter inserts additional versions of control codes into a back channel for encoding updates. Since the control codes are required in the back channel, no additional bandwidth of the back channel is used to communicate the updates.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: October 2, 2007
    Assignee: Cisco Technology, Inc.
    Inventor: Bilal Ahmad
  • Patent number: 7277492
    Abstract: Radio resources are saved. The base station 101 determines a possibility of transmitting data to the terminal 102, and transmits the indicator indicating the possibility of transmitting the data to the terminal 102. The terminal 102 generates a mode request message for determining a coding rate and a modulation system at the base station 101, and sets a transmission frequency of the mode request message based on the indicator transmitted from the base station 101. Accordingly, the mode request message is transmitted from the terminal 102 to the base station 101 at the determined transmission frequency.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: October 2, 2007
    Assignee: Sony Corporation
    Inventor: Katsutoshi Itoh
  • Patent number: 7277512
    Abstract: A device that transmits data using discrete multitone modulation includes a memory that stores intercarrier interference (ICI) information for each of the tones used to transmit data. The device also includes logic that receives signals transmitted from another device, estimates a noise value for each tone and adds the estimated noise to the ICI information to determine an effective noise value. The effective noise value may then be used to generate an effective signal-to-noise ratio (SNR). The effective SNR may then be used by a loading controller to determine bit loading information for each tone. The bit loading information may be transmitted to the other device, which may then use this information to identify the appropriate number of bits to load in each tone when transmitting data.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: October 2, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Maged F. Barsoum
  • Patent number: 7272756
    Abstract: Communications equipment can be tested using a test pattern that is modified compared to, and more exploitive than, a standard test pattern. Test patterns can be employed that have lengthened or shortened consecutive identical digit (CID) portions, or that have lengthened or shortened pseudo random bit sequence (PRBS) portions. In some cases, PRBS polynomials are not re-seeded after each CID. Further, different order polynomials can be employed for different applications. Exemplary applications can include test equipment and built-in self-test capability for integrated circuits.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: September 18, 2007
    Assignee: Agere Systems Inc.
    Inventors: Robert D. Brink, James Walter Hofmann, Jr., Max J. Olsen, Gary E. Schiessler, Lane A. Smith
  • Publication number: 20070189371
    Abstract: A quadrature modulation transceiver is capable of receiving an in-phase component and a quadrature-phase component corresponding to an input signal, and generating a transmitting signal by up-converting the in-phase component and the quadrature-phase component according to an in-phase transmitting carrier and a quadrature-phase transmitting carrier respectively. The quadrature modulation transceiver then adjusts the transmitting signal using a loopback parameter to generate a loopback signal. Next, the quadrature modulation transceiver down-converts the loopback signal to generate a receiving signal according to an in-phase receiving carrier and a quadrature-phase receiving carrier. Finally, the quadrature modulation transceiver computes calibration parameters of IQ imbalance for the transceiver calibration.
    Type: Application
    Filed: February 9, 2007
    Publication date: August 16, 2007
    Inventor: Shin-Chieh Yen
  • Patent number: 7236778
    Abstract: A method includes communicating a first signal at a transmitter. The first signal has a first frequency. The method also includes receiving a second signal at a receiver. The second signal has a second frequency, and the second signal comprises the first signal converted from the first frequency to the second frequency. In addition, the method includes determining whether the transmitter and receiver are functional using at least one of the first and second signals.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: June 26, 2007
    Assignee: Northrop Grumman Corporation
    Inventor: Heinz H. Schreiber