Abstract: A radio receiver for receiving a selected digital HDTV signal, irrespective of whether it is a complex-amplitude-modulation (QAM) or a vestigial sideband (VSB) signal, using the same tuner. The tuner supplies a final IF signal in a 6 MHz frequency band, the lowest frequency of which is not appreciably more than 2.38 MHz. The final IF signal is digitized for synchrodyning to baseband, with the 2.375 MHz difference between the carrier frequencies of QAM and VSB signals being taken into account in the digital synchrodyning circuitry. The carrier frequencies of the QAM and VSB final IF signals are regulated to be submultiples of symbol frequency by applying automatic frequency and phase control signals developed in the digital circuitry to a local oscillator of the tuner. The presence of the pilot carrier accompanying a selected VSB HDTV signal is detected for automatically switching the radio receiver for operation in a VSB signal reception mode.

Abstract: A channel estimation value of each path timing is determined, a path timing, the channel estimation value of which is to be set to zero, is determined based on a reception power of each path timing and a predetermined power threshold (P0), and a channel estimation value of the detected path timing to zero.

Abstract: The present invention relates to an apparatus and a method for receiving data using a low-density parity check (LDPC) decoding scheme in a digital broadcasting system. The method comprises calculating a parity check matrix of a trellis coded modulation symbol from data that is received via an antenna; transforming the calculated parity check matrix into a low-density parity check matrix; decoding the data having been received via the antenna, based on the transformed low-density parity check matrix; and recovering the data having been received via the antenna.

Abstract: An adaptive equalizer includes: an adaptive filter; and a control unit. The adaptive filter performs an adaptive equalization processing for an input signal modulated by a modulation method that produces a modulation signal with constant amplitude characteristics so as to make an amplitude of an equalized output signal constant. The control unit controls stop and execution of the adaptive equalization processing of the adaptive filter in accordance with characteristics of at least one of the input signal and the output signal.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

Abstract: The present invention relates to a receiver apparatus and method of channel estimation in a telecommunication system which provides at least two pilot sequences, and to a computer program product. Channel estimation is achieved by estimating channel taps separately for each of the at least two pilot sequences in every transmission block, and for applying estimated channel taps obtained from the estimation to at least one of a temporal and spatial filtering or combining operation to refine the channel estimate. Accordingly, temporal correlations and cross-correlations of the at least two pilot sequences are exploited without requiring knowledge of path delays and beamforming parameters.

Abstract: An apparatus is disclosed, the apparatus comprising: a broad-band continuous-time adjustable weight summing cell for summing an input signal and a feedback signal into an intermediate signal in accordance with a weight factor for the feedback signal; a broad-band continuous-time delay cell for receiving the intermediate signal and outputting the feedback signal; a broad-band variable gain amplifier for amplifying the feedback signal into an output signal in accordance with a gain factor; and an adaptation circuit for adjusting the weight and the gain factor in accordance with the output signal and a timing defined by a clock signal so as to minimize an interference form a previous data to a present data embedded in the output signal.

Abstract: A technique for determining a frequency offset between components of a communication network based on a Constant Amplitude Zero Auto-Correlation (CAZAC) sequence is described. A method implementation of this technique comprises a provision of a set of correlation signals at different frequencies, with each correlation signal being indicative of a specific frequency offset hypothesis and comprising the CAZAC sequence. Once a synchronization signal comprising the CAZAC sequence is received, this synchronization signal is correlated with each of the correlation signals to obtain a correlation result for each frequency offset hypothesis. In a next step, at least one of the frequency offset hypotheses is selected based on a comparison of the correlation results. The frequency offset may then be determined based on the at least one selected frequency offset hypothesis.

Abstract: A wireless receiver is constructed to equalize a time-domain received signal, detect a plurality of symbols of the equalized time-domain received signal, and perform interference cancellation on the time-domain received signal. The interference cancellation can be performed using a partial result produced by an IDFT, and may use only neighboring symbols in a detected plurality of symbols. The resulting wireless receiver can be constructed to operate efficiently under a plurality of wireless standards.

Abstract: The present invention relates a system and method for mitigating impairment in a communication system. In one embodiment, the system comprises a transmitter adapted to transmit at least one signal and a receiver adapted to receive the at least one signal and mitigate inter code interference in the signal using at least one inter code interference coefficient.

Abstract: A method includes broadcasting, at a transmitter, messages comprising antenna configuration, antenna spacing and a number of antenna of the transmitter and reference signals; generating, at a receiver, a codebook comprising a plurality of antenna beams based on the broadcasted messages; receiving, at the receiver, the broadcasted reference signals; selecting, at the receiver, an antenna beam among the plurality of antenna beams within the codebook in dependence upon a predetermined performance criteria of a data communication system and in dependence upon the broadcasted reference signals; feedbacking to the transmitter, at the receiver, information comprising the antenna beam selected by the receiver; optimizing, at the transmitter, a beamforming process by utilizing the feedback information from the receiver; transmitting, at the transmitter, data signals by utilizing the optimized beamforming process; and receiving and processing, at the receiver, the data signals in dependence upon the selected antenna be

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

Abstract: Embodiments of a method and apparatus of reducing transmit signal components of a receive signal of a transceiver are disclosed. One embodiment of an apparatus includes a transceiver that simultaneously transmits a transmit signal and receives a receive signal. The transceiver includes a transmit DAC that generates the transmit signal based on a transmit digital signal stream. The transmit DAC includes a plurality of transmit DAC circuit elements, and a plurality of transmit DAC switches that control which of the plurality of transmit DAC circuit elements contribute to generating the transmit signal. The transceiver additionally includes an echo cancellation DAC that generates an echo cancellation signal based on the transmit digital signal stream.

Abstract: Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value.

Abstract: Methods and systems are described for processing a signal in wireless communications. The signal may have synchronization information. A method of processing a signal having synchronization information may include receiving the signal, and determining a truncation region of the time domain estimated channel, the estimated channel having taps. The method further includes processing the channel taps within the truncation region.

Abstract: A base station 20 monitors change of a parameter for an adaptive array antenna, the parameter being used to control a directivity of a beam to be transmitted to a mobile terminal device 30. As a result, when detecting that a value indicating the change has fallen below a predetermined value, the base station 20 suppresses control of the directivity of a transmission signal. Moreover, the base station 20 transmits decrease information to the mobile terminal device 30, the decrease information indicating that the value indicating the change has fallen below the predetermined value. Upon receipt of the decrease information transmitted from the base station 20, the mobile terminal device 30 equalizes a signal to be transmitted to the base station 20 on the basis of a delay status of a reception signal received from the base station 20, and then transmits the equalized signal to the base station 20.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

Abstract: An adaptive equalizer for high-speed serial data comprises a programmable equalizer for equalizing an input serial data signal to generate an equalized serial data signal, wherein the equalization is based on an optimal equalization mode; a signal quality meter for computing an eye width indication based on the equalized serial data signal, wherein the eye width indication is an indicative of the quality of the equalized serial data signal; and a decision unit for determining the optimal equalization mode based on the eye width indication.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

Abstract: A method and apparatus for reducing the processing rate when performing chip-level equalization (CLE) in a code division multiple access (CDMA) receiver which includes an equalizer filter. Signals received by at least one antenna of the receiver are sampled at M times the chip rate. Each sample stream is split into M sample data streams at the chip rate. Multipath combining is preferably performed on each split sample data stream. The sample data streams are then combined into one combined sample data stream at the chip rate. The equalizer filter performs equalization on the combined sample stream at the chip rate. Filter coefficients are adjusted by adding a correction term to the filter coefficients utilized by the equalizer filter for a previous iteration.

Abstract: The system and method disclosed herein provide for closed-loop compensation of significant amplitude versus frequency group delay distortion that may be introduced into a satellite communication system signal by the uplink equipment and a satellite repeater equipment. One or more equalizers can be configured to automatically assess distortion at the downlink receiver, automatically calculate the necessary pre-distortion coefficients and provide them to a modulator that pre-distorts the uplink signal to thereby cancel the distortion.

Abstract: A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal.

Abstract: A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.

Abstract: A device that detects an effect which distorts a communication signal in a serial communication channel comprises an input, a detector connected to the input, a demultiplexer having a data input connected to the output of the detector, and an evaluator at each output of the demultiplexer. The input receives the distorted communication signal from the communication channel. The detector detects a feature in a symbol of the distorted communication signal and outputs the detected feature. The demultiplexer outputs the detected feature and has a plurality of control inputs. A differently delayed symbol (i?1, 1, i+1) of the communication signal is applied to each input to switch the detected feature present at the input of the demultiplexer to an output of the demultiplexer specified by the symbols present at the control inputs.

Abstract: A receiver and associated method estimates a channel impulse response of the communications signal. A communications signal is received as a burst of transmitted symbols, including a known training sequence. The joint estimation of timing offset and initial channel impulse response is determined based on the cross-correlations of the known transmitted symbols and received communications signal. A constant modulus interference removal iteration is applied to improve the initial channel impulse estimation.

Abstract: Equalizer circuitry on an integrated circuit (“IC”) includes a plurality of NMOS equalizer stages connected in series. Each NMOS stage may include folded active inductor circuitry. Each NMOS stage may also include various circuit elements having controllably variable circuit parameters so that the equalizer can be controllably adapted to perform for any of a wide range of high-speed serial data signal bit rates and other variations of communication protocols and/or communication conditions. For example, each NMOS stage may be programmable to control at least one of bandwidth and power consumption of the equalizer circuitry. The equalizer may also have a first PMOS stage that can be used instead of the first NMOS stage in cases in which the voltage of the incoming signal to be equalized is too low for an initial NMOS stage.

Abstract: Methods and systems for minimizing distortions in an analog data signal include equalizing the analog data signal at a receive end. In an embodiment, the invention adapts equalization parameters to a signal path associated with the analog data signal. Adaptive control logic is implemented with analog and/or digital components. In an embodiment, the invention equalizes a discrete-time analog representation of an analog data signal. In an embodiment, the invention digitally controls equalization parameters. In an embodiment, a resultant equalized analog data signal is digitized. In an example implementation, an analog data signal is sampled, a quality of the samples is measured, and one or more equalization parameters are adjusted with digital controls as needed to minimize distortion of the samples. The equalized samples are then digitized. The present invention is suitable for lower rate analog data signals and multi-gigabit data rate analog signals.

Abstract: A system for filtering a data signal includes an input configured to receive the data signal through a transmission medium and a filter configured to remove distortion from the received data signal using equalization coefficients. The system further includes a processing unit configured to determine dynamically the equalization coefficients of the filter without using a predetermined training pattern in the received data signal.

Abstract: A method for deriving interference signals from modulated, digital signals is provided. The receiver end reconstructs the modulated digital signals sent by a transmitter. These reconstructed modulated digital signals are then subtracted from the received modulated digital signals, and the result of the subtraction is used to estimate the interference signals without influence by prior filtering at the receiver end. By way of example, it is possible to demodulate the interference signals estimated at the receiver end in order to ascertain possible unauthorized carrier frequencies which disturb the regular carrier frequencies, even if the interference signals are not completely in the bandwidth of the regular carrier frequency or carrier frequencies.

Abstract: A method and apparatus are provided for determining a plurality of filter tap weights or biases (or both) for a noise predictive filter used to generate one or more signal dependent branch metrics. A filter tap weight or filter bias (or both) are adaptively accumulated for each possible data condition. The data conditions may comprise, for example, each possible data pattern for a given data dependency length. The appropriate accumulated filter tap weight or bias to update can be selected based on a data condition associated with the current received data. The filter tap weights associated with a delay 0 tap can be adapted for each filter condition except for a single normalizing condition, whose corresponding delay 0 tap remains fixed.

Abstract: Embodiments of the present invention disclose an electronic equalization and electronic depolarization method, a receiving end equipment, and a communication system. According to the embodiments of the present invention, parameters required by electronic equalization and electronic depolarization are calculated by detecting a Synchronization Sequence (SS) in a received signal, and then the electronic equalization and the electronic depolarization are performed on the received signal in a frequency domain by utilizing the parameters, so as to solve a problem of the electronic equalization and the electronic depolarization in a Polarization Division Multiplexing (PDM) Orthogonal Frequency Division Multiplexing (OFDM) system. Furthermore, the realization complexity of the electronic equalization and the electronic depolarization performed in the frequency domain is greatly reduced relative to the electronic equalization and the electronic depolarization performed in a time domain.

Abstract: The invention discloses a double-estimation channel estimator for calculating a plurality of accurate channel responses from a plurality of synchronization signals. The channel estimator includes a first channel estimator, a second channel estimator, a first equalizer, and a calculation module. The first channel estimator calculates first channel responses according to a plurality of pilot signals and the synchronization signals. The first equalizer calculates first equalization signals according to the first channel responses and the synchronization signals. The second channel estimator calculates second responses according to the first equalization signals and the synchronization signals. Then the calculation module calculates third channel responses according to the first channel responses and the second channel responses.

Abstract: A system and methods for recovering data from an input data signal are disclosed. The system includes a transmitter for conveying a data signal filtered by a finite impulse response (FIR) filter to a receiver via a channel. The receiver uses an adaptive algorithm to determine update signals for a pre-cursor tap coefficient of the FIR based on samples taken from the received data signal and conveys the update signals to the FIR. To generate update signals, the receiver samples the data signal at a phase estimated to correspond to a peak amplitude of a pulse response of the channel. The phase is based on a clock recovered from the data signal. The update signals increase or decrease a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point earlier or later, respectively, than the peak amplitude of the channel's pulse response.

Abstract: An equalization device (500) includes a sample hold unit (501) that samples and holds an input signal, a multiplication unit (503) that multiplies the output signal of the sample hold unit (501) by a coefficient, a sample hold unit (502) that samples and holds the input signal at a timing delayed from the sample hold timing of the sample hold unit (501) by one symbol length, a multiplication unit (504) that multiplies the output signal of the sample hold unit (502) by a coefficient, and an addition unit (505) that adds the output signal of the multiplication unit (503) and the output signal of the multiplication unit (504) to output a sum signal.

Abstract: In accordance with the present invention, novel methods for adaptive receiver design and related parameter estimation techniques for efficient and non-coherent reception of ultrawideband signals are presented. Efficient estimation of maximum excess delay of the channel for enabling many useful adaptation techniques is additionally provided. Also, noise power estimation which significantly improves the performance of the receivers is presented.

Abstract: A redriver chip is inserted between a transmitter chip and a receiver chip and re-drives differential signals from the transmitter chip to the receiver chip. The redriver chip has switched output termination that switches to a high value to detect far-end termination at the receiver chip, and to a low value for signaling. An output detector detects when the receiver chip has termination to ground and enables switched input termination to provide termination to ground on the lines back to the transmitter chip so that the far-end termination on the receiver chip is mirrored back to the transmitter chip, hiding the redriver chip. An input signal detector detects when the transmitter chip begins signaling and enables an equalizer, limiter, pre-driver, and output stage to re-drive the signals to the receiver chip. The input signal detector also causes the switched output termination to switch to the low value termination for signaling.

Abstract: Methods and apparatus to provide an equalizer for analog adaptive control are disclosed. An example equalizer described herein includes a high frequency amplifier to receive an input signal and to amplify a high frequency portion of the input signal, a low frequency amplifier to receive the input signal and to amplify a low frequency portion of the input signal, and a weight factor controller to control a gain of the high frequency amplifier and a gain of the low frequency amplifier.

Abstract: A normalized least means square (NLMS) equalizer including two equalizer filters is disclosed. In one embodiment, a single correction term generator is used to generate correction terms for tap coefficient updates of each of the equalizer filters based on a pilot signal. In another embodiment, two different correction term generators are used to generate correction terms for each of the equalizer filters, whereby one of the correction term generators uses data received from a hard decision unit at the output of one of the equalizer filters to generate correction terms for both of the equalizer filters.

Abstract: An arrangement is disclosed for offset compensation of a time-interleaved analog-to-digital converter, having a plurality of computing channels and being adapted to convert a signal from an analog domain to a digital domain. The arrangement comprises the time-interleaved analog-to-digital converter, an analog offset estimation and compensation unit adapted to estimate a mean offset for the plurality of computing channels, a digital offset estimation and compensation unit adapted to estimate a residual computing channel specific offset for each of the plurality of computing channels, and offset compensation means. The offset compensation means are adapted to perform offset compensation in the analog domain of each of the plurality of channels based on the estimated mean offset in the analog domain, and to perform offset compensation in the digital domain of each of the plurality of channels based on respective residual computing channel specific offset.

Abstract: Adaptation convergence in an adaptive dispersion compensation engine (ADCE) of a high-speed serial interface is detected by monitoring the output of the error amplifier of one or more adjustment loops of the ADCE. Adaptation convergence is considered to have been detected upon detection of a predetermined number of transitions in the error amplifier output, each of which occurs within a preselected interval following the previous transition. The detector may be implemented with a timer that times the preselected interval and a counter that counts transitions in the error amplifier output. The timer restarts each time a transition occurs, and the counter outputs a convergence signal when it reaches the predetermined number, but is reset each time the timer reaches the preselected interval. The serial interface may be part of a programmable integrated circuit device and in any case the preselected interval and the predetermined number may be programmable.

Abstract: Equalization of an incoming data signal can be controlled by sampling that signal at times when data values in that signal should be stable (“data samples”) and when that signal should be in transition between successive data values that are different (“transition samples”). A transition sample that has been taken between two successive differently valued data samples is compared to a reference value (which can be one of those two data samples). The result of this comparison can be used as part of a determination as to whether to increase or decrease equalization of the incoming data signal.

Abstract: Systems and techniques for adapting and/or optimizing an equalizer of a receiver are described. The equalizer's behavior can be adjusted by modifying one or more equalization parameters. At the beginning of the adaptation and/or optimization process, the system can determine robust initial values for the one or more equalization parameters. The system can then adapt and/or optimize the equalizer by iteratively adjusting the one or more equalization parameters. Specifically, in each iteration, the system can use the receiver's clock and data recovery (CDR) circuitry to determine the number of early and late data transitions associated with one or more data patterns. Next, the system can adjust the one or more equalization parameters so that, for each data pattern in the one or more data patterns, the ratio between the number of early data transitions and the number of late data transitions is substantially equal to a desired value.

Abstract: Systems and methods for performing channel equalization in a communication system are presented. More particularly, embodiments of the disclosed method and apparatus are directed toward systems and methods for performing channel equalization in an OFDM system. One example of a method of negating the effects of IQ imbalance can include the operations of transmitting a channel estimation string across a channel. The channel estimation string comprises a plurality of known channel estimation symbols. The method further includes logically inverting predetermined symbols within the known channel estimation string; transmitting a second channel estimation string across the channel, the second channel estimation string including the logically inverted predetermined symbols; and estimating the IQ image noise based on received first and second channel estimation symbols.

Abstract: A channel equalizer includes a first transformer, an estimator, an average calculator, a second transformer, a coefficient calculator, a compensator, and a third transformer. The first transformer converts normal data into frequency domain data, where a known data sequence is periodically repeated in the normal data. The estimator estimates channel impulse responses (CIR) during known data intervals adjacent to each normal data block. The average calculator calculates an average value of the CIRs. The second transformer converts the average value into frequency domain data. The coefficient calculator calculates equalization coefficients using the average value, and the compensator compensates channel distortion of each normal data block using the coefficients. The third transformer converts the compensated data block into time domain data.

Abstract: A method of enabling a communications receiver to verify an antenna weight previously signalled by the communications receiver to a base station, the method including the steps of; equalizing (14) a channel estimate of a dedicated pilot channel by the complex conjugate of a channel estimate of a common pilot channel to form an estimate of the transmission weight used by the base station; and for each transmission slot, combining (20) a component of the transmission weight estimates for current and previous slots to form an optimised transmission weight estimate.

Abstract: A communications system receives a modulated signal that carries encoded communications data. An adaptive filter has a plurality of non-adaptive and adaptive filter taps with weighted coefficients and a tap order selection circuit for selecting the number and order of adaptive filter taps based on one of at least measured output power from the adaptive filter and signal modulation. A demodulator and decoder receives the filtered output signal and demodulates and decodes the signal to obtain the communications data.

Abstract: A system and method for signaling and detecting in wireless communications systems are provided. A method for processing information includes operating in a first phase, and operating in a second phase in response to determining that a first user is transmitting at a substantially higher power level than a second user, and processing the detected information. The first phase includes iteratively inverting a first filtering operation on received signals, and the second phase includes iteratively inverting a second filtering operation on received signals with consideration given to a first estimation error of symbols of the first user and a second estimation error of symbols of the second user. The operating remains in the first phase in response to determining that the first user is not transmitting at a substantially higher power level than the second user.

Abstract: A digital broadcast transmitting/receiving system and a signal processing method thereof that can improve the receiving performance of the system. A digital broadcast transmitter has a randomizer to randomize an input data stream which has null bytes being inserted at a specified position, a multiplexer to output a data stream formed by inserting specified known data into the position of the null bytes of the randomized data stream, an encoder to encode the data stream outputted from the multiplexer, and a modulator/RF-converter to modulate the encoded data, RF-convert the modulated data and transmit the RF-converted data. The receiving performance of the digital broadcast transmitting/receiving system can be improved even in a multi-path channel by detecting the known data from the received signal and using the known data in synchronization and equalization in a digital broadcast receiver.

Abstract: An equalizer employed in conjunction with bit-patterned media (BPM) is designed to take advantage of a common topology associated with BPM in which each data track is comprised of a plurality of sub-tracks. The equalizer-target filter pair is designed as multiple-input/multiple-output (MIMO) system, in which the readback signal is divided into readback signals associated with each sub-track. The MIMO equalizer takes into account differences in the channel response associated with each sub-track. A detector is configured to receive a plurality of equalized inputs provided by the MIMO equalizer, wherein the detector generates in response estimates of the user data stored on each of the plurality of sub-tracks.