Abstract: Wireless communication between a base station and at least one user equipment comprises the following. Each user equipment periodically measures channel quality of communication with the base station and transmits a channel quality indicator to the base station. The base station schedules communication with the at least one user equipment based upon the periodically transmitted channel quality indicators.

Abstract: A system includes a first device including a first transmitter and a first receiver, and a second device including a second transmitter and a second receiver and configured to communicate with the first device. The two devices perform a first equalization operation by performing a first phase in which the first receiver performs a signal tuning operation on the second transmitter, a second phase in which the second receiver performs a signal tuning operation on the first transmitter, and one or more other phases. The first, second, and other phases may constitute all the phases of the first equalization operation, and some of the other phases may precede the first and second phases. In response to detection of an error after the first equalization operation, the two devices may perform a second equalization operation by performing the first phase, the second phase, or both, but not performing the other phases.

Abstract: The present disclosure provides a decision feedback equalizer circuit. The decision feedback equalizer circuit includes: a first adder circuit, configured to add sampled data, first correction data and target correction data; a first sampler amplifier, configured to sample data output by the first adder circuit through a first signal component in a first clock signal to obtain a first sampling result; a second adder circuit, configured to add the sampled data, the first correction data and the target correction data; a second sampler amplifier, configured to sample data output by the second adder circuit through a second signal component in the first clock signal to obtain a second sampling result; and a correction parameter processing element, configured to determine the target correction data through a second clock signal, the first sampling result and the second sampling result.

Abstract: A system can comprise a memory that is configured to store and retrieve a first signal. The system can comprise a generator that is configured to generate first in-phase, quadrature sub-carrier values. The system can comprise a look up table that stores predetermined second in-phase, quadrature sub-carrier values. The system can comprise a pseudo-random look up table generator that is configured to operate on the predetermined second in-phase, quadrature sub-carrier values to produce pseudo-random data values. The system can comprise a component that is configured to inject a second signal into a radio unit, wherein the second signal is selected from the memory, the generator, the look up table, and the pseudo-random look up table generator, and wherein the second signal is configurably switched between a time domain path of a digital front end of the system, and a frequency domain path of the digital front end.

Abstract: The present disclosure relates to a concept of nonlinear signal processing which may be used for predistortion for RF power amplifiers. The concept includes generating time variant filter coefficients for a linear filter circuit based on a nonlinear mapping of an input signal, and filtering the input signal with the linear filter circuit using the time variant filter coefficients in order to generate a filtered output signal. Thus, it is proposed to implement a non-linear filter by a time-varying linear filter where the time-varying coefficients are derived from the input signal.

Abstract: Systems, methods, and devices enable spectrum management by identifying, classifying, and cataloging signals of interest based on radio frequency measurements. In an embodiment, signals and the parameters of the signals may be identified and indications of available frequencies may be presented to a user. In another embodiment, the protocols of signals may also be identified. In a further embodiment, the modulation of signals, data types carried by the signals, and estimated signal origins may be identified.

Abstract: A single-signal receiver including an active inductor continuous time linear equalizer and a reference voltage selection equalizer is provided. The single-signal receiver includes a continuous time linear equalizing unit to receive a single signal, and compensate for distortion of the single signal to generate an output, and a reference voltage selection equalizing unit to select one of a first reference voltage value and a second reference voltage value based on a previous output from a comparator, and sample the output from the continuous time linear equalizing unit, based on the one of the first reference voltage value and the second reference voltage value.

Abstract: A data slicer may include an input transistor configured to generate an internal output voltage based on an input voltage at an input node. An output node may be configured to output an output voltage based on the internal output voltage, and a feedback transistor may be configured to adjust the internal output voltage based on a correction voltage corresponding to output of the output node in a previous cycle.

Abstract: A system can comprise a radio unit comprising a digital front end, wherein the digital front end comprises a group of tap points that are configured to receive a first custom signal. The system can also comprise a first component that is configured to originate the first custom signal. The system can also comprise a second component that is configured to select a first tap point of the group of tap points, and inject the first custom signal into the first tap point.

Abstract: An information handling system includes a compute express link (CXL) device coupled to a processor by a PCIe/CXL link. The processor initiates a link training on the PCIe/CXL link, determines that the PCIe/CXL link failed to train to a CXL link signaling rate, trains the PCIe/CXL link as a PCIe link in response to determining that the PCIe/CXL link failed to train to the CXL link signaling rate, and operates the CXL device as a PCIe device only in response to training the PCIe/CXL link as a PCIe link.

Abstract: Millimeter-wave (mmWave) and sub-mmWave technology, apparatuses, and methods that relate to transceivers and receivers for wireless communications are described. The various aspects include an apparatus of a communication device including one or more antennas configured to receive an RF signal and an ADC system. The ADC system includes a 1-bit ADC configured to receive the RF signal, and an ADC controller circuitry configured to measure a number of positive samples in the received RF signal for a plurality of thresholds of the 1-bit ADC, estimate receive signal power associated with the received RF signal based on the measured number of positive samples, determine a direct current (DC) offset in the received RF signal using the estimated received signal power, and adjust the received RF signal based on the determined DC offset.

Abstract: Techniques for new radio layer two relay are disclosed. In an example, a base station may configure a user equipment (UE) and a relay UE having individual direct communication links with the base station to configure a sidelink communication link between the UE and the relay UE. The sidelink communication link may allow the UE to communicate with the base station via the direct communication link between the base station and the UE and the sidelink communication link between the UE and the relay UE.

Abstract: An equalizer that has a wide variable gain range and that can implement equalization for a communication medium such as on-board wiring or a cable having various wiring lengths. The equalizer includes a core circuit and a source follower connected to a subsequent stage of the core circuit. The core circuit includes a differential pair including a first transistor and a second transistor, and a zero point generation circuit connected between a second terminal of the first transistor and a second terminal of the second transistor. The source follower includes a third transistor and a fourth transistor, a variable bias current source is connected to the third and fourth transistors, and a load in which a capacitive element and a resistor element are connected in series via a switching element is connected to wiring that connects the third and fourth transistors to an output terminal.

Abstract: Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. In embodiment, a single-ended receiver trains DFE coefficients and the slicer reference voltage to improve the received eye height. The process for training avoids many whole range sweeps thereby shortening training time. A custom data pattern that includes low-frequency (DC with respect to DFE) and high-frequency (AC with respect to DFE) worst cases is used for training in a closed loop manner. Negative DFE is used to measure the AC height of the data. Positive DFE is used to find the DC height of the data pattern.

Abstract: A clock recovery circuit may include: a data slicer configured to output data values based on an input signal, a first error block, a phase adjustment loop including: a first error slicer configured to generate a first error signal based on a comparison of a threshold voltage and an input voltage, wherein the first error block is configured to selectively output the first error signal in response to a first pattern in the output data values, a second error block configured to selectively output the first error signal in response to a second pattern in the output data values, and a voltage threshold modification circuitry configured to adjust the threshold voltage based on output of the second error block, a voltage-controlled oscillator, wherein the data slicer and the first error slicer are clocked based on output of the voltage-controlled oscillator.

Abstract: An audio processing method includes the following operations. A calculated value is obtained according to multiple audio clock frequency information contained in multiple audio input packets. An audio sampling frequency is generated according to the calculated value and a link symbol clock signal. Multiple audio output packets corresponding to the audio input packets are generated according to the audio sampling frequency.

Abstract: A receiver device according to an embodiment includes a equalizer, a sampler, and a controller. The equalizer receive a first signal. The equalizer boosts the first signal to output a resultant as a second signal. The sampler samples the second signal. The sampler outputs a sampling result of the second signal as a first digital signal. The controller executes adaptive processing for adapting an amount of boost of the first signal. In the adaptive processing, the controller is configured to: adjust an amount of boost for the equalizer based on inter-symbol interference of a part in the first digital signal, the part matching a data pattern of a set pattern filter; and dynamically change a pattern filter to be set according to the amount of boost for the equalizer.

Abstract: A semiconductor integrated circuit according to an embodiment includes an A/D converter, first and second equalizer circuits, and first and second controllers. The first equalizer circuit includes a first tap. The first and second equalizer circuits receive a signal based on a digital signal, and output first and second signals, respectively. The first controller adjusts a phase of a clock signal based on the first signal. The second controller an operation of adjusting a control parameter including a tap coefficient. In the operation, the second controller adjusts a tap coefficient of each of taps of the second equalizer circuit, and adjusts a tap coefficient of the first tap based on an adjustment result of each tap coefficient of the second equalizer circuit.

Abstract: A controller extracts a distortion component of a readback signal from a magnetic read head. The distortion component may be found using a finite length Volterra series, for example. The controller estimates a clearance between the read head and a recording medium based on the distortion component. This clearance measurement can be used for closed loop fly-height control of the read head.

Abstract: Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.

Abstract: The present disclosure discloses a two-group portable same-frequency or different-frequency control radio frequency circuit, including two groups of radio frequency circuits and a circuit for controlling the two groups of radio frequency circuits; each group of radio frequency circuit includes a power filter circuit, a quartz crystal oscillator, a harmonic suppression circuit, an input end bias circuit, an input matching inductor, an amplifier, an output end bias circuit, an output matching circuit, a detection circuit, an antenna matching circuit, and an antenna. According to the disclosure, a controller and the detection circuits are used to perform time-sharing work on two groups of signals, and the two groups of signals are continuously switched to work, so that the problem of local heat accumulation is not caused, an action area is enlarged, and a load on key components is reduced, thereby improving the effect, the application range, and the reliability.

Abstract: Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.

Abstract: According to the present invention, in a wireless communication system that performs single carrier MIMO transmission between a transmitting station device and a receiving station device, the transmitting station device includes a time-domain linear equalization unit, a propagation path characteristics estimation unit configured to receive a training signal and estimate a transfer function matrix of propagation path characteristics, a filter tap calculation unit configured to calculate filter tap coefficients for the time-domain linear equalization unit based on the transfer function matrix by a predefined approach, and a transmission mode determination unit configured to make the filter tap calculation unit calculate the filter tap coefficients when the transfer function matrix meets a predefined condition, and to change a transmission mode and determine the transmission mode that meets the predefined condition when the transfer function matrix does not meet the predefined condition.

Abstract: Examples described herein relate to determining whether a device can re-train settings of one or more components of another device. Some examples include conducting link re-training by: receiving, by a receiver in a first device, signals over a lane from a transmitter in a second device, the signals comprising a first communication identifying capability to re-train a link; transmitting, from the first device, a second communication including one or more components of a second device with capability to be adjusted and a request to modify one or more parameters of the one or more components; and receiving, at the first device, a third communication identifying a status of re-training. In some examples, the one or more components comprise an equalizer and the one or more parameters comprises at least one tap setting. In some examples, the one or more parameters comprise a precursor, main cursor or post-cursor equalization setting.

Abstract: An input signal has a desired signal component and an interfering signal component superimposed thereon. Interfering component estimation processing is applied to the input signal, obtaining as a result a filtered signal comprising a sequence of filtered data samples. The filtered signal is subtracted from the input signal obtaining as a result an output signal comprising a sequence of output data samples. The interfering component estimation processing applies conjugating processing to the input signal, providing a conjugated version of the input signal. An adaptive signal processing coefficient is computed and adaptive signal processing is applied to the conjugated version of the input signal using the adaptive processing coefficient.

Abstract: A clock and data recovery (CDR) system includes a correlator configured to receive data, determine a first value of the received data, and output a second value corresponding to the received data, an accumulator configured to generate an accumulation value by accumulating the second value output from the correlator and output the accumulation value, and a state machine configured to determine whether a repeating pattern is present in the CDR system based on the accumulation value.

Abstract: According to the present invention, in a wireless communication system that performs single carrier MIMO transmission between a transmitting station device and a receiving station device, the transmitting station device including: a time-domain linear equalization unit configured to remove inter-symbol interference and inter-stream interference from a data signal to be transmitted to the receiving station device; a propagation path characteristics estimation unit configured to receive a training signal which is transmitted by the receiving station device and estimate a transfer function matrix of propagation path characteristics; and a filter tap calculation unit configured to calculate filter tap coefficients for the time-domain linear equalization unit by representing the estimated transfer function matrix as a matrix polynomial, taking an inverse response of the matrix polynomial as a transmit weight matrix, and approximating the transmit weight matrix with Neumann series, and the receiving station device

Abstract: A system for selecting an equalizer setting of an equalizer to equalize signals received via a communications link. Starting with a first (e.g., minimum) equalizer setting and a threshold voltage near the mid-eye voltage of the equalized output signal, the system estimates the amplitude of the inner eye of the equalized output signal by comparing the equalized output signal to a series of threshold voltages. If the amplitude of the equalized output signal is less than ideal, the system dynamically increases the equalizer setting. The system quickly converges on the equalizer setting for the communication link because, rather than comparing the output signal at every voltage offset using every equalizer setting, the system only evaluates the equalizer settings necessary to select the equalizer setting for the communications link and uses only the voltage offsets necessary to evaluate each equalizer setting.

Abstract: Methods and systems are described for generating a time-varying information signal at an output of a continuous time linear equalizer (CTLE), asynchronously sampling a data signal according to a sampling clock having a frequency less than a data rate of the data signal; generating corresponding pattern-verified samples for at least two data patterns, each of the at least two data patterns having a respective frequency content; determining corresponding frequency-specific voltage measurements associated with each of the at least two data patterns based on the corresponding pattern-verified samples of the at least two data patterns; and adjusting an equalization of the data signal based on a comparison of the corresponding frequency-specific voltage measurements.

Abstract: Receivers and receiving methods having maximum likelihood sequence detection with pseudo partial response equalization. One illustrative receiver includes: a feedforward equalizer that produces an equalized receive signal by diminishing a receive signal's intersymbol interference; a decision element that derives initial symbol decisions from samples of the equalized receive signal; and a filter that applies a partial response to the equalized receive signal or to an equalization error signal to produce input for a maximum likelihood sequence detector (MLSD). The MLSD may be a reduced complexity detector that derives a final sequence of symbol decisions by evaluating state metrics only for each initial symbol decision and its competing symbol decision.

Abstract: A parameter determination apparatus (2) includes: a first learning device (2111) learning a weight between a [j?1]-th layer (j is an integer that satisfies a condition that “2?j?the number of the layer”) and a [j]-th layer to which an output of the [j?1]-th layer is inputted among a plurality of layers of a neural network; a selecting device (2112) selecting at least one valid path for each node included in the [j]-th layer from a plurality of connection paths that connect nodes in the [j?1]-th layer and nodes in the [j]-th layer, respectively, on the basis of the weight learned by the first learning device; and a second learning device (2113) learning at least one of the weight and a bias as the parameters relating to a network structure between the [j?1]-th layer and the [j]-th layer on the basis of the sample signal, the label signal and the valid path.

Abstract: A cable includes a first plug, a second plug, and a controller. The first plug is configured to be connected with a host. The second plug is configured to be connected with a device. The controller is coupled between the first plug and the second plug, and is configured to monitor a connection message transferred between the host and the device, and to determine, according to the connection message, a transfer mode that the host and the device is to enter, and to set a plurality of electrical parameters to be a corresponding one set in a plurality of sets of predetermined parameters.

Abstract: An interface circuit may convert an input electrical signal at an input node in a first power domain having a first ground or reference voltage into an output electrical signal at an output node in a second power domain having a second ground or reference voltage. Notably, a level-shifting circuit in the interface circuit may selectively electrically couple to the input node and the output node. Then, when there is electrical coupling, the level-shifting circuit may perform level shifting between the first power domain and the second power domain. The level shifting may involve: passing, using a first filter, frequencies in the input electrical signal below a first corner frequency; passing, using a second filter in parallel with the first filter, frequencies in the input electrical signal above a second corner frequency; and combining outputs of the first filter and the second filter as the output electrical signal.

Abstract: A method and apparatus for diagnosing faults. The apparatus includes an interface to a communication device which can be used by participants, in particular control devices and/or sensors, in a vehicle to communicate with one another. The apparatus includes a device for changing a behavior of the communication device, which device is configured to activate the change in the behavior of the communication device if at least one boundary condition, on which activation of the fault diagnosis depends, is satisfied. The apparatus also includes artificial intelligence which is configured to determine the at least one boundary condition on the basis of an internal state of at least one participant.

Abstract: An equalizing transmitter coupled to a serial transmission line has a driver circuit coupled between an input signal and the serial transmission line, the driver circuit being configured to receive power at a first voltage level. The equalizing transmitter has one or more helper circuits, each helper circuit being configured to receive a control signal and to pull the serial transmission line to a second voltage level when a pulse is present in the control signal. The second voltage level may be greater than the first voltage level. The equalizing transmitter has one or more pulse generation circuits, each pulse generation circuit being configured to receive the input signal and a delayed version of the input signal and to provide the pulse in the control signal when a difference in voltage state is detected between the input signal and the delayed version of the input signal.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a first wireless communication device (WCD) may receive an indication of an error parameter associated with communications that use digital post distortion (DPoD) at the first WCD. The WCD may receive, from a second WCD, a communication based at least in part on the error parameter, wherein the communication has digital peak-to-average-power-ratio (PAPR) reduction applied, and wherein receiving the communication comprises application of DPoD to the communication. Numerous other aspects are described.

Abstract: Optical fiber interconnection systems and methods are described. One aspect includes receiving a pulse-amplitude modulated (PAM4) electrical signal at a transmitter for transmission to a receiver. The PAM4 electrical signal is decoded into a pair of non-return-to-zero (NRZ) electrical signals. The pair of NRZ electrical signals is converted into a corresponding pair of NRZ optical signals including a first NRZ optical signal and a second NRZ optical signal. The first NRZ optical signal is transmitted to a receiver over an communication channel. The second NRZ optical signal is transmitted to the receiver over the optical communication channel.

Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.

Abstract: A cable modem transceiver includes a processor configured to derive an instant of time for an upstream calibration signal on basis of upstream scheduling information. Further, the cable modem transceiver includes a transmitter configured to generate the upstream calibration signal at the derived instant of time. The cable modem transceiver additionally includes a detector configured to determine a property of the generated upstream calibration signal. The processor is further configured to derive at least one calibration parameter for the transmitter on basis of the detected property.

Abstract: Front-end circuitry for a data receiver and related systems, methods, and devices are disclosed. The front-end circuitry includes a passive equalizer, which includes a signal input, an equalizer output including a first equalizer output and a second equalizer output, a first signal path, and a second signal path. The first signal path is between the signal input and the first equalizer output. The first signal path has a first frequency response. The second signal path is between the signal input and the second equalizer output. The second signal path has a second frequency response. The second frequency response exhibits substantially inverse behavior to that of the first frequency response. An amplifier circuit is configured to combine a first equalizer output signal from the first equalizer output with a second equalizer output signal from the second equalizer output to obtain an equalized output signal.

Abstract: Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.

Abstract: A receiver includes an equalization circuit configured to output a data sample signal and an edge sample signal by sampling a data input signal according to clock signal, and to perform an equalization operation according to the data sample signal and the edge sample signal; and a clock gate circuit configured to select the clock signals from among a plurality of multi-phase clock signals according to a selection signal.

Abstract: A PAM-4 DFE receives an input signal distorted by inter-symbol interference (ISI) and expressing a series of symbols each representing one of four pulse amplitudes to convey two binary bits of data per symbol. High-order circuitry resolves the most-significant bit (MSB) of each two-bit symbol, whereas low-order circuitry 115 resolves the immediate least-significant bit (LSB). An immediate value of the MSB is used to select a set of ISI offsets used to resolve the LSB. Resolved values of the prior values of the MSB and LSB are then used to select the ISI offset for the immediate symbol.

Abstract: A decision feedback equalizer (DFE) sampler circuit is disclosed. The DFE sampler includes a front-end circuit configured to generate a filtered signal using a plurality of signals that encode a serial data stream that includes a plurality of data symbols and a summing circuit configured to generate an equalized signal by combining the filtered signal and an analog feedback signal based on a digital feedback signal. The DFE sampler further includes first and second samplers configured to sample the equalized signal and generate first and second regeneration signals, respectively, during first and second time periods. A compensation circuit is configured to generate the digital feedback signal using the first and second regeneration signals. The first and second samplers, in alternating time periods, cancel ISI from the equalized signal using the first and second regeneration signals, respectively.

Abstract: A timing controller includes a receiving circuit, a timing control circuit, and a plurality of insertion loss circuits. The receiving circuit is configured to receive N frames of signals. The timing control circuit is configured to: detect a bit error rate of an (M-1)th-frame signal in a blanking interval of an Mth-frame signal; adjust a swing of the (M-1)th-frame signal according to a target swing value corresponding to the bit error rate of the (M-1)th-frame signal; and select the corresponding insertion loss circuit according to the target swing value corresponding to the bit error rate of the (M-1)th-frame signal, wherein M and N are both positive integers, and M is greater than 1 and less than or equal to N. The present disclosure is applied to signal adjustment of the timing controller.

Abstract: A method of equalizing a communication link includes setting a number of coefficients to a required number, determining a number of pulse responses for a waveform, setting all values in a set of values to zero, repeating, until all values have been assigned, determining a current lowest parameter, using a position of the current lowest parameter as an index, determining a minimum value between a first term multiplied by a main pulse response minus a summation of each parameter multiplied by each value, divided by the current lowest parameter, and a corresponding pulse response, and assigning the minimum value to the value having a position equal to the position of the current lowest parameter, and determining a value of each coefficient in a set of coefficients by multiplying each value with the sign of a corresponding pulse response; defining an equalizer having a number of taps having a value based on the corresponding coefficient; and applying the equalizer to a waveform.

Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion. The transmitter system includes an intermodulation distortion (IMD) filter module configured to filter a detected feedback signal (Yin) to generate a targeted filtered signal (Yout), a digital pre-distortion (DPD) coefficient estimation module configured to update signal generation coefficients based on comparing an input signal (Sin) with the targeted filtered signal (Yout), and a distortion compensation processing module configured to generate a pre-distorted signal (Uout) based on the input signal (Sin) using the updated signal generation coefficients.

Abstract: Embodiments of a method and an apparatus for a quadrature hybrid are disclosed. In an embodiment, a quadrature hybrid includes a first port, a second port, a third port, a fourth port, first, second, and third inductors, first, second, third, and fourth capacitors, and a first variable capacitor tuning network connected between the first port and the fourth port, and a second variable capacitor tuning network connected between the second port and the third port.

Abstract: An information handling system includes a high-speed data communication link and a processor. The link includes lanes that each includes a transmitter with an equalization setting and a receiver. The processor initiates a training of the high-speed data communication interface to determine a setting value for the equalization setting for each lane, determines a lane quality value for each lane based upon the associated setting value, determines a link score based on the lane quality values, and determines that the lane quality score is outside a threshold range. In response to determining that the lane quality score is outside the threshold range, the processor selects a lane that has a lane quality value that has a greater magnitude than the lane quality values of all other lanes, increases the equalization setting of the first lane, and initiates a retraining of the other lanes.

Abstract: A device, system and method for radio-frequency emissions control is provided. The device comprises: a communication unit configured to communicate via main radio channels and a control channel, the main radio channels contributing to radio-frequency (RF) emissions; and a controller interconnected with the communication unit. The controller is configured to: receive, via the communication unit communicating over the control channel, an RF emissions control command to reduce the RF emissions emitted by the communication unit; and in response to receiving the RF emissions control command, control one or more of the communication unit and activity on the main radio channels to reduce the RF emissions.