Adaptive Patents (Class 375/232)
  • Patent number: 11953974
    Abstract: An information handling system includes a compute express link (CXL) device coupled to a processor by a PCIe/CXL link. The processor initiates a link training on the PCIe/CXL link, determines that the PCIe/CXL link failed to train to a CXL link signaling rate, trains the PCIe/CXL link as a PCIe link in response to determining that the PCIe/CXL link failed to train to the CXL link signaling rate, and operates the CXL device as a PCIe device only in response to training the PCIe/CXL link as a PCIe link.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 9, 2024
    Assignee: Dell Products L.P.
    Inventors: Isaac Q. Wang, Stuart Allen Berke, Jordan Chin
  • Patent number: 11956104
    Abstract: Millimeter-wave (mmWave) and sub-mmWave technology, apparatuses, and methods that relate to transceivers and receivers for wireless communications are described. The various aspects include an apparatus of a communication device including one or more antennas configured to receive an RF signal and an ADC system. The ADC system includes a 1-bit ADC configured to receive the RF signal, and an ADC controller circuitry configured to measure a number of positive samples in the received RF signal for a plurality of thresholds of the 1-bit ADC, estimate receive signal power associated with the received RF signal based on the measured number of positive samples, determine a direct current (DC) offset in the received RF signal using the estimated received signal power, and adjust the received RF signal based on the determined DC offset.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Oner Orhan, Hosein Nikopour, Mehnaz Rahman, Ivan Simoes Gaspar, Shilpa Talwar, Stefano Pellerano, Claudio Da Silva, Namyoon Lee, Yo Seb Jeon, Eren Sasoglu
  • Patent number: 11924895
    Abstract: Techniques for new radio layer two relay are disclosed. In an example, a base station may configure a user equipment (UE) and a relay UE having individual direct communication links with the base station to configure a sidelink communication link between the UE and the relay UE. The sidelink communication link may allow the UE to communicate with the base station via the direct communication link between the base station and the UE and the sidelink communication link between the UE and the relay UE.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: March 5, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Jelena Damnjanovic, Tao Luo, Aleksandar Damnjanovic
  • Patent number: 11909565
    Abstract: Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. In embodiment, a single-ended receiver trains DFE coefficients and the slicer reference voltage to improve the received eye height. The process for training avoids many whole range sweeps thereby shortening training time. A custom data pattern that includes low-frequency (DC with respect to DFE) and high-frequency (AC with respect to DFE) worst cases is used for training in a closed loop manner. Negative DFE is used to measure the AC height of the data. Positive DFE is used to find the DC height of the data pattern.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: February 20, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Anirudha Shelke, Ashwin S. Madhavakaimal, Kiran Baby
  • Patent number: 11909567
    Abstract: An equalizer that has a wide variable gain range and that can implement equalization for a communication medium such as on-board wiring or a cable having various wiring lengths. The equalizer includes a core circuit and a source follower connected to a subsequent stage of the core circuit. The core circuit includes a differential pair including a first transistor and a second transistor, and a zero point generation circuit connected between a second terminal of the first transistor and a second terminal of the second transistor. The source follower includes a third transistor and a fourth transistor, a variable bias current source is connected to the third and fourth transistors, and a load in which a capacitive element and a resistor element are connected in series via a switching element is connected to wiring that connects the third and fourth transistors to an output terminal.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: February 20, 2024
    Assignee: HITACHI, LTD.
    Inventor: Yusuke Wachi
  • Patent number: 11900953
    Abstract: An audio processing method includes the following operations. A calculated value is obtained according to multiple audio clock frequency information contained in multiple audio input packets. An audio sampling frequency is generated according to the calculated value and a link symbol clock signal. Multiple audio output packets corresponding to the audio input packets are generated according to the audio sampling frequency.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chun-Chang Liu, Jing-Chu Chan, Hung-Yi Chang
  • Patent number: 11902408
    Abstract: A clock recovery circuit may include: a data slicer configured to output data values based on an input signal, a first error block, a phase adjustment loop including: a first error slicer configured to generate a first error signal based on a comparison of a threshold voltage and an input voltage, wherein the first error block is configured to selectively output the first error signal in response to a first pattern in the output data values, a second error block configured to selectively output the first error signal in response to a second pattern in the output data values, and a voltage threshold modification circuitry configured to adjust the threshold voltage based on output of the second error block, a voltage-controlled oscillator, wherein the data slicer and the first error slicer are clocked based on output of the voltage-controlled oscillator.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: February 13, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Gaurav Malhotra, Amir Amirkhany, Jalil Kamali
  • Patent number: 11894954
    Abstract: A receiver device according to an embodiment includes a equalizer, a sampler, and a controller. The equalizer receive a first signal. The equalizer boosts the first signal to output a resultant as a second signal. The sampler samples the second signal. The sampler outputs a sampling result of the second signal as a first digital signal. The controller executes adaptive processing for adapting an amount of boost of the first signal. In the adaptive processing, the controller is configured to: adjust an amount of boost for the equalizer based on inter-symbol interference of a part in the first digital signal, the part matching a data pattern of a set pattern filter; and dynamically change a pattern filter to be set according to the amount of boost for the equalizer.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: February 6, 2024
    Assignee: Kioxia Corporation
    Inventor: Tomohiko Takeuchi
  • Patent number: 11888496
    Abstract: A semiconductor integrated circuit according to an embodiment includes an A/D converter, first and second equalizer circuits, and first and second controllers. The first equalizer circuit includes a first tap. The first and second equalizer circuits receive a signal based on a digital signal, and output first and second signals, respectively. The first controller adjusts a phase of a clock signal based on the first signal. The second controller an operation of adjusting a control parameter including a tap coefficient. In the operation, the second controller adjusts a tap coefficient of each of taps of the second equalizer circuit, and adjusts a tap coefficient of the first tap based on an adjustment result of each tap coefficient of the second equalizer circuit.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: January 30, 2024
    Assignee: Kioxia Corporation
    Inventor: Fumihiko Tachibana
  • Patent number: 11881239
    Abstract: A controller extracts a distortion component of a readback signal from a magnetic read head. The distortion component may be found using a finite length Volterra series, for example. The controller estimates a clearance between the read head and a recording medium based on the distortion component. This clearance measurement can be used for closed loop fly-height control of the read head.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: January 23, 2024
    Assignee: Seagate Technology LLC
    Inventors: Walter R. Eppler, Drew M. Mader
  • Patent number: 11876544
    Abstract: The present disclosure discloses a two-group portable same-frequency or different-frequency control radio frequency circuit, including two groups of radio frequency circuits and a circuit for controlling the two groups of radio frequency circuits; each group of radio frequency circuit includes a power filter circuit, a quartz crystal oscillator, a harmonic suppression circuit, an input end bias circuit, an input matching inductor, an amplifier, an output end bias circuit, an output matching circuit, a detection circuit, an antenna matching circuit, and an antenna. According to the disclosure, a controller and the detection circuits are used to perform time-sharing work on two groups of signals, and the two groups of signals are continuously switched to work, so that the problem of local heat accumulation is not caused, an action area is enlarged, and a load on key components is reduced, thereby improving the effect, the application range, and the reliability.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: January 16, 2024
    Assignee: NANJING CONGJING BIOTECHNOLOGY CO., LTD
    Inventors: Zhiqiang Jing, Luping Ge
  • Patent number: 11876649
    Abstract: Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 16, 2024
    Assignee: Marvell Asia Pte Ltd
    Inventors: Luke Wang, Benjamin Smith, Basel Alnabulsi, Stephane Dallaire, Simon Forey, Karthik Raviprakash, Praveen Prabha, Benjamin T. Reyes
  • Patent number: 11876652
    Abstract: Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: January 16, 2024
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Maruf H. Mohammad
  • Patent number: 11870517
    Abstract: According to the present invention, in a wireless communication system that performs single carrier MIMO transmission between a transmitting station device and a receiving station device, the transmitting station device includes a time-domain linear equalization unit, a propagation path characteristics estimation unit configured to receive a training signal and estimate a transfer function matrix of propagation path characteristics, a filter tap calculation unit configured to calculate filter tap coefficients for the time-domain linear equalization unit based on the transfer function matrix by a predefined approach, and a transmission mode determination unit configured to make the filter tap calculation unit calculate the filter tap coefficients when the transfer function matrix meets a predefined condition, and to change a transmission mode and determine the transmission mode that meets the predefined condition when the transfer function matrix does not meet the predefined condition.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: January 9, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Keita Kuriyama, Hayato Fukuzono, Masafumi Yoshioka, Tsutomu Tatsuta
  • Patent number: 11863357
    Abstract: Examples described herein relate to determining whether a device can re-train settings of one or more components of another device. Some examples include conducting link re-training by: receiving, by a receiver in a first device, signals over a lane from a transmitter in a second device, the signals comprising a first communication identifying capability to re-train a link; transmitting, from the first device, a second communication including one or more components of a second device with capability to be adjusted and a request to modify one or more parameters of the one or more components; and receiving, at the first device, a third communication identifying a status of re-training. In some examples, the one or more components comprise an equalizer and the one or more parameters comprises at least one tap setting. In some examples, the one or more parameters comprise a precursor, main cursor or post-cursor equalization setting.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: January 2, 2024
    Assignee: Intel Corporation
    Inventor: Bruce McLoughlin
  • Patent number: 11855648
    Abstract: A clock and data recovery (CDR) system includes a correlator configured to receive data, determine a first value of the received data, and output a second value corresponding to the received data, an accumulator configured to generate an accumulation value by accumulating the second value output from the correlator and output the accumulation value, and a state machine configured to determine whether a repeating pattern is present in the CDR system based on the accumulation value.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: December 26, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Gaurav Malhotra
  • Patent number: 11855830
    Abstract: An input signal has a desired signal component and an interfering signal component superimposed thereon. Interfering component estimation processing is applied to the input signal, obtaining as a result a filtered signal comprising a sequence of filtered data samples. The filtered signal is subtracted from the input signal obtaining as a result an output signal comprising a sequence of output data samples. The interfering component estimation processing applies conjugating processing to the input signal, providing a conjugated version of the input signal. An adaptive signal processing coefficient is computed and adaptive signal processing is applied to the conjugated version of the input signal using the adaptive processing coefficient.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Alessandro Barbieri, Fabio Dell'Orto
  • Patent number: 11843429
    Abstract: According to the present invention, in a wireless communication system that performs single carrier MIMO transmission between a transmitting station device and a receiving station device, the transmitting station device including: a time-domain linear equalization unit configured to remove inter-symbol interference and inter-stream interference from a data signal to be transmitted to the receiving station device; a propagation path characteristics estimation unit configured to receive a training signal which is transmitted by the receiving station device and estimate a transfer function matrix of propagation path characteristics; and a filter tap calculation unit configured to calculate filter tap coefficients for the time-domain linear equalization unit by representing the estimated transfer function matrix as a matrix polynomial, taking an inverse response of the matrix polynomial as a transmit weight matrix, and approximating the transmit weight matrix with Neumann series, and the receiving station device
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: December 12, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Keita Kuriyama, Hayato Fukuzono, Masafumi Yoshioka, Tsutomu Tatsuta
  • Patent number: 11843484
    Abstract: A system for selecting an equalizer setting of an equalizer to equalize signals received via a communications link. Starting with a first (e.g., minimum) equalizer setting and a threshold voltage near the mid-eye voltage of the equalized output signal, the system estimates the amplitude of the inner eye of the equalized output signal by comparing the equalized output signal to a series of threshold voltages. If the amplitude of the equalized output signal is less than ideal, the system dynamically increases the equalizer setting. The system quickly converges on the equalizer setting for the communication link because, rather than comparing the output signal at every voltage offset using every equalizer setting, the system only evaluates the equalizer settings necessary to select the equalizer setting for the communications link and uses only the voltage offsets necessary to evaluate each equalizer setting.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: December 12, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Suzanne Mary Vining, Amit S. Rane, Charles Michael Campbell
  • Patent number: 11838156
    Abstract: Methods and systems are described for generating a time-varying information signal at an output of a continuous time linear equalizer (CTLE), asynchronously sampling a data signal according to a sampling clock having a frequency less than a data rate of the data signal; generating corresponding pattern-verified samples for at least two data patterns, each of the at least two data patterns having a respective frequency content; determining corresponding frequency-specific voltage measurements associated with each of the at least two data patterns based on the corresponding pattern-verified samples of the at least two data patterns; and adjusting an equalization of the data signal based on a comparison of the corresponding frequency-specific voltage measurements.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: December 5, 2023
    Assignee: KANDOU LABS SA
    Inventor: Ali Hormati
  • Patent number: 11829317
    Abstract: A cable includes a first plug, a second plug, and a controller. The first plug is configured to be connected with a host. The second plug is configured to be connected with a device. The controller is coupled between the first plug and the second plug, and is configured to monitor a connection message transferred between the host and the device, and to determine, according to the connection message, a transfer mode that the host and the device is to enter, and to set a plurality of electrical parameters to be a corresponding one set in a plurality of sets of predetermined parameters.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Chang Wu, Kai Liu, Yao Feng, Neng-Hsien Lin, Chen Shen
  • Patent number: 11831347
    Abstract: A parameter determination apparatus (2) includes: a first learning device (2111) learning a weight between a [j?1]-th layer (j is an integer that satisfies a condition that “2?j?the number of the layer”) and a [j]-th layer to which an output of the [j?1]-th layer is inputted among a plurality of layers of a neural network; a selecting device (2112) selecting at least one valid path for each node included in the [j]-th layer from a plurality of connection paths that connect nodes in the [j?1]-th layer and nodes in the [j]-th layer, respectively, on the basis of the weight learned by the first learning device; and a second learning device (2113) learning at least one of the weight and a bias as the parameters relating to a network structure between the [j?1]-th layer and the [j]-th layer on the basis of the sample signal, the label signal and the valid path.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 28, 2023
    Assignee: NEC CORPORATION
    Inventors: Masaaki Tanio, Norifumi Kamiya, Naoto Ishii
  • Patent number: 11831475
    Abstract: Receivers and receiving methods having maximum likelihood sequence detection with pseudo partial response equalization. One illustrative receiver includes: a feedforward equalizer that produces an equalized receive signal by diminishing a receive signal's intersymbol interference; a decision element that derives initial symbol decisions from samples of the equalized receive signal; and a filter that applies a partial response to the equalized receive signal or to an equalization error signal to produce input for a maximum likelihood sequence detector (MLSD). The MLSD may be a reduced complexity detector that derives a final sequence of symbol decisions by evaluating state metrics only for each initial symbol decision and its competing symbol decision.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: November 28, 2023
    Assignee: Credo Technology Group Limited
    Inventors: Yu Liao, Junqing Phil Sun, Haoli Qian
  • Patent number: 11822421
    Abstract: A method and apparatus for diagnosing faults. The apparatus includes an interface to a communication device which can be used by participants, in particular control devices and/or sensors, in a vehicle to communicate with one another. The apparatus includes a device for changing a behavior of the communication device, which device is configured to activate the change in the behavior of the communication device if at least one boundary condition, on which activation of the fault diagnosis depends, is satisfied. The apparatus also includes artificial intelligence which is configured to determine the at least one boundary condition on the basis of an internal state of at least one participant.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: November 21, 2023
    Inventor: Julius Schröder
  • Patent number: 11824530
    Abstract: An interface circuit may convert an input electrical signal at an input node in a first power domain having a first ground or reference voltage into an output electrical signal at an output node in a second power domain having a second ground or reference voltage. Notably, a level-shifting circuit in the interface circuit may selectively electrically couple to the input node and the output node. Then, when there is electrical coupling, the level-shifting circuit may perform level shifting between the first power domain and the second power domain. The level shifting may involve: passing, using a first filter, frequencies in the input electrical signal below a first corner frequency; passing, using a second filter in parallel with the first filter, frequencies in the input electrical signal above a second corner frequency; and combining outputs of the first filter and the second filter as the output electrical signal.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: November 21, 2023
    Assignee: AyDeeKay LLC
    Inventors: Mohammad Radfar, Ichiro Aoki, Scott David Kee
  • Patent number: 11824570
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a first wireless communication device (WCD) may receive an indication of an error parameter associated with communications that use digital post distortion (DPoD) at the first WCD. The WCD may receive, from a second WCD, a communication based at least in part on the error parameter, wherein the communication has digital peak-to-average-power-ratio (PAPR) reduction applied, and wherein receiving the communication comprises application of DPoD to the communication. Numerous other aspects are described.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: November 21, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Igor Gutman, Pushkar Bajirao Kulkarni, Joseph Patrick Burke, Juergen Cezanne, Tao Luo
  • Patent number: 11824695
    Abstract: An equalizing transmitter coupled to a serial transmission line has a driver circuit coupled between an input signal and the serial transmission line, the driver circuit being configured to receive power at a first voltage level. The equalizing transmitter has one or more helper circuits, each helper circuit being configured to receive a control signal and to pull the serial transmission line to a second voltage level when a pulse is present in the control signal. The second voltage level may be greater than the first voltage level. The equalizing transmitter has one or more pulse generation circuits, each pulse generation circuit being configured to receive the input signal and a delayed version of the input signal and to provide the pulse in the control signal when a difference in voltage state is detected between the input signal and the delayed version of the input signal.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: November 21, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Darius Valaee, Patrick Isakanian, Srivatsan Thiruvengadam
  • Patent number: 11811452
    Abstract: Optical fiber interconnection systems and methods are described. One aspect includes receiving a pulse-amplitude modulated (PAM4) electrical signal at a transmitter for transmission to a receiver. The PAM4 electrical signal is decoded into a pair of non-return-to-zero (NRZ) electrical signals. The pair of NRZ electrical signals is converted into a corresponding pair of NRZ optical signals including a first NRZ optical signal and a second NRZ optical signal. The first NRZ optical signal is transmitted to a receiver over an communication channel. The second NRZ optical signal is transmitted to the receiver over the optical communication channel.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: November 7, 2023
    Assignee: WINGCOMM Co. Ltd.
    Inventors: Shuang Sun, Zuodong Wang, Wei Mao, Yun Bai
  • Patent number: 11811466
    Abstract: A cable modem transceiver includes a processor configured to derive an instant of time for an upstream calibration signal on basis of upstream scheduling information. Further, the cable modem transceiver includes a transmitter configured to generate the upstream calibration signal at the derived instant of time. The cable modem transceiver additionally includes a detector configured to determine a property of the generated upstream calibration signal. The processor is further configured to derive at least one calibration parameter for the transmitter on basis of the detected property.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: November 7, 2023
    Assignee: MaxLinear, Inc.
    Inventors: Nathan Goichberg, Shaul Shulman
  • Patent number: 11811379
    Abstract: Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: November 7, 2023
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Carl W. Werner
  • Patent number: 11810633
    Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: November 7, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed, Kiran Baby, Sudhir Kumar Katla Shetty
  • Patent number: 11811568
    Abstract: Front-end circuitry for a data receiver and related systems, methods, and devices are disclosed. The front-end circuitry includes a passive equalizer, which includes a signal input, an equalizer output including a first equalizer output and a second equalizer output, a first signal path, and a second signal path. The first signal path is between the signal input and the first equalizer output. The first signal path has a first frequency response. The second signal path is between the signal input and the second equalizer output. The second signal path has a second frequency response. The second frequency response exhibits substantially inverse behavior to that of the first frequency response. An amplifier circuit is configured to combine a first equalizer output signal from the first equalizer output with a second equalizer output signal from the second equalizer output to obtain an equalized output signal.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: November 7, 2023
    Assignee: Microchip Technology, Inc.
    Inventor: Johannes G. Ransijn
  • Patent number: 11784854
    Abstract: A receiver includes an equalization circuit configured to output a data sample signal and an edge sample signal by sampling a data input signal according to clock signal, and to perform an equalization operation according to the data sample signal and the edge sample signal; and a clock gate circuit configured to select the clock signals from among a plurality of multi-phase clock signals according to a selection signal.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: October 10, 2023
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Moon-Chul Choi, Sanghee Lee, Seungha Roh, Kwangho Lee, Deog-Kyoon Jeong
  • Patent number: 11769467
    Abstract: A timing controller includes a receiving circuit, a timing control circuit, and a plurality of insertion loss circuits. The receiving circuit is configured to receive N frames of signals. The timing control circuit is configured to: detect a bit error rate of an (M-1)th-frame signal in a blanking interval of an Mth-frame signal; adjust a swing of the (M-1)th-frame signal according to a target swing value corresponding to the bit error rate of the (M-1)th-frame signal; and select the corresponding insertion loss circuit according to the target swing value corresponding to the bit error rate of the (M-1)th-frame signal, wherein M and N are both positive integers, and M is greater than 1 and less than or equal to N. The present disclosure is applied to signal adjustment of the timing controller.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: September 26, 2023
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuanyuan Liu, Xuanxuan Qiao, Shuai Liu, Xianfeng Yuan, Zejun Chen, Jianjun Wang, Zhenzhou Xing
  • Patent number: 11770274
    Abstract: A decision feedback equalizer (DFE) sampler circuit is disclosed. The DFE sampler includes a front-end circuit configured to generate a filtered signal using a plurality of signals that encode a serial data stream that includes a plurality of data symbols and a summing circuit configured to generate an equalized signal by combining the filtered signal and an analog feedback signal based on a digital feedback signal. The DFE sampler further includes first and second samplers configured to sample the equalized signal and generate first and second regeneration signals, respectively, during first and second time periods. A compensation circuit is configured to generate the digital feedback signal using the first and second regeneration signals. The first and second samplers, in alternating time periods, cancel ISI from the equalized signal using the first and second regeneration signals, respectively.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: September 26, 2023
    Assignee: Apple Inc.
    Inventors: Wing Liu, Sanjeev K. Maheshwari
  • Patent number: 11770275
    Abstract: A PAM-4 DFE receives an input signal distorted by inter-symbol interference (ISI) and expressing a series of symbols each representing one of four pulse amplitudes to convey two binary bits of data per symbol. High-order circuitry resolves the most-significant bit (MSB) of each two-bit symbol, whereas low-order circuitry 115 resolves the immediate least-significant bit (LSB). An immediate value of the MSB is used to select a set of ISI offsets used to resolve the LSB. Resolved values of the prior values of the MSB and LSB are then used to select the ISI offset for the immediate symbol.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: September 26, 2023
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Nhat Nguyen, Charles Walter Boecker
  • Patent number: 11765002
    Abstract: A method of equalizing a communication link includes setting a number of coefficients to a required number, determining a number of pulse responses for a waveform, setting all values in a set of values to zero, repeating, until all values have been assigned, determining a current lowest parameter, using a position of the current lowest parameter as an index, determining a minimum value between a first term multiplied by a main pulse response minus a summation of each parameter multiplied by each value, divided by the current lowest parameter, and a corresponding pulse response, and assigning the minimum value to the value having a position equal to the position of the current lowest parameter, and determining a value of each coefficient in a set of coefficients by multiplying each value with the sign of a corresponding pulse response; defining an equalizer having a number of taps having a value based on the corresponding coefficient; and applying the equalizer to a waveform.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: September 19, 2023
    Assignee: Tektronix, Inc.
    Inventor: Kan Tan
  • Patent number: 11757685
    Abstract: An information handling system includes a high-speed data communication link and a processor. The link includes lanes that each includes a transmitter with an equalization setting and a receiver. The processor initiates a training of the high-speed data communication interface to determine a setting value for the equalization setting for each lane, determines a lane quality value for each lane based upon the associated setting value, determines a link score based on the lane quality values, and determines that the lane quality score is outside a threshold range. In response to determining that the lane quality score is outside the threshold range, the processor selects a lane that has a lane quality value that has a greater magnitude than the lane quality values of all other lanes, increases the equalization setting of the first lane, and initiates a retraining of the other lanes.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: September 12, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 11757695
    Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion. The transmitter system includes an intermodulation distortion (IMD) filter module configured to filter a detected feedback signal (Yin) to generate a targeted filtered signal (Yout), a digital pre-distortion (DPD) coefficient estimation module configured to update signal generation coefficients based on comparing an input signal (Sin) with the targeted filtered signal (Yout), and a distortion compensation processing module configured to generate a pre-distorted signal (Uout) based on the input signal (Sin) using the updated signal generation coefficients.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: September 12, 2023
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Ruikang Yang, Michael Russo, Simon Hamparian
  • Patent number: 11757422
    Abstract: Embodiments of a method and an apparatus for a quadrature hybrid are disclosed. In an embodiment, a quadrature hybrid includes a first port, a second port, a third port, a fourth port, first, second, and third inductors, first, second, third, and fourth capacitors, and a first variable capacitor tuning network connected between the first port and the fourth port, and a second variable capacitor tuning network connected between the second port and the third port.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: September 12, 2023
    Assignee: NXP USA, Inc.
    Inventors: Venkata Naga Koushik Malladi, Joseph Staudinger
  • Patent number: 11723057
    Abstract: A device, system and method for radio-frequency emissions control is provided. The device comprises: a communication unit configured to communicate via main radio channels and a control channel, the main radio channels contributing to radio-frequency (RF) emissions; and a controller interconnected with the communication unit. The controller is configured to: receive, via the communication unit communicating over the control channel, an RF emissions control command to reduce the RF emissions emitted by the communication unit; and in response to receiving the RF emissions control command, control one or more of the communication unit and activity on the main radio channels to reduce the RF emissions.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: August 8, 2023
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Robert T. Croswell, Bruce D. Mueller, Rodger W. Caruthers, Duane S. Andres, Randall Brace
  • Patent number: 11716168
    Abstract: Embodiments of methods of communications, communications devices, and redrivers are disclosed. In an embodiment, a method of communications involves enabling a Loss of Signal (LOS) detector and a Low Frequency Periodic Signaling (LFPS) detector connected to a communications channel, using a digital logic circuit, combining an output of the LOS detector and an output of the LFPS detector to generate a combined LFPS output, and outputting the combined LFPS output and the output of the LOS detector to control data communications through the communications channel.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: August 1, 2023
    Assignee: NXP USA, Inc.
    Inventors: Siamak Delshadpour, Abhijeet Chandrakant Kulkarni, Sivakumar Reddy Papadasu
  • Patent number: 11711649
    Abstract: A method for audio signal noise cancellation is provided. In response to current noise cancellation coefficients being required to be updated to new noise cancellation coefficients, the digital signal processor calculates the new noise cancellation coefficients and writes the new noise cancellation coefficients into an idle storage module in the at least two storage modules, and the digital signal processor sends an update request for updating the noise cancellation coefficients to the active noise cancellation module. The update request carries position information configured to indicate a position of the storage module to which the new noise cancellation coefficients is written.
    Type: Grant
    Filed: December 31, 2021
    Date of Patent: July 25, 2023
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Jiachao Chen, Chang Liu, Xiaodong Yan
  • Patent number: 11711103
    Abstract: A receiver for cancelling strong signals from combined weak and strong signals includes: a first circuitry for inputting a weak and strong signal as an input; a parametric cancellation circuit for inputting a representation of the strong signal and an output of the first circuitry to produce a cancellation signal; a second circuitry electrically coupled to the parametric cancellation circuit for inputting the cancellation signal to produce a modulated output; a demodulator electronically coupled to the second circuitry for demodulating the modulated output to produce a demodulated output and an error signal, where the demodulated output is the data contained in the weak signal; and an adaptation logic circuit for inputting the representation of the strong signal, the demodulated output and the error signal to adaptively produce parameters for the parametric cancellation circuit. The parametric cancellation circuit further inputs the error signal and the parameters to produce the cancellation signal.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: July 25, 2023
    Assignee: RAYTHEON BBN TECHNOLOGIES CORP.
    Inventor: Neil Judell
  • Patent number: 11710043
    Abstract: A system and a method of quantizing a pre-trained neural network, includes determining by a layer/channel bit-width determiner for each layer or channel of the pre-trained neural network a minimum quantization noise for the layer or the channel for each master bit-width value in a predetermined set of master bit-width values; and selecting by a bit-width selector for the layer or the channel the master bit-width value having the minimum quantization noise for the layer or the channel. In one embodiment, the minimum quantization noise for the layer or the channel is based on a square of a range of weights for the layer or the channel that is multiplied by a constant to a negative power of a current master bit-width value.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: July 25, 2023
    Inventors: Hui Chen, Ilia Ovsiannikov
  • Patent number: 11711247
    Abstract: A signal processing device includes: a memory; and a processor coupled to the memory and configured to: perform soft decision of a value of, among bit strings, a predetermined bit string encoded with a soft decision code from a symbol assigned to, according to each value of the bit strings, the bit strings having been subject to encoding of an outer code with a turbo product code and encoding of an inner code with the soft decision code; decode the predetermined bit string with the soft decision code on a basis of a result of the soft decision; individually perform, from the symbol, the soft decision of a value of each bit string other than the predetermined bit string among the bit strings; and decode the bit strings with the turbo product code on a basis of a result of the decoding and a result of the soft decision.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: July 25, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Yohei Koganei
  • Patent number: 11711092
    Abstract: A method for determining an inverse impulse response of a communication channel by means of a PAM receiver comprises the following method steps: switching on the PAM receiver; if a second PAM transceiver is switched on, setting a difference between a clock frequency of the data signal and a sampling frequency of the first PAM transceiver; comparing a symbol that is output by the interpreter with a state that is supplied to the interpreter, and outputting an error value, wherein in each case a symbol associated with a sampling clock is compared with a state associated with the same sampling clock; adapting m filter coefficients of the equalizer to minimize error values; repeating the third method step and the fourth method step until an error limit value is reached.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: July 25, 2023
    Assignee: Endress+Hauser Flowtec AG
    Inventors: Jannis Kappertz, Alexander Stutz, Markus Wucher
  • Patent number: 11705988
    Abstract: A receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: July 18, 2023
    Assignee: MaxLinear, Inc.
    Inventor: YouZhe Fan
  • Patent number: 11700629
    Abstract: A method of adapting radio resources based on physical conditions in a device for wireless communication is disclosed. The method comprises determining radio conditions, mapping the radio conditions to a metric, reporting the radio conditions to a handler of radio resources, and using the reported radio conditions and their mappings to the metric by the handler for radio resource operations. A device for wireless communication and a computer program are also disclosed.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: July 11, 2023
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Joakim Axmon, Torgny Palenius, Håkan Palm
  • Patent number: 11695455
    Abstract: A relay device relaying, to a reception device, a signal stream transmitted by a transmission device through MIMO transmission, the relay device including a lattice base reduction processing unit transforming bases of the signal stream transmitted by the transmission device through MIMO transmission, to increase orthogonality of a lattice of the signal stream, a MIMO equalization unit detecting, by equalization, reception symbols in the signal stream with the bases transformed by the lattice base reduction processing unit, a symbol quantization unit performing quantization by mapping the reception symbols detected by the MIMO equalization unit, to a region on a complex plane delimited by quantization threshold values, and a transmission unit transmitting, to the reception device, at least a signal quantized by the symbol quantization unit.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: July 4, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Naotaka Shibata, Jun Terada, Shinsuke Ibi, Seiichi Sanpei