Equalizers Patents (Class 375/229)
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Patent number: 10984803Abstract: A frame error concealment method is provided that includes predicting a parameter by performing a regression analysis on a group basis for a plurality of groups formed from a first plurality of bands forming an error frame and concealing an error in the error frame by using the parameter predicted on a group basis.Type: GrantFiled: November 4, 2019Date of Patent: April 20, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Ho-sang Sung
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Patent number: 10958484Abstract: In some examples, a time-based equalizer can be configured to receive an input signal from a channel. The input signal can be distorted by previously received input signals transmitted over the channel. The time-based equalizer can be configured to compensate for distortions in the input signal caused by at least one previously received input signal to provide an ISI compensated input signal. The time-based equalizer can be configured to compensate for the distortions by edge time shifting respective edges of the input signal in time over a time interval for detecting the input signal to new edge time locations based on a feedback signal and edge movement signals. The feedback signal can be generated based on at least one previously received input signal.Type: GrantFiled: March 2, 2020Date of Patent: March 23, 2021Assignee: CADENCE DESIGN SYSTEMS, INC.Inventors: Hajee Mohammed Shuaeb Fazeel, Raksha, Thomas Evan Wilson
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Patent number: 10944601Abstract: A reception circuit includes: a first equalizer configured to equalize a reception waveform; a second equalizer configured to equalize an input waveform from the first equalizer; a monitor configured to monitor magnitude of the input waveform; and a controller configured to generate a gain control code used for setting a gain of the first equalizer and a threshold voltage control code used for setting a threshold voltage to be compared with the input waveform in the second equalizer, in accordance with a monitoring result of the magnitude obtained by the monitor.Type: GrantFiled: April 21, 2020Date of Patent: March 9, 2021Assignee: FUJITSU LIMITEDInventor: Manabu Yamazaki
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Patent number: 10915912Abstract: Systems and methods for optimizing base pricing of products within a physical retailer are provided. Such systems and methods include first collecting transaction logs for products in a set of physical retail spaces. These logs are validated, adjusted and elasticities between the products are computed. The adjustment may be responsive to the day, by retailer and by a host of external factors (e.g., weather). The adjustment may also include a normalization and filtering out of inaccurate log data. Elasticity is calculated by generalized linear models. A set of constraints are then received and used, along with the elasticities.Type: GrantFiled: October 10, 2018Date of Patent: February 9, 2021Assignee: EVERSIGHT, INC.Inventors: Michael Montero, Jamie Eldredge, Daniel Gibson, David Moran, Jamie Rapperport
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Patent number: 10873407Abstract: A controller operates to adjust a transmitter to optimize transmission of a communications signal. The controller measures properties of a signal received from a transmitter, and generates a figure of merit (FOM) for the signal. The FOM is compared against a record of previous FOMs and corresponding previous transmitter tap values, the transmitter tap value indicating settings of a transmitter equalizer of the transmitter during transmission of the signal. A differential between the FOM and a plurality of the previous FOMs is determined, and, in response to the differential being positive, a subsequent tap value is selected from a subset of potential tap values. The subsequent tap value is sent to the transmitter for adjustment of the transmitter equalizer.Type: GrantFiled: November 15, 2018Date of Patent: December 22, 2020Assignee: Marvell Asia Pte, Ltd.Inventors: Myles Kimmitt, Scott D. McIlhenny
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Patent number: 10841037Abstract: A method, an apparatus, and a computer program product for wireless communication are provided. In one configuration, the apparatus may be a UE. The UE determines an MCS that would facilitate interference suppression of an interfering first cell transmission from a first cell when decoding a second cell transmission from a second cell at the UE. The interfering first cell transmission is a transmission unintended for the UE. The second cell transmission is a transmission intended for the UE. The UE transmits information indicating the determined MCS for the first cell. The UE receives a transmission including the second cell transmission from the second cell and the interfering first cell transmission from the first cell. The UE demodulates and/or decodes the second cell transmission from the received transmission based on the determined MCS.Type: GrantFiled: January 8, 2014Date of Patent: November 17, 2020Assignee: QUALCOMM IncorporatedInventors: Siddhartha Mallik, Taesang Yoo, Tao Luo, Yongbin Wei
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Patent number: 10841134Abstract: The equalizer has a first differential pair having a first transistor and a second transistor and a second differential pair having a third transistor and a fourth transistor. A first terminal of the first transistor and a first terminal of the third transistor are connected to each other, and a first terminal of the second transistor and a first terminal of the fourth transistor are connected to each other, so that the first differential pair and the second differential pair have common input terminals. Also, resistors are respectively connected to second terminals of the first, second, third, and fourth transistors, a first zero point generation circuit is connected between the second terminal of the first transistor and the second terminal of the second transistor, and a second zero point generation circuit is connected between the second terminal of the third transistor and the second terminal of the fourth transistor.Type: GrantFiled: April 27, 2020Date of Patent: November 17, 2020Assignee: HITACHI, LTD.Inventors: Yusuke Wachi, Takayasu Norimatsu
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Patent number: 10826678Abstract: A method for recovering a clock signal from an input signal is disclosed. The method comprises the following steps: An input signal that comprises a symbol sequence having symbol edges is received. Edge timings of the symbol edges are determined, thereby generating an edge signal, the edge signal comprising information on the edge timings. The edge signal is processed via a filter module comprising a time variant filter, thereby generating the clock signal, the clock signal comprising information on at least one clock timing parameter. Further, a clock recovery module and a computer program are disclosed.Type: GrantFiled: November 6, 2019Date of Patent: November 3, 2020Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Julian Leyh, Adrian Ispas
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Patent number: 10778477Abstract: A method of detecting u symbol transmitted over a communication channel in a multiple input-multiple output communication system. The method includes receiving a plurality of symbols transmitted over a communication channel of a multiple input-multiple output communication system. A sphere radius is initialized based on attributes of the communication channel. A first matrix of possible transmitted signals is defined as well as a second matrix of received symbols. The matrix of possible transmitted signals is searched using a breadth-first search (BFS). Each level of the search tree is analyzed utilizing matrix multiplication to determine selected symbols satisfying the initialized sphere radius. A maximum likelihood solution is of the transmitted symbols is derived based on the selected symbols.Type: GrantFiled: September 27, 2017Date of Patent: September 15, 2020Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Hatem Ltaief, Zouheir Rezki, Mohamed Amine Arfaoui, Mohamed-Slim Alouini, David E. Keyes
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Patent number: 10771295Abstract: A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.Type: GrantFiled: August 22, 2019Date of Patent: September 8, 2020Assignee: Rambus Inc.Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Fred F. Chen, Elad Alon, Mark A. Horowitz
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Patent number: 10767974Abstract: A wavelength detection system may include one or more wavelength detection stages configured to receive at least a portion of an input light signal, where each stage may include a splitter to split a portion of the input light signal into two arms, a 90-degree optical hybrid, and two differential detectors configured to generate I-channel and Q-channel differential signals based on the outputs from the 90-degree optical hybrid. Further, a free spectral range is associated with an optical path length difference between the two arms of each stage. The system may further include a logic device to receive at least one set of detection signals including I and Q channel differential signals associated with different free spectral ranges and determine the wavelength of the input light signal based on an arctangent of a ratio of the Q-channel and I-channel differential signals for at least one set of detection signals.Type: GrantFiled: December 10, 2019Date of Patent: September 8, 2020Assignee: Rockwell Collins, Inc.Inventors: Wenlu Chen, Oliver S. King
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Patent number: 10755663Abstract: A display panel driver includes a timing controller and a data driver. The timing controller generates a data signal based on an input image data. The data driver receives the data signal, converts the data signal into a data voltage and outputs the data voltage to a display panel. The data signal includes positive data and negative data. The data driver includes a data skew compensating circuit which samples the positive data using the negative data and compensates a skew of the data signal.Type: GrantFiled: May 16, 2018Date of Patent: August 25, 2020Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Kihyun Pyun, Yunmi Kim, Sung-Jun Kim, Juhyun Kim, Minyoung Park, Heebum Park
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Patent number: 10735227Abstract: A receiver includes signal lanes to receive associated data bit streams, and a control module. The signal lanes each include configurable equalization modules to provide a selectable compensation value to the associated data bit stream. The control module performs back channel adaptations on each data bit stream to achieve a target bit error rate for the associated signal lane, determines a most common set of compensation values from the performance of the back channel adaptations, determines whether the compensation value is within a predetermined boundary for that selectable compensation value, and provides an alert when a first compensation value of the most common set of compensation values is not within the predetermined boundary for the first compensation value.Type: GrantFiled: April 16, 2019Date of Patent: August 4, 2020Assignee: Dell Products, L.P.Inventors: Robert G. Bassman, Stuart Allen Berke, Bhyrav M. Mutnury
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Patent number: 10721055Abstract: The sampling data signal and the sampling synchronizing clock are generated by sampling the data signal and the synchronizing clock, and the first driving pulse signal and the second driving pulse signal are generated based on the sampling data signal and the sampling synchronizing clock, and the isolator is driven by the first driving pulse signal and the second driving pulse signal.Type: GrantFiled: May 9, 2019Date of Patent: July 21, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Yuji Ikeda
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Patent number: 10720994Abstract: A system and method for a high-speed transmitter comprising a precoder configured to receive a sequence of input symbols and to generate for each received symbol a respective recoded symbol is disclosed. The transmitter includes a recoding unit configured for recoding each current received PAM-M based on the recoded symbol immediately preceding the current recoded symbol at the recoding unit, a shift unit configured for determining a shift value for each current received symbol from the recoding unit based on the symbol received from the recoding unit and immediately preceding the current symbol at the shift unit; and Feed-Forward Equalizer unit for applying the shift values to the respective symbols received from the recoding unit to generate a corresponding sequence of output symbols to be transmitted in an output stream.Type: GrantFiled: February 11, 2019Date of Patent: July 21, 2020Assignee: International Business Machines CorporationInventors: Alessandro Cevrero, Pier Andrea Francese, Marcel A. Kossel, Christian I. Menolfi, Ilter Ă–zkaya, Thomas H. Toifl
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Patent number: 10707972Abstract: Systems, methods, and devices are provided for compensating for distortion of a contactless communication channel. The electronic device may include a radio frequency system that itself includes antenna to transmit and receive data using near-field communication (NFC) and an NFC signal processing circuitry. The NFC signal processing circuitry may receive an NFC signal via a communication channel formed between the electronic device and another electronic device and may determine a baseband reference waveform associated with the electromagnetic NFC signal and may determine an error between a portion of the electromagnetic NFC signal and the baseband reference waveform. Furthermore, the NFC signal processing circuitry may determine whether the error is outside of an acceptable error threshold range and, in response to the error being outside of the acceptable error threshold range, train a filter response of the NFC signal processing circuitry to estimate the communication channel.Type: GrantFiled: March 18, 2019Date of Patent: July 7, 2020Assignee: Apple Inc.Inventors: Xinping Zeng, Vusthla Sunil Reddy, Peter M. Agboh
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Patent number: 10693701Abstract: A method is provided of receiving user data from multiple transmitters, the user data from each transmitter having been encoded as a Low Density Lattice codeword, and the multiple Low Density Lattice codewords having been transmitted so as to be received as a combined signal at a receiver, the method of receiving comprising the steps of: (i) receiving the signal, (ii) calculating coefficients of linear combinations of the codewords from the multiple transmitters, (iii) calculating a scaling factor to be applied to the signal based on the coefficients, (iv) applying the scaling factor to the signal to provide a linear combination of the codewords, (v) decoding the linear combination of the codewords based on channel state information to obtain an optimal independent linear combination of user data, (vi) repeating steps (ii), (iii) (iv) and (v) to obtain at least as many optimal independent linear combinations as the number of transmitters, and recovering the user data from the optimal independent linear combinType: GrantFiled: August 15, 2016Date of Patent: June 23, 2020Assignee: Alcatel LucentInventors: Dong Fang, Stepan Kucera, Holger Claussen
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Patent number: 10693692Abstract: Wireless communication techniques for transmitting and receiving reference signals is described. The reference signals may include pilot signals that are transmitted using transmission resources that are separate from data transmission resources. Pilot signals are continuously transmitted from a base station to user equipment being served. Pilot signals are generated from delay-Doppler domain signals that are processed to obtain time-frequency signals that occupy a two-dimensional lattice in the time frequency domain that is non-overlapping with a lattice corresponding to data signal transmissions.Type: GrantFiled: March 23, 2017Date of Patent: June 23, 2020Assignee: Cohere Technologies, Inc.Inventors: Ronny Hadani, Shlomo Selim Rakib, Anthony Ekpenyong, Clayton Ambrose, Shachar Kons
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Patent number: 10686632Abstract: A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.Type: GrantFiled: November 7, 2018Date of Patent: June 16, 2020Assignee: Rambus Inc.Inventors: Jared L. Zerbe, Fariborz Assaderaghi, Brian S. Leibowitz, Hae-Chang Lee, Jihong Ren, Qi Lin
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Patent number: 10666482Abstract: Embodiments of the present disclosure provide an apparatus of reducing a peak-to-average ratio of a multi-carrier signal to be transmitted in a wireless communication system. The apparatus comprises a multi-carrier processing circuitry, a storage and a peak cancellation circuitry. The multi-carrier processing circuitry is configured to process a plurality of signals on respective carriers and to combine the processed plurality of signals into a multi-carrier signal to be transmitted. The multi-carrier processing circuitry is further configured to process an injected impulse to obtain an impulse response of the multi-carrier processing circuitry. The storage is configured to store the impulse response as a clipping pulse. The peak cancellation circuitry is configured to apply the clipping pulse to the multi-carrier signal to cancel a peak of the multi-carrier signal whose amplitude is over a predetermined threshold.Type: GrantFiled: January 20, 2017Date of Patent: May 26, 2020Assignee: Telefonaktiebolaget LM Ericsson (Publ)Inventors: Gan Wen, Peng Liu
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Patent number: 10608337Abstract: A device and method are provided for forming a beam of a transmit antenna array in the direction of a positioning receiver. Since the beam of the transmit antenna array is formed remotely by the positioning receiver, the received gain of the incoming positioning signal is maximised while signals from other directions are attenuated, thereby mitigating any unwanted effects of multipath. Depending on the number of elements in the transmit antenna array and their physical distribution, the width of the beam can be made finer such that the positioning receiver only requires a simple omni-directional antenna to achieve an accurate positioning solution.Type: GrantFiled: March 23, 2017Date of Patent: March 31, 2020Assignee: Locata Corporation Pty LtdInventor: David Small
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Patent number: 10608847Abstract: Generating first and second discharge control signals in response to a clock signal and an input voltage signal, the first and second discharge control signals decreasing at different rates to a threshold level during a first time period, wherein a difference in rates is determined by the input voltage signal, generating a differential voltage on a pair of nodes during the first time period by selectively controlling a respective amount of discharge of an initial charge on each node of the pair of nodes by applying the first and second discharge control signals to respective transistors in a differential transistor pair connected to the pair of nodes, and maintaining the differential voltage on the pair of nodes during a subsequent time period, and generating an amplified differential voltage during at least a portion of the subsequent time period by amplifying the differential voltage.Type: GrantFiled: February 5, 2019Date of Patent: March 31, 2020Assignee: KANDOU LABS, S.A.Inventor: Armin Tajalli
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Patent number: 10594269Abstract: Techniques are described for crest factor reduction in power amplifier circuits. For example, crest factor reduction can keep the peak signal level of a signal for transmission to below a peak threshold level associated with a power amplifier in the transmission path. The signal is received by the crest factor reduction system and clipped in accordance with the peak threshold level. Edge smoothing is then applied to the clipped signal to reduce out-of-band emissions. The edge smoothing is implemented by a moving average filter, such as a time-domain box filter. In some embodiments, a maximum operation or minimum operation is used to prevent signal peak regrowth after the filtering. Some embodiments also include various iteration loops to further improve crest factor reduction.Type: GrantFiled: August 8, 2018Date of Patent: March 17, 2020Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.Inventors: Amir Dezfooliyan, Waleed Younis, Tobias Seifert, Gunnar Nitsche
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Patent number: 10530615Abstract: The representative embodiments discussed in the present disclosure relate to techniques in which isolation between transmission signals and received signals in a transceiver may be maintained across a range of transceiver operating conditions, such as across range of output powers of a power amplifier of the transceiver. More specifically, an electrical balance duplexer may be implemented to include an adaptive power equalizer and a power equalizer control such that the attenuation of the electrical balance duplexer may be adjusted based on the transceiver operating conditions. For instance, a method may be employed to determine the output power of the power amplifier and to adjust the attenuation of the adaptive power equalizer based in part on the output power to maintain isolation between the transmission signals and the received signals.Type: GrantFiled: March 8, 2019Date of Patent: January 7, 2020Assignee: APPLE INC.Inventors: Joonhoi Hur, Rastislav Vazny, Ronald William Dimpflmaier
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Patent number: 10523473Abstract: Various embodiments, disclosed herein, can include apparatus and methods to characterize taps of a decision feedback equalizer of a data receiver. In characterizing the taps of the decision feedback equalizer of the data receiver, a signal can be transmitted to the data receiver and the received data can be iteratively sampled at an output of the decision feedback equalizer. The sampling can include stepping a sample time relative to arrival of the received data and stepping a reference voltage level to which the received data is compared. Values of the sampled data can be compared with known correct values and such measurements can be used to characterize the taps. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: November 27, 2018Date of Patent: December 31, 2019Assignee: Micron Technology, Inc.Inventor: Timothy Mowry Hollis
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Patent number: 10498525Abstract: An equalizer circuit includes: an addition circuit configured to add an input signal and a compensation signal; a comparison circuit configured to compare an output signal of the addition circuit; a plurality of first latch circuits configured to hold an output signal of the comparison circuit, the plurality of first latch circuits being connected in cascade; a selection circuit configured to select and output one of output signals of the comparison circuit and the plurality of first latch circuits; a second latch circuit configured to hold an output signal of the selection circuit; and a digital analog conversion circuit configured to generate the compensation signal, based on an output signal of the second latch circuit.Type: GrantFiled: December 21, 2018Date of Patent: December 3, 2019Assignee: SOCIONEXT INC.Inventors: Daisuke Suzuki, Masahiro Kudo
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Patent number: 10490241Abstract: Methods and devices include an input buffer configured to receive data. Decision feedback equalizer (DFE) circuitry includes a DFE configured to interpret levels of the data from the input buffer and a DFE buffer that stores previous values to control the DFE based on the previous values. Moreover, the DFE circuitry also includes reset circuitry configured to reset the DFE buffer to an initial state. Furthermore, the DFE circuitry includes suppression circuitry configured to suppress resets using the reset circuitry for an interval between write operations to the memory device.Type: GrantFiled: July 31, 2018Date of Patent: November 26, 2019Assignee: Micron Technology, Inc.Inventors: Daniel B. Penney, Liang Chen, David R. Brown
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Patent number: 10484002Abstract: A digital-to-analog converter, including an input to receive a digital signal; a first comparator configured to receive the digital signal and output a first signal based on the digital signal and a first threshold; a second comparator configured to receive the digital signal and output a second signal based on the digital signal and a second threshold, the second threshold different from the first threshold; and an integrator configured to receive the first signal and the second signal and integrate the first signal and the second signal into an analog signal that represents the digital signal.Type: GrantFiled: December 27, 2018Date of Patent: November 19, 2019Assignee: Keithley Instruments, LLCInventors: William C. Weeman, Gregory Roberts, II
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Patent number: 10476710Abstract: An equalizer circuit includes a first adder circuit adding an input signal and including an addition terminal and a subtraction terminal; a comparator circuit comparing an output signal of the first adder circuit; a latch circuit latching data output from the comparator circuit; a first digital/analog converter circuit which outputs a first signal corresponding to an absolute value of an equalizing coefficient, when the equalizing coefficient is a positive value; a second digital/analog converter circuit which outputs a second signal corresponding to an absolute value of the equalizing coefficient, when the equalizing coefficient is a negative value; and a switch circuit which switches a connection between a set of an output terminal of the first digital/analog converter circuit, an output terminal of the second digital/analog converter circuit, and a set of the addition terminal and the subtraction terminal, based on the data latched in the latch circuit.Type: GrantFiled: December 4, 2018Date of Patent: November 12, 2019Assignee: SOCIONEXT INC.Inventors: Masahiro Kudo, Daisuke Suzuki
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Patent number: 10469293Abstract: Provided are FTN-based OFDM transmission apparatus and method for efficient coexistence of broadband and sporadic traffics which may share radio resources with a Nyquist rate or more of efficiency by inserting the sporadic traffic into resources allocated to the broadband traffic in uplink transmission of a mobile communication system and use the band multiplexing even to a multi input multi output (MIMO) transmission apparatus. According to the present invention, it is possible to reduce quality deterioration according to actual offloading of subcarriers by removing some frequency components to remove a frequency domain allocated with some subcarriers among frequency components of the broadband traffic to selectively offload subcarriers having low contribution rate for the actual broadband transmission and to use the sporadic traffic in a grant-free access scheme by using bands used for the offloaded subcarriers in the sporadic traffic transmission.Type: GrantFiled: December 3, 2018Date of Patent: November 5, 2019Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Chung Gu Kang, Ameha Tsegaye Abebe
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Patent number: 10448379Abstract: A method of operating a wireless communication system (FIG. 4) is disclosed. The method includes receiving downlink control information (702) for transmission to a user equipment (UE) in enhanced physical downlink control channel (EPDCCH). A pseudo-random number generator is initialized (706) for generating a pseudo-random sequence. A plurality of demodulation reference signals (DMRS) are generated with the pseudo-random sequence. The plurality of DMRS is mapped with the EPDCCH and transmitted to the UE (712).Type: GrantFiled: May 4, 2013Date of Patent: October 15, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ralf Matthias Bendlin, Runhua Chen
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Patent number: 10404367Abstract: A method for optimizing non-uniform quantization thresholds of an ADC in MLSE-based receivers in an optical communication channel, according to which a Quantized Noise (QN) distortion model, in which the quantization and the channel additive noises are combined is generated. The model is applied on the channel deterministic analog states x(n) and on sequences of analog states and transition probabilities are calculated, which will be used later on to calculate the BER, from channel deterministic states and sequences of channel deterministic states into the discrete ADC quantization regions. Real value outputs of the ADC are replaced by the transition probabilities and non-uniform quantization of the ADC is performed, with thresholds that are optimized for MLSE detection, to obtain maximal statistical separation.Type: GrantFiled: January 6, 2017Date of Patent: September 3, 2019Assignee: B.G. Negev Technologies and Applications Ltd., at Ben-Gurion UniversityInventors: Dan Sadot, Yaron Yoffe
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Patent number: 10374853Abstract: To reflect advantages of continuous phase modulation (CPM), the invention provides a low complexity transmitter and receiver to transmit and receive CPM signals and addresses a significant reduction in the CPM demodulator complexity, and is especially well-suited for large values of L, e.g., L?3. The invention utilizes a linear filter front end as an integral part of the CPM demodulation process to reduce the ISI inherent in CPM transmit signal, and minimizes the influence of L in the reception process. To that end, the invention renders the complexity of a CPM demodulator non-exponentially dependent on L, and L only has a weak impact on the number of coefficients of the linear front end filters. Moreover, the invention provides a simple way of forming CPM signals for a digital communication transmitter using parallel Time Invariant Phase Encoders, which simplifies the production of CPM waveforms on software or hardware.Type: GrantFiled: February 28, 2018Date of Patent: August 6, 2019Assignee: MARECOMMS INC.Inventor: UlaĹź GĂĽntĂĽrkĂĽn
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Patent number: 10355890Abstract: A receiver includes a plurality of equalization modules each configurable to provide a selectable compensation value to a data bit stream received by the receiver, and a control module configured to perform a plurality of back channel adaptations on the data bitstream to achieve a target bit error rate for the receiver, each back channel adaptation being associated with a set of compensation values of the equalization modules, determine a most common set of compensation values derived from the performance of the plurality of back channel adaptations, and determine an optimized set of compensation values based on the most common set of compensation values.Type: GrantFiled: August 28, 2017Date of Patent: July 16, 2019Assignee: Dell Products, LPInventors: Stuart Allen Berke, Bhyrav M. Mutnury, Minchuan Wang
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Patent number: 10341147Abstract: A high performance equalization method is disclosed for achieving low deterministic jitter across Process, Voltage and Temperature (PVT) for various channel lengths and data rates. The method includes receiving input signal at front end of a receiver upon passing through a channel, generating with an eye-opening monitor circuit a control code based on channel conditions, and equalizing with a continuous-time linear equalization equalizer (CTLE) circuit the input signal based on the control code such that the eye-opening monitor circuit and the CTLE circuit are biased based on their corresponding replica circuits, and the control code is generated in a feedforward configuration.Type: GrantFiled: February 6, 2018Date of Patent: July 2, 2019Assignee: MegaChips CorporationInventors: Abhishek Kumar Khare, Raghavendra R. G, Anil Chawda, Shubham Srivastava
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Patent number: 10284276Abstract: Embodiments of the invention provide a decoder (10) for decoding a signal received through a transmission channel in a communication system, the signal carrying information symbols selected from a given set of values and being associated with a signal vector, the transmission channel being represented by a channel matrix. The decoder comprises: a sub-block division unit (12) configured to divide the received signal vector into a set of sub-vectors in correspondence with a division of a matrix related to said channel matrix; at least one weighting coefficient calculation unit (14) configured to calculate a sub-block weighting coefficient for each sub-vector, at least one symbol estimation unit (11) for recursively determining estimated symbols representative of the transmitted symbols carried by the data signal from information stored in a stack.Type: GrantFiled: December 23, 2016Date of Patent: May 7, 2019Assignee: INSTITUT MINES-TELECOMInventors: Mohamed-Achraf Khsiba, Ghaya Rekaya Ben-Othman, Asma Mejri
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Patent number: 10243534Abstract: Systems and methods to provide an audio spectral correction can be implemented in a variety of applications. Such systems and methods can include an equalizer design that uses efficient filter sections tuned with a closed form algorithm to give an accurate and intuitive frequency response with low complexity and minimal processing overhead. Embodiments can enable efficient and accurate control of reverberation time vs. frequency in artificial reverberators. Embodiments can enable efficient realization of a cascade combination of multi-band equalization functions as a single multi-band equalizer function, in which such functions can be expressed as graphic equalization functions using the same set of center frequencies as the cascade combination of multi-band equalization functions. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: October 28, 2016Date of Patent: March 26, 2019Assignee: DTS, Inc.Inventors: Jean-Marc Jot, Richard J. Oliver
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Patent number: 10243593Abstract: A method for receiving a signal and for rejecting interference in a multichannel receiver, comprises the steps of: reception, transposition and discretization of the signal received on each of the channels of the receiver, so as to obtain a discretized multichannel signal, synchronization of the discretized multichannel signal, computation, on the basis of the discretized and synchronized multichannel signal, of a matrix {circumflex over (R)} of correlation of the total noise, computation, on the basis of the matrix {circumflex over (R)} of correlation of the total noise, of a vector w comprising amplitude phase weighting coefficients of a multichannel filter, and application, to the discretized and synchronized multichannel signal, of a multichannel filtering processing on the basis of the vector w, and then of a single-channel equalization processing to the filtered signal.Type: GrantFiled: December 22, 2017Date of Patent: March 26, 2019Assignee: THALESInventor: François Pipon
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Patent number: 10230353Abstract: In a nonlinear signal filtering system, a signal having a series of signal samples is filtered. The signal samples are affected by interactions with adjacent signal samples and nonlinear distortions. The system contains a series of alternating linear system elements and nonlinear system elements that are used for mitigation of distortion resulting from the nonlinear distortions with memory effects. The linear system elements can scale each signal sample in the series of signal samples by scaling parameters and sums a plurality of consecutive scaled signal samples, and the nonlinear system elements can transform the output of the linear system elements according to instantaneous nonlinear functions.Type: GrantFiled: February 27, 2018Date of Patent: March 12, 2019Assignee: Apsidon, Inc.Inventors: Nikola Alic, Eduardo Temprana Giraldo
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Patent number: 10205525Abstract: A system and method for a high-speed transmitter comprising a precoder configured to receive a sequence of input symbols and to generate for each received symbol a respective recoded symbol is disclosed. The transmitter includes a recoding unit configured for recoding each current received PAM-M based on the recoded symbol immediately preceding the current recoded symbol at the recoding unit, a shift unit configured for determining a shift value for each current received symbol from the recoding unit based on the symbol received from the recoding unit and immediately preceding the current symbol at the shift unit; and Feed-Forward Equalizer unit for applying the shift values to the respective symbols received from the recoding unit to generate a corresponding sequence of output symbols to be transmitted in an output stream.Type: GrantFiled: November 30, 2017Date of Patent: February 12, 2019Assignee: International Business Machines CorporationInventors: Alessandro Cevrero, Pier Andrea Francese, Marcel A. Kossel, Christian I. Menolfi, Ilter Ă–zkaya, Thomas H. Toifl
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Patent number: 10135643Abstract: An embodiment includes a first feedback tap, a second feedback tap, and a summation circuit. The summation circuit may include a first load and a second load coupled to each other at an internal circuit node, and coupled in series between a power supply node and an output node. The summation circuit may be configured to receive, via a serial communication link, an input signal indicative of a series of data symbols, and to generate an output voltage level on the output node based upon a current data symbol. The first feedback tap, coupled to the output node, may be configured to sink a first current from the output node based upon a first previously received data symbol. The second feedback tap, coupled to an intermediate circuit node, may be configured to sink a second current from the intermediate circuit node based upon a second previously received data symbol.Type: GrantFiled: July 20, 2017Date of Patent: November 20, 2018Assignee: Oracle International CorporationInventors: Long Kong, Ranjan Vaish, Muthukumar Vairavan, Zuxu Qin
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Patent number: 10135543Abstract: A clock recovery method is provided. The method has the following operations: performing clock balance pre-filtering on an input time/frequency domain signal according to a self-adaptive balance coefficient input currently, to obtain a balance pre-filtering signal; according to the balance pre-filtering signal, acquiring a phase error of the input time/frequency domain signal; and performing phase adjustment on the input time/frequency domain signal according to the phase error, and outputting a new self-adaptive balance coefficient after self-adaptive balance processing is performed on the phase-adjusted time/frequency domain signal. A clock recovery device and system and a non-transitory computer-readable storage medium are also provided.Type: GrantFiled: April 1, 2014Date of Patent: November 20, 2018Assignee: SANECHIPS TECHNOLOGY CO., LTD.Inventors: Yangzhong Yao, Yi Cai, Yunpeng Li, Guohua Gu, Wei Ren
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Patent number: 10129056Abstract: A group of data symbols for a current block of data symbols in multiple blocks received over a communication channel is equalized, based on a pilot block, to generate a group of equalized symbols. The group of equalized symbols is de-rotated as a function of a current phase estimate to determine initial de-rotated equalized symbols. The phase estimate is an estimate of phase caused by noise for blocks previous to the current block. Additionally, a phase metric is calculated from real and imaginary parts of the initial de-rotated equalized symbols, wherein the phase metric estimates phase caused by noise for the current block. The current phase estimate is updated with the phase metric. The initial de-rotated equalized symbols are de-rotated by the phase metric to determine final equalized and de-rotated symbol estimates. The final equalized and de-rotated symbol estimates are output. Apparatus, methods, and computer program products are disclosed.Type: GrantFiled: October 3, 2016Date of Patent: November 13, 2018Assignee: Nokia Solutions and Networks OyInventors: Timothy Thomas, Mark Cudak
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Patent number: 10123286Abstract: An outphasing power management circuit for radio frequency (RF) beamforming is disclosed. The outphasing power management circuit includes a first outphasing amplifier branch consisting of a plurality of first power amplifiers and a second outphasing amplifier branch consisting of a plurality of second power amplifiers. A controller operates the first outphasing amplifier branch and the second outphasing amplifier branch as a pair of outphasing power amplifiers. The first outphasing amplifier branch generates a plurality of first output signals, and the second outphasing amplifier branch generates a plurality of second output signals. The first output signals and the second output signals are transmitted in an RF beam without being combined. As such, it is possible to support RF beamforming with a reduced number of power amplifiers and/or direct current (DC) to DC converters, thus helping to improve efficiency and reduce cost.Type: GrantFiled: April 5, 2017Date of Patent: November 6, 2018Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Alexander Wayne Hietala
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Patent number: 10116479Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Various exemplary embodiments of the present disclosure include: performing Fourier transform with respect to a plurality of modulation signals; dividing the plurality of transformed signals into at least two groups; generating FBMC symbols corresponding to the groups; transmitting the FBMC symbols.Type: GrantFiled: November 10, 2016Date of Patent: October 30, 2018Assignees: Samsung Electronics Co., Ltd., Industry-Academic Corporation Foundation, Yonsei UniversityInventors: Yeohun Yun, Sooyong Choi, Seongbae Han, Hyungju Nam
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Patent number: 10116470Abstract: An apparatus comprising an input port configured to receive an input signal propagated through a transmission link, wherein the transmission link comprises a low-frequency channel loss and a high-frequency channel loss, a continuous-time linear equalization (CTLE) circuit coupled to the input port and configured to produce an output signal according to the input signal by applying a first gain to the input signal at a first frequency to compensate the low-frequency loss, and applying a second gain to the input signal at a second frequency to compensate the high-frequency channel loss, and an output port coupled to the CTLE circuit and configured to output the output signal.Type: GrantFiled: October 28, 2015Date of Patent: October 30, 2018Assignee: Futurewei Technologies, Inc.Inventors: Liang Gu, Yuming Cao, Yen Dang, Gong Lei, Hungyi Lee, Yifan Gu, Mamatha Deshpande, Shou-Po Shih, Yan Duan
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Patent number: 10103788Abstract: Embodiments provide a method for reducing a self-interference signal in a communications system, and an apparatus. The method includes: sending a sounding signal; receiving an echo signal, where the echo signal includes a near-field reflected signal corresponding to the sounding signal. The method also includes separating the near-field reflected signal corresponding to the sounding signal from the echo signal, and determining a near-field reflection channel parameter according to the near-field reflected signal. The method also includes determining a reconstructed near-field reflected self-interference signal based on the near-field reflection channel parameter, and subtracting the reconstructed near-field reflected self-interference signal from a received second communication signal.Type: GrantFiled: May 27, 2016Date of Patent: October 16, 2018Assignee: Huawei Technologies Co., LtdInventor: Sheng Liu
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Patent number: 10090972Abstract: A system and method for receiving communication signals that have been spread in two dimensions. The method includes receiving signals representative of data that has been two-dimensionally spread and transmitted over a communication channel. The method further includes processing the signals to determine equalization coefficients based upon a two-dimensional [time-frequency] impulse response of the communication channel. A two-dimensional signal equalization procedure is then performed using the equalization coefficients.Type: GrantFiled: September 7, 2016Date of Patent: October 2, 2018Inventors: Ronny Hadani, Shlomo Selim Rakib
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Patent number: 10087806Abstract: A controller including a self-tuning circuit for controlling a pressure system to output an input pressure corresponding to an input pressure value using an adaptive fuzzy control system and updating dosing command values of a dosing command table for controlling a dosing unit of an aftertreatment system. The self-tuning circuit is configured to determine an input pressure value and generate a pressure control signal using the adaptive fuzzy control system based on the input pressure value, a detected input pressure, and an error amount. The self-tuning circuit is further configured to regulate the input pressure of reductant to the dosing unit from a reductant tank using a pressure control signal for a pressure control device. The self-tuning circuit is further configured to update a dosing command value of a dosing command table of the controller in conjunction with regulating the input pressure of reductant.Type: GrantFiled: February 18, 2016Date of Patent: October 2, 2018Assignee: CUMMINS EMISSION SOLUTIONS INC.Inventors: Nassim Khaled, Bibin N. Pattel
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Patent number: 10069658Abstract: Embodiments include a pulsed decision feedback equalization (DFE) circuit. The DFE circuit may include a current integrating summer (CIS) circuit that passes one or more data signals on respective data nodes based on an input data signal and a clock signal. The DFE circuit may further include a correction circuit, such as a current digital-to-analog converter (IDAC) circuit, that may provide a correction circuit to a data node based on a prior bit of the input data signal. The correction circuit may provide a conductive path between a current source of the correction circuit and the data node for a time period that is less than the unit interval (UI) of the clock signal and/or data signal. The DFE circuit may include a plurality of correction circuits to provide respective correction signals based on different prior bits of the input data signal. Other embodiments may be described and claimed.Type: GrantFiled: September 23, 2015Date of Patent: September 4, 2018Assignee: INTEL CORPORATIONInventors: Salman Latif, Ravindran Mohanavelu, Sitaraman V. Iyer