Abstract: A continuous-time domain Decision Feedback Equalizer (DFE) for use in a serial communication channel comprises in one embodiment a summer, a decision circuit, a capture flip-flop (FF) and an N-th order active filter. The DFE and its active filter operate in continuous time to give improved performance over a discrete-time DFE. In one embodiment involving a first-order active filter, the capture FF is outside the continuous-time negative feedback loop of the DFE and involves a differential signal amplifier. In another embodiment, the capture flip-flop is inside the DFE loop, and in a third embodiment the decision circuit comprises a comparator.

Abstract: A system for providing multi-channel multi-mode QAM equalization and carrier recovery is provided. According to one exemplary embodiment, the system includes an equalization circuit and a carrier recovery circuit operating in a concurrent manner to provide equalization and carrier recovery. The equalization circuit and the carrier recovery circuit each have two operating modes, namely, an acquisition mode and a tracking mode. The carrier recovery circuit evaluates a phase detection error calculated based on signals obtained from the equalization circuit. Based on the evaluation of the phase detection error, the equalization circuit and the carrier recovery circuit are respectively directed to switch operating mode, if appropriate.

Abstract: In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. If the information used to control the sampling clock is received from the equalized data stream, it will introduce an ambiguity between the operation of the channel equalizer and the mechanism used to control the sampling clock. Operation of the equalizer can mask an increasing time difference, between transmitter and receiver, which the sample clock controller should be tracking. The present invention eliminates the ambiguities in the operation of the equalizer and sample clock controller by preventing the equalizer accepting time differences which should be corrected by operation of the sample clock controller.

Abstract: Disclosed is an apparatus and method for processing a ranging channel in an OFDMA system. The apparatus converts received ranging complex signals to polar coordinate signals having a signal magnitude and a phase, and the received converted signals are each represented by a signal magnitude component and a phase component. A predetermined phase component of a signal according to a phase rotation is used to estimate a time delay by an addition operation of the phase of the received signal and the phase according to the phase rotation. Accordingly, the time delay and the power of each reverse link user of the OFDMA mobile communication system can be calculated by arithmetic operations of addition components instead of multiplication components, resulting in the reduction of complexity.

Abstract: In accordance with a particular embodiment of the present invention, a method is offered that includes characterizing a data correlation matrix for an idle pattern offline in a filter environment and, further, using a static adaptive control scheme with a static value of a data-pattern compensation matrix to achieve a compensated adaptive equalizer control. In more specific embodiments, the adaptive control scheme is used with a ZF adaptation scheme in conjunction with a constant adaptation matrix. In other embodiments, the adaptive control scheme is used with a fast steepest-descent method using a variable adaptation matrix. In still other embodiments, the adaptive control scheme is used with a constant adaptation matrix, whereby a value of is statically calculated. If the adaptive control scheme is used with a decoupling matrix, a value of is statically calculated. An inverter is used between the data correlation matrix and the data-pattern compensation matrix.

Abstract: In accordance with a particular embodiment of the present invention, a method is offered that includes providing a filter and an adaptive control element that is operable to communicate with the filter. The method also includes measuring, over a period, a data correlation matrix and an uncompensated error correlation vector using first and second low pass filters. In addition, the method includes implementing a data-pattern compensation matrix online, whereby the data-pattern compensation matrix is obtained online dynamically from the data correlation matrix.

Abstract: A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.

Abstract: In preferred embodiments, an adaptive equalization circuit including at least two equalization filters (each for equalizing a signal transmitted over a multi-channel serial link) and control circuitry for generating an equalization control signal for use by all the filters. The control circuitry generates the control signal in response to an equalized signal produced by one of the filters, and asserts the control signal to all the filters. Preferably, one filter generates an equalized fixed pattern signal in response to a fixed pattern signal (e.g., a clock signal), each other filter equalizes a data signal, and the control circuitry generates the control signal in response to the equalized fixed pattern signal.

Abstract: An apparatus for compensating nonlinearly distorted multicarrier signals, a multicarrier signal receiver using the same, and a method therefor are provided, where the apparatus for compensating multicarrier signals and the multicarrier signal receiver using the apparatus extract parameter information on the HPA mode from the received signal so that nonlinear distortion of the received multicarrier signal is compensated for even though an accurate transfer function of a high power amplifier (HPA) is not known and side information or a special training signal is not transmitted when a signal is transmitted, such that nonlinearly distorted multicarrier signals such as OFDM signals transmitted by an HPA having a variety of transfer functions can be adaptively compensated and therefore a demodulated signal with an improved symbol error rate (SER) can be obtained.

Abstract: An adaptive transversal filter having tap weights Wj which are products of corresponding tap coefficients Cj and tap gains Mj is provided. A filter control loop controls all of the tap coefficients Cj such that an error signal derived from the filter output is minimized. One or more tap control loops controls a tap gain Mk such that the corresponding tap coefficient Ck satisfies a predetermined control condition. For example, |Ck| can be maximized subject to a constraint |Ck|?Cmax, where Cmax is a predetermined maximum coefficient value. In this manner, the effect of quantization noise on the coefficients Cj can be reduced. Multiple tap control loops can be employed, one for each tap. Alternatively, a single tap control loop can be used to control multiple taps by time interleaving.

Abstract: Computing optimal Linear Equalizer (LE) coefficients gopt from a channel estimate h. A channel impulse response h is first estimated based upon either a known training sequence or an unknown sequence. The channel estimate is formulated as a convolution matrix H. The convolution matrix H is then related to the LE coefficients in a matrix format equation, the matrix format equation based upon the structure of the LE, the convolution matrix, and an expected output of the LE. A Fast Transversal Filter (FTF) algorithm is then used to formulate a recursive least squares solution to the matrix format equation. Computing the recursive least squares solution yields the LE coefficients using structured equations.

Abstract: A testing apparatus for testing a device under test is provided, wherein the testing apparatus includes: a comparator for receiving a signal output from the device under test and converting the signal into a logic signal by comparing the signal with a first reference voltage; a driver for amplifying a logic signal to be output to the device under test on the basis of a second reference voltage and outputting to the device under test; a comparator setting unit for determining the first reference voltage so as to compensate for a delay amount of a reception signal received from the device under test and setting the comparator to be the first reference voltage; and a driver setting unit for determining the second reference voltage on the basis of the reference voltage of the comparator and setting the driver to be the second reference voltage.

Abstract: A digitally synchronized receiving device and an associated signal processing method are provided. The digitally synchronized receiving device can receive data transmitted by a transmitter. The transmitter and the receiving device belong to a first clock domain and a second clock domain respectively. The receiving device performs synchronization in a digital manner, so as to deal with the problem of the analog solution in prior arts and the synchronization for interference cancellation.

Abstract: An equalizer comprises a sampler, a filter, and a summer. The sampler samples a signal indicative of an input communication signal to determine digital decision output signals having a communication device data rate. The filter receives digital decision output signals from the sampler and generates equalization signals therefrom. The summer couples to the sampler and the filter and combines together the input communication signal with the equalization signals. Further, a plurality of clocks control timing associated with the sampler. These clocks have frequencies that are less than the predetermined data rate of the digital decision output signals.

Abstract: Receiving downlink CDMA signals in a fast-fading environment is facilitated at higher receiver velocities by updating the block-adaptive linear minimum mean square error (LMMSE) downlink CDMA equalizer. The autocorrelation matrix of the observed data is updated by passing block-wise autocorrelation slides through a filter. Each autocorrelation slide is an autocorrelation matrix estimated from a short block of observed data over which the channel can be considered constant. This method achieves a reliable estimate for the autocorrelation matrix when the block size must be small to ensure that the block-wise stationarity assumption holds in cases of fast fading channels. In addition, small block sizes make it possible to satisfy the equalizer delay constraint imposed by hardware and certain voice transmission standards such as CDMA2000 1X where demodulated data must be delivered within only several symbol periods of the signal arrival time.

Abstract: An electrical signal regenerator including an equalizer and a clock data recovery circuit is provided. The clock data recovery circuit is selected when an input signal of a higher bitrate multiplex level is detected, but the clock data recovery circuit is bypassed when an input signal of a lower bitrate multiplex signal is detected. The electrical signal regenerator can be used in an optical switch processing signals of the new OTN according to ITU-T G.709, in which optical signals undergo optical to electrical conversion and are fed to an electrical space switching matrix including a plurality of the switch modules electrically interconnected by means of internal electrical signal paths such as a backplane or electrical cables. The electrical signal regenerator can be coupled to each input of a switching module to check internal cabling of the switching matrix.

Abstract: Fractional Spaced Equalizer FSEQ having adjustable coefficients ci for equalizing a reception signal of a transceiver. The transceiver comprises an echo compensator EC which generates an echo compensation signal for compensating an echo signal of the transceiver. The echo compensation signal is subtracted from the reception signal equalized by the fractional spaced equalizer FSEQ by means of a subtractor and the adjustable coefficients ci of the fractional spaced equalizer FSEQ are set after a half-duplex training phase of the transceiver during which the echo compensator EC is deactivated.

Abstract: Some embodiments store a training sequence in a communications system. The stored training sequence exhibits certain desirable characteristics when used by a peak to average power constrained modulation format. In one embodiment, a set of original ordered sequences is selected to have at least one desired property. A set of extended sequences is created from the original sequences by beginning with an element of an original sequence and cyclically appending elements of the original sequence in order to obtain a desired extended sequence length. Each extended sequence is modified using a corresponding modifying sequence, such that a training sequence can be generated from any one of the modified extended sequences. Each modifying sequence is selected so that the generated training sequence when modulated by a selected modulation format has the at least one desired property of the corresponding original ordered sequence.

Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

Abstract: An equalizer is provided which is capable of making a filter factor to be set in the equalizer having an equalizing filter converge rapidly and a method is provided for setting an initial value for the rapid convergence of the filter factor. In the equalizer having a filter factor computing device to compute a filter factor for an equalizing filter, and a differential detecting circuit to generate a differential signal between a signal output from the equalizing filter and a common pilot diffusing code, an initial value for the filter factor computing device is generated and set by a multipath timing detecting circuit, a reverse diffusing section, and a channel estimating device being operated based on a received signal.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.

Abstract: A Decision Feedback Equalizer (DFE) system includes a DFE and a DFE coefficients processor. The DFE receives an uncompensated signal and operates upon the uncompensated input using DFE coefficients to produce an equalized output. The DFE coefficients processor formulates a channel estimate as a convolution matrix H. The DFE coefficients processor determines a Feed Back Equalizer (FBE) energy constraint based upon the channel estimate. The DFE coefficients processor relates the convolution matrix H to the DFE coefficients in a matrix format equation, the matrix format equation based upon the structure of the DFE, the convolution matrix, an expected output of the DFE, and the FBE energy constraint. The DFE coefficients processor formulates a recursive least squares solution to the matrix format equation and computes the recursive least squares solution to the matrix format equation to yield the DFE coefficients.

Abstract: Directly computing Feed Forward Equalizer (FFE) coefficients and Feed Back Equalizer (FBE) coefficients of a Decision Feedback Equalizer (DFE) from a channel estimate. The FBE coefficients have an energy constraint. A recursive least squares problem is formulated based upon the DFE configuration, the channel estimate, and the FBE energy constraint. The recursive least squares problem is solved to yield the FFE coefficients. The FFE coefficients are convolved with a convolution matrix that is based upon the channel estimate to yield the FBE coefficients. A solution to the recursive least squares problem is interpreted as a Kalman gain vector. A Kalman gain vector solution to the recursive least squares problem may be determined using a Fast Transversal Filter (FTF) algorithm.

Abstract: An signal communication device having an auto-configured equalizer. The signal communication device includes a scoping circuit, buffer circuit, select circuit and equalizing circuit. A test signal is transmitted to the signal communication device via a signal path. The scoping circuit generates a waveform trace of the test signal, the waveform trace indicating time interval between receipt of a transition in the test signal and receipt of a reflection of the transition. The buffer circuit stores a plurality of data values that correspond to data signals received via the signal path. The select circuit selects one of the plurality of data values from the buffer circuit based on the time interval indicated by the waveform trace. The equalizing circuit generates an equalizing signal based on the selected data value.

Abstract: Provided is a block Time Domain Equalizer (TDE) for a Time Reversal-Space Time Block Codes (TR-STBC) system. The block TDE comprises a block equalizer which generates an output based on an equalizer tap weight with respect to two consecutively received blocks, an equalizer tap weight updating unit which generates an error vector based on the output and the equalizer tap weight and updates the equalizer tap weight using the error vector, and a signal processing unit which processes the output into a digital signal wherein zero padding is eliminated from the output.

Abstract: A decision feedback equalizer (DFE) architecture uses feedback samples that are over-sampled with respect to the symbol rate. On-baud feedback samples are quantized with a slicer, while off-baud samples are linear, IIR samples. Both forward and feedback filters are fractionally-spaced, but adapted only at the baud instances.

Abstract: A digital filter is disclosed, the filter comprising a device for determining the initial condition of a partial filter input, using a partitioned filter input signal, and partitioned filter input coefficients and a device for determining the initial condition of a partial filter output, using a partitioned filter output signal, and partitioned filter output coefficients, and a device for realising said digital filter as a sum of outputs of Finite Impulse Response (“FIR”) filter elements, wherein inputs of the FIR filter elements are dependent upon said partial filter input initial condition and said partial filter output initial condition, and said current block of filter input signal values.

Abstract: An equalization circuit is provided. The equalization circuit includes an input adapted to receive signals from a communications channel. The equalization circuit further includes a plurality of equalizer circuits coupled to the input and operable to generate a plurality of intermediate signals. A selector circuit is also included. The selector circuit is responsive to the plurality of equalizer circuits and selects one of the intermediate signals. The equalization circuit also includes an output coupled to the selector circuit that receives the selected intermediate signal.

Abstract: Described are methods and devices for processing a signal transmitting symbols which are temporally spaced on symbol intervals. The signal may be tapped at fractional symbol intervals to provide a plurality of signal taps at the fractional symbol intervals. Each of a plurality of coefficients may be applied to a corresponding one of the signal taps to generate an equalized signal. For at least one of the signal taps, the corresponding coefficient may be updated no more frequently than once per symbol interval.

Abstract: A block-iterative equalizer is adapted for use in contemporary digital communication system receivers. In a preferred embodiment, data received over a communication channel is processed by a linear feed-forward filter and the resulting filtered signal is provided to a slicer which makes a first set of tentative symbol decisions. During later iterations, the same received data is processed by the linear feed-forward filter, the feed-forward filter parameters being modified at each iteration based on the received data and the tentative decisions are themselves filtered by a second, “feed-back” filter and used to improve the tentative decisions.

Abstract: A signal equalizer that employs micro-electromechanical machine devices for the tap weight controllers. The equalizer includes a substrate on which is formed a forward transmission line rail and a return transmission line rail. A cantilever stanchion is also formed on the substrate that runs parallel with the transmission line rails. A series of spaced apart cantilevers are pivotally mounted to the cantilever stanchion, and extend over the transmission line rails to define a gap therebetween. A weight tap line is coupled to each cantilever, and is responsive to a DC weight signal that controls the position of the cantilever to set the gap between the cantilever and the transmission line rails. A distorted signal is coupled from the forward transmission line rail to the return transmission line rail through the cantilevers.

Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

Abstract: Techniques and instrumentalities to improve ISI and ICI cancellation in reception of modulated symbols by selectively decoding subsymbols of such modulated symbol before they can be completely decided or perceived as well as use of decoded symbol/subsymbol information in the feedback equalization process are disclosed. In particular, a decoder and corresponding method are disclosed which includes a feedback equalizer capable of receiving a modulated signal including a symbol defined by a first number of chips, along with a subsymbol processor to generate a subsymbol waveform upon receipt of a second number, less than the first number, of chips of such symbol and provide the subsymbol waveform to the feedback equalizer in order to equalize the modulated signal using the subsymbol waveform.

Abstract: Optimal Decision Feedback Equalizer (DFE) coefficients are determined from a channel estimate by casting the DFE coefficient problem as a standard recursive least squares (RLS) problem and solving the RLS problem. In one embodiment, a fast recursive method, e.g., fast transversal filter (FTF) technique, is used to compute the Kalman gain of the RLS problem, which is then directly used to compute MIMO Feed Forward Equalizer (FFE) coefficients. The FBE coefficients are computed by convolving the FFE coefficients with the channel impulse response. Complexity of a conventional FTF algorithm may be reduced to one third of its original complexity by selecting a DFE delay to force the FTF algorithm to use a lower triangular matrix. The length of the DFE may be selected to minimize the tap energy in the FBE coefficients or to ensure that the tap energy in the FBE coefficients meets a threshold.

Abstract: An equalizer device is used for digital communications systems having a plurality of receive channels. The equalizer device in normal operation comprises a transversal filter for each receive channel, an adder for summing the receive channels, and a system downstream from the adder including a phase corrector and a recursive portion including a single recursive filter and decision circuit in its forward branch. The equalizer device including decision-taking circuit for evaluating its performance as a function of the output signal from the equalizer device and for responding to the result of this evaluation by switching from a first structure which corresponds to a normal mode of operation to a second structure which corresponds to a convergence mode of operation, and vice versa.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

Abstract: An equalizer, consisting of a plurality of taps, each tap having a multiplier which is coupled to multiply a respective input sample by a respective coefficient, the taps being arranged in sequence so that the input sample to each of the taps, except to a first tap in the sequence, is delayed relative to a preceding tap in the sequence. The equalizer further includes an input selector, which is coupled to toggle the input sample to at least a selected tap among the plurality of taps, responsive to a state of the equalizer, so that the equalizer operates in a first state as a feed forward equalizer, and in a second state as a blind equalizer.

Abstract: The present invention is to provide a digital radio receiver using a carrier offset compensating circuit capable of compensating for carrier offsets even in a TDD communication system, and extending the range that can cope with offset frequencies to secure stable operation. The digital radio receiver is such that an initial phase correction part determines a phase shift from a known signal and corrects the phase shift, a multiplication part performs multiplication of a tap coefficient of the immediately preceding symbol from a first equalizer, and an equalizer performs waveform equalization while updating the coefficient based on an area-determination result.

Abstract: A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer.

Abstract: A fractional-spaced equalizer (FSE) is capable of performing joint intersymbol-interference (ISI) cancellation and matched filter (MF) processing. The FSE employs a constrained optimization technique to control the out-of-band frequency response of the equalizer's FIR while, at the same time, controlling the pass-band and roll-off of the FIR to cancel ISI. The format of the constrained optimization technique permits a single bank of multipliers elements to service the inner product computations associated both with the ISI cancellation and MF operations. This time-multiplexing technique promotes a conservation of hardware associated with the MF, and provides for a reduction in the computational complexity leading to an increase in power efficiency.

Abstract: A channel equalizer includes an equalizer filter for correcting an error upon receipt of a signal transmitted by a sending end, a DD slicer for calculating a first error upon receipt of the corrected signal from the equalizer filter, a Sato slicer for calculating a second error upon receipt of the corrected signal from the equalizer filter, and a DD error size calculation unit for taking the absolute value of the real part and imaginary part of the first error calculated from the DD slicer and summing these absolute values.

Abstract: An apparatus and method is disclosed for using adaptive algorithms to exploit sparsity in target weight vectors in an adaptive channel equalizer. An adaptive algorithm comprises a selected value of a prior and a selected value of a cost function. The present invention comprises algorithms adapted for calculating adaptive equalizer coefficients for sparse transmission channels. The present invention provides sparse algorithms in the form of a Sparse Least Mean Squares (LMS) algorithm and a Sparse Constant Modulus Algorithm (CMA) and a Sparse Decision Directed (DD) algorithm.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.

Abstract: During reception of a training signal in a received signal R(n) an estimated impulse response value Hm(n) of an M-channel, and a tap coefficient G(n) of a linear filter 111 is calculated by an adaptive algorithm through the use of the received signal R(n) and the training signal b(n). For an information symbol of the received signal R(n), the received signal R(n) is subjected to linear filtering with the most recently calculated tap coefficient G(n), and the linear filtering output Z(n) and the most recently estimated impulse response value Hm(n) are used to calculate a soft decision value ?1. In the second and subsequent rounds of equalization, the likelihood b?(n) of a soft decision value ?2[b(n)] from a decoder is calculated, and a replica is generated by linear-filtering the likelihood b?(n) with an estimated impulse response value vector HL(n) obtained by approximating intersymbol interference with the current code b(n) to zero.

Abstract: Optimal Decision Feedback Equalizer (DFE) coefficients are determined from a channel estimate h by casting the DFE coefficient problem as a standard recursive least squares (RLS) problem, e.g., the Kalman gain solution to the RLS problem. A fast recursive method, e.g., fast transversal filter (FTF) technique, for computing the Kalman gain is then directly used to compute Feed Forward Equalizer (FFE) coefficients gopt. The complexity of a conventional FTF algorithm is reduced to one third of its original complexity by choosing the length of a Feed Back Equalizer (FBE) coefficients bopt (of the DFE) to force the FTF algorithm to use a lower triangular matrix. The FBE coefficients bopt are then computed by convolving the FFE coefficients gopt with the channel impulse response h. In performing this operation, a convolution matrix that characterizes the channel impulse response h extended to a bigger circulant matrix.

Abstract: In a method for error correcting a data signal that is transmitted via a channel and contains data blocks with associated error checking information, the data signal is first equalized, with calculated soft-bit information. In a subsequent step, the error checking information is evaluated with respect to the data block. If the evaluation of the error checking information shows that a single bit error is present in one message bit, the single bit error is corrected only when a condition that is dependent on the soft-bit information is satisfied.

Abstract: A weighted mean arrival time determines a delay offset of a fractionally spaced equalizer. The weighted mean arrival time is determined using path arrival times and energies from a Rake receiver. The difference between a weighted mean arrival time and a current delay offset is set to a difference X, in units of the equalizer tap spacing. If the difference X is greater than or equal to 1 or less than or equal to ?1, then the current delay offset is updated by an incremental delay offset and the equalizer filter coefficients are shifted by a number of tap spacings. Otherwise, the current delay offset is not updated and the filter coefficients of the fractionally spaced equalizer are not shifted. Adaptation of the filter coefficients and updates of the delay offset of the equalizer occur only during pilot bursts so as to minimize adaptation transients.

Abstract: Receivers, methods, and computer program products can be used to demodulate a data signal transmitted from a digital source, which has a network sampling rate that is synchronized with a network clock. In an illustrative embodiment, a receiver includes a two-stage interpolator that receives digital samples of the data signal as an input and produces an interpolated digital sample stream to be filtered by an adaptive fractionally spaced decision feedback equalizer. The digital samples received in the interpolator are synchronized with a local clock; however, the interpolated sample stream is synchronized with the network clock. A slicer generates symbols for the samples output from the decision feedback equalizer by comparing the samples with a reference signaling alphabet. The receiver can be used in a V.90 client modem to demodulate pulse code modulated (PCM) data transmitted as pulse amplitude modulated (PAM) signals from a digital network.