Fractionally Spaced Equalizer Patents (Class 375/234)
  • Patent number: 6947481
    Abstract: A receiver includes an equalizer and a decoder which decodes data from a signal. The signal is based upon an output of the equalizer. The receiver also includes an encoder, which re-encodes the decoded data, and an error generator, which generates an error vector based upon the signal and the encoded data and which weights the error vector according to a reliability that the decoder accurately decoded the data from the signal. A controller controls the equalizer in response to the weighted error vector.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: September 20, 2005
    Assignee: Zenith Electronics Corporation
    Inventors: Richard W. Citta, Peter Ho
  • Patent number: 6940898
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: September 6, 2005
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit G. Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
  • Patent number: 6937551
    Abstract: A PRML detector includes a waveform equalizer for equalizing a waveform of a reproduction signal obtained by reproducing marks and non-marks recorded on a recording medium, and a decoder for generating binary-coded data of the reproduction signal based on the waveform equalized by the waveform equalizer. The decoder outputs a temporary data string which is obtained before the binary-coded data is obtained. The waveform equalizer includes an equalizer that includes a delay element that delays propagation of the reproduction signal, a plurality of multipliers that multiply predetermined coefficients by the reproduction signal and the delayed signal from the delay element, and an adder that adds outputs from the plurality of multipliers.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: August 30, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Harumitsu Miyashita, Shinichi Konishi, Atsushi Nakamura, Takeshi Nakajima, Junichi Minamino
  • Patent number: 6937672
    Abstract: Noise-reduced signal values derived from at least a part of the constant frequency interval of a telecommunication signal for adapting a filter to the frequency of the constant frequency interval, and to determine the position of the constant frequency interval on the basic of the filtered output values. Employing this idea, a filter can be adapted to a wide range of possible frequencies, which means that the filtered output values will show marked differences when the constant frequency interval begins and/or ends. These differences can be used to detect the position accurately and reliably.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: August 30, 2005
    Assignee: Agere Systems, Inc.
    Inventor: Emil P. Novakov
  • Patent number: 6904086
    Abstract: An adaptive equalizer processing an input having a fluctuating amplitude realizes a stable adaptive equalization operation without changing over a reference value for computing an equalization error. An input signal is held as a sample with a timing signal shifted from a reference clock of the input signal by a phase of ½ cycle. An equalization output is compute from sample data. The difference between only the first output value after a zero-crossing and an arbitrary reference value is computed, and the computed value is set as an equalization error. A coefficient of the adaptive equalization circuit is updated from the equalization error and the sample data. To stabilize for displacement of symmetry of the input, the reference value of the equalizer is changed corresponding to the change of a digitization threshold value of a digitization circuit which constitutes a rear stage of the adaptive equalizer.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: June 7, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kouichirou Nishimura, Kouichi Hirose
  • Patent number: 6853695
    Abstract: A symbol timing derivation system derives receiver timing from received symbols which avoids the need for a pilot tone, thereby reducing power consumption and expanding usable bandwidth. The system is implemented by using a calculation that finds the timing phase error. The timing phase error is then averaged and controls a phase locked loop (PLL). This PLL in turn controls a voltage-controlled oscillator, which handles the modem receiver timing. A centroid calculation can be included to bias the voltage-controlled oscillator to push the equalizer coefficients back to the ideal position. The system can be implemented in either a point-to-point modem environment or a multi-point environment, for example, but not limited to, MVL or DMT. The voltage-controlled oscillator may also be implemented to control transmitter timing, so that the central office modem and the remote modem will operate more-or-less synchronously, reducing the need for large equalizer corrections at either end.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: February 8, 2005
    Assignee: Paradyne Corporation
    Inventors: William Lewis Betts, Rafael Martinez
  • Patent number: 6829314
    Abstract: The invention is embodied in an adapter for use with a near end crosstalk (NEXT) canceller which reduces crosstalk, from a locally transmitted signal, in a locally received digital signal by superimposing, on the received signal, a correction signal comprising a sum of m largest time-delayed weighted and bandpass filtered samples of the transmitted signal spanning a range of n time delayed values, where m<n.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: December 7, 2004
    Assignee: 3Com Corporation
    Inventors: Anthony Eugene Zortea, Todd K. Moyer
  • Patent number: 6804293
    Abstract: The invention relates to a method for equalizing a signal with a frame structure, received via a time-variable transmission channel. According to said method, a frame-type equalization is used. The channel unit pulse response is analyzed and one equalization alternative is selected from several provided alternatives. According to the principle of equalization with decision feedback, it is preferable if only two alternatives are provided; a conventional forward equalization and an inverse-time reversed equalization. A decision in favor of one or the other of these alternatives can be made simply based on the sign characterizing the so-called skewness.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: October 12, 2004
    Assignee: Eads Radio Communication Systems GmbH & Co. KG
    Inventor: Achim Brakemeier
  • Publication number: 20040120394
    Abstract: According to some embodiments, a decision-feedback equalizer is provided.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 24, 2004
    Inventors: George J. Miao, Xiao-Feng Qi
  • Patent number: 6738420
    Abstract: A digital filter includes a number of coefficient generators that are clocked by a clock having a frequency including an undesired component. The coefficient generators, which each have a number of states, are communicatively coupled to multipliers that receive incoming signals and multiply the incoming signals by coefficients produced by the coefficient generators. Based on the magnitude of the undesired coefficient, certain states of the coefficient generators may be repeated or skipped to adjust the time and frequency domain of the output from the digital filter.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: May 18, 2004
    Assignee: PrairieComm, Inc.
    Inventor: Wayne H. Bradley
  • Publication number: 20040091040
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Application
    Filed: November 8, 2002
    Publication date: May 13, 2004
    Inventors: Abhijit G. Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
  • Publication number: 20040091037
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Application
    Filed: December 17, 2002
    Publication date: May 13, 2004
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Qian Yu
  • Publication number: 20040091036
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Application
    Filed: November 8, 2002
    Publication date: May 13, 2004
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Qian Yu
  • Publication number: 20040091041
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Application
    Filed: December 17, 2002
    Publication date: May 13, 2004
    Inventors: Abhijit G. Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
  • Patent number: 6704059
    Abstract: A partial fractionally spaced equalizer for a digital television includes, a feedforward filter unit for receiving an input signal sampled at a predetermined frequency, which is divided a first region having a symbol spaced tap and a second region having fractional spaced taps narrower than the symbol spaced tap, a feedback filter unit having symbol spaced taps, a equalizer signal generator for processing feedforward tap signals outputted from the feedforward filter unit and the feedback tap signals outputted from the feedback filter unit and generating equalizer signals, a slicer for slicing the equalizer signals to generate a decision data and outputting the decision data to the feedback filter unit, and an error generator for generating a compensating error signal by subtracting the equalizer signal from the decision data. When a sampled input signal (Si) of 21.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: March 9, 2004
    Assignee: LG Electronics Inc.
    Inventor: Joon Tae Kim
  • Patent number: 6687292
    Abstract: A timing phase acquisition method and device for burst modems includes an receiver designed to initialize an equalizer filter by matching clock of the equalizer filter of the receiver with the phase of the received signal.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: February 3, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Domingo G. Garcia
  • Patent number: 6678319
    Abstract: Communication channel characteristics are determined without the use of a training mode using a single-valued solution. A received signal xt is sent to an equalizer (508) which compensates for noise added to the received signal xt during transmission. To accurately determine the weights of the equalizer (508), the output of the equalizer (508) is transmitted to an amplitude square extractor (512) to generate a value representative of the amplitude of the received signal xt. Then, a forward-mapping module (516) maps the amplitude value from the n-dimensional space of the amplitude value to an augmented space having, in a preferred embodiment n2 dimensions. In the augmented space, an augmented space blind adaptation mechanism (520) is applied to generate a single-valued channel characteristic value in terms of an augmented space variable. Then, a backward-mapping module (524) is applied to generale the optimal weights for the equalizer (508) allowing an accurate recovery of the original signal st.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: January 13, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hamadi Jamali
  • Patent number: 6650698
    Abstract: An apparatus and method for minimizing nonlinear distortions in computer system communications where the upstream signal from a client modem to a server modem is periodically sampled, the samples being utilized by a non-linear decision feedback equalizer to periodically produce sets of equalizer coefficients. The equalizer coefficients are sent via an independent communication channel downstream to the client modem to continuously update distortion-minimizing adjustments to the client modem's upstream output. The samples are taken periodically in order to update the non-linear decision feedback equalizer so that it can provide appropriate equalizer coefficients for the changing characteristics of the upstream signal. The method includes identifying, by a first communication system, nonlinear equalization parameters to be used by a second communication system to minimize nonlinear distortions on a primary communication channel.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: November 18, 2003
    Assignee: Conexant Systems, Inc.
    Inventors: Thomas C. Liau, Keith T. Chu, Wei K. Tsai
  • Patent number: 6650699
    Abstract: Methods and apparatus for use in a communication channel receiver for generating a sampling phase error signal for adjustment of a sampling clock signal associated with the receiver are provided. In an illustrative embodiment, a method includes generating a signal representative of a weighted linear combination of a predetermined number of samples of a received input signal. The combination is a function of the samples and tap-weights of a finite impulse response filter associated with the receiver. Next, the illustrative method includes generating an error signal representative of the difference between an equalized sequence of samples of the received input signal and a decoded sequence of samples of the received input signal. Still further, the illustrative method includes multiplying the weighted linear combination signal with the error signal to generate a phase error signal. The phase error signal is then used to generate a phase correction signal for subsequent application to the sampling clock signal.
    Type: Grant
    Filed: January 21, 1999
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventor: Jose A. Tierno
  • Patent number: 6643335
    Abstract: A signal point arrangement dispersion calculation circuit whose circuit scale is small. The phase of a demodulation baseband signal is turned by a 22.5° turning remapper (3) at a speed twice the speed of the symbol rate of the demodulation baseband signal. The signal point position of the demodulation baseband signal is found by a signal point arrangement conversion circuit (73) in accordance with the demodulation baseband signal and the baseband signal whose phase is turned by a phase turning circuit. The signal point arrangement of the demodulation baseband signal is converted into the position of the first quadrant in accordance with the found signal point position from the demodulation baseband signal and the baseband signal whose phase is turned 45° by the two successive rotations made by the 22.5° turning remapper (3), and the dispersion is obtained in accordance with the baseband signal whose signal point arrangement is converted.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: November 4, 2003
    Assignee: Kabushiki Kaisha Kenwood
    Inventors: Akihiro Horii, Kenichi Shiraishi
  • Publication number: 20030138039
    Abstract: An equalizer, consisting of a plurality of taps, each tap having a multiplier which is coupled to multiply a respective input sample by a respective coefficient, the taps being arranged in sequence so that the input sample to each of the taps, except to a first tap in the sequence, is delayed relative to a preceding tap in the sequence.
    Type: Application
    Filed: December 16, 2002
    Publication date: July 24, 2003
    Inventors: Israel Greiss, Baruch Bublil, Jeffrey Jacob, Dimitry Taich
  • Patent number: 6597734
    Abstract: A passband transversal equalizer that uses a novel partitioning of circuits to improve the dynamic range and minimize unwanted signal interactions. The passband transversal equalizer uses a novel interconnection matrix and may be implemented using GaAs monolithic microwave integrated circuit (MMIC) devices for improved performance. The passband transversal equalizer comprises a divider that splits an input signal along a predetermined number of signal paths. Coaxial delay lines delay the signals propagating along the respective signal paths by a first set of nominal relative delays. A plurality of active divider having push-pull outputs are respectively coupled to the coaxial delay lines. An interconnection matrix respectively couples outputs of the active divider to one of a plurality of complex weighting and combiner circuits. A second plurality of coaxial delay lines delay the signals output by the complex weighting and combiner circuits by a second set of nominal relative delays.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: July 22, 2003
    Assignee: Lockheed Martin Corporation
    Inventor: Julius Lange
  • Patent number: 6587504
    Abstract: Following arrangement of an adaptive equalizer with a direct filter structure according to the least mean square error architecture, look ahead conversion of modifying a tap coefficient of the next cycle utilizing the tap coefficient of a predetermined preceding cycle is carried out and then a retiming process of adjusting the timing of tap coefficients and signals is carried out to arrange delay elements, whereby a transposition filter is realized. A high-speed adaptive equalizer is provided that can have the critical path reduced without increasing the hardware amount and that is superior in expansionability.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: July 1, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shuji Murakami, Hirohisa Machida, Hiroyuki Mizutani, Hiroshi Ochi
  • Publication number: 20030081670
    Abstract: There is disclosed a fractional-spaced equalizer (FSE) that is capable of performing joint intersymbol-interference (ISI) cancellation and matched filter (MF) processing. The FSE employs a constrained optimization technique to control the out-of-band frequency response of the equalizer's FIR while, at the same time, controlling the pass-band and roll-off of the FIR to cancel ISI. The format of the constrained optimization technique permits a single bank of multipliers elements to service the inner product computations associated both with the ISI cancellation and MF operations. This time-multiplexing technique promotes a conservation of hardware associated with the MF, and provides for a reduction in the computational complexity leading to an increase in power efficiency.
    Type: Application
    Filed: May 24, 2001
    Publication date: May 1, 2003
    Inventors: Frank Patrick Bologna, Fredric Joel Harris
  • Patent number: 6553066
    Abstract: A time error compensation arrangement (TCOMP) that compensates for a time error (&egr;, &Dgr;k) between a transmitter sample clock in a multi-carrier transmitter and a receiver sample clock (CLK) in a multi-carrier receiver (RX1, RX2) includes a digital time correction filter (FILTER, FILTER′), operative in time domain, to compensate for a linearly increasing contribution (&Dgr;k) in the time error (&egr;, &Dgr;k) and rotation means (ROTOR), operative in frequency domain, to compensate for a second, remaining contribution (&egr;) in said time error (&egr;, &Dgr;k).
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: April 22, 2003
    Assignee: Alcatel
    Inventors: Thierry Pollet, Peter Paul Frans Reusens, Miguel Peeters
  • Patent number: 6535554
    Abstract: A method and apparatus for detecting and decoding multiple or single users in a TDMA system where multipath propagation is present. A TDMA receiver may receive a one dimensional TDMA signal stream and may include a maximum likelihood sequence estimation (MLSE) stage to detect users from the received one dimensional TDMA signal stream. A decision feedback equalizer receives the postcursor portions of the TDMA channel from a channel estimator and an estimate of the postcursor portions of the transmitted signal from the MLSE stage. The decision feedback equalizer (DFE) truncates the interference in the received TDMA signal stream by cancelling the postcursor portion of the channel. The MLSE stage operates on the truncated TDMA signal stream to detect users.
    Type: Grant
    Filed: November 17, 1998
    Date of Patent: March 18, 2003
    Assignee: Harris Corporation
    Inventors: Mark A. Webster, Steven D. Halford
  • Publication number: 20030043900
    Abstract: An adaptive equaliser comprises a variable filter, means for measuring a received signal and control means for adjusting the filter parameters, wherein the filter parameters are adjusted based on the width of the eye opening measured in the eye diagram of the received signal. The received signal is scanned at a variable voltage or current threshold to construct a digitised representation. This information is applied to establish the correct coefficients in an equalisation filter that compensates for the distortion of the channel. The filter may be arranged in the receiver, in the transmitter, or both in the transmitter and the receiver.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 6, 2003
    Inventors: Alexander Roger Deas, Igor Anatolievich Abrosimov, Vasily Grigorievich Atyunin
  • Publication number: 20030026326
    Abstract: A weighted mean arrival time determines a delay offset of a fractionally spaced equalizer. The weighted mean arrival time is determined using path arrival times and energies from a Rake receiver. The difference between a weighted mean arrival time and a current delay offset is set to a difference X, in units of the equalizer tap spacing. If the difference X is greater than or equal to 1 or less than or equal to −1, then the current delay offset is updated by an incremental delay offset and the equalizer filter coefficients are shifted by a number of tap spacings. Otherwise, the current delay offset is not updated and the filter coefficients of the fractionally spaced equalizer are not shifted. Adaptation of the filter coefficients and updates of the delay offset of the equalizer occur only during pilot bursts so as to minimize adaptation transients.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Inventors: Srikant Jayaraman, Ivan Jesus Fernandez Corbaton, John E. Smee
  • Patent number: 6466616
    Abstract: An apparatus and method are provided that effectively minimizes the computational load and reduces the overall power consumption in a receiver by adjusting the number of taps used in a pre-filter and an equalizer. More specifically, the apparatus includes a memory for storing a signal, and a channel estimator for estimating a quality parameter and a number of channel filter taps using the stored signal. The apparatus further includes a controller for evaluating the estimated quality parameter and the estimated number of channel filter taps to determine a number of pre-filter taps, if any, to be used in the pre-filter. In addition, the controller evaluates the estimated quality parameter and the estimated number of channel filter taps to determine a number of equalizer taps to be used in the equalizer where the number of equalizer taps is less than or equal to the estimated number of channel filter taps.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: October 15, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Niklas Stenst{umlaut over (r)}om, Bengt Lindoff
  • Patent number: 6442199
    Abstract: A method and/or system for stabilizing the operation of fractionally spaced equalizers has a number of taps (P), associated with which are respective equalization coefficients (c−L, . . . , cL), used in digital signal receivers, wherein the equalization coefficients (c−L, . . . , cL) are updatable to an algorithm (1) based on the minimization of a proper cost function (J) and stabilized for operation through a proper a modification (I) involving calculation of a plurality of values (Ii) to be considered in updating the equalization coefficients (c−L, . . . , cL). According to the invention, these values (Ii) are calculated in only one circuit (COMP) and serially transmitted to the fractionally spaced equalizer (FSE).
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: August 27, 2002
    Assignee: Alcatel
    Inventors: Angelo Leva, Roberto Della Chiesa
  • Patent number: 6240134
    Abstract: A method and/or system for the stable operation of fractionally spaced equalizers available in digital signal receivers, having a plurality of equalization coefficients, said equalization coefficients being updatableby minimizing a proper cost function and stabilizable through a proper change of said cost function, said change of said cost function requiring the use of a virtual noise matrix. According to the invention, the cost function (J) for the updating of the coefficients of the fractionally spaced equalizer (FSE) is changed by adding a cyclostationary virtual interference [v(t)].
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: May 29, 2001
    Assignee: Alcatel
    Inventors: Andrea Sandri, Carlo Luschi, Arnaldo Spalvieri
  • Patent number: 6137833
    Abstract: A transversal filter equalizer comprising a programmable transmitter baseband equalizer for use in high rate digital transmitters. The programmable transmitter baseband equalizer processes digital data using a 1/2-symbol spaced transversal filter to produce I and Q baseband signals. The 1/2-symbol spaced transversal filter comprises I and Q n-bit wide shift register stages having alternate pairs of I and Q shift register stages driven by opposite phases of an input data clock, multiplying digital-to-analog converters driven by two direct tap weights and two cross tap weights, and I and Q combiners for generating I and Q baseband signals. The I and Q baseband signals are fed to a quadrature modulator that produces the desired constellation.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: October 24, 2000
    Assignee: Lockheed Martin Corporation
    Inventors: Julius Lange, Frank Chethik
  • Patent number: 5970093
    Abstract: A fractionally-spaced adaptively-equalized self-recovering digital receiver includes a fractionally-spaced adaptive filter for equalizing channel distortion which includes means for adaptively adjusting the coefficients of the fractionally-spaced filter with a self-recovering (blind) algorithm or a decision directed algorithm; means for changing the timing at which the data is sampled; means for estimating the sampling frequency offset in order to derive the optimal timing; means for synchronizing the signal resampling at the symbol rate using the statistics of the received data samples; means for evaluating the profile of the equalizer coefficients; and means for tracking carrier frequency offset.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: October 19, 1999
    Assignee: Tiernan Communications, Inc.
    Inventor: Maximilien d'Oreye de Lantremange
  • Patent number: 5909466
    Abstract: The equalizer circuit for the receiver of a digital communications system is characterized in that its predictor (11) is purely recursive, its phase equalizer (12) is purely transversal, and the relative positions of those two elements are interchangeable, means for evaluating performance in terms of decision error and for causing the two elements to be interchanged in application of a criterion for evaluating the difficulty of reception, the predictor being upstream and optimized in adaptive and self-learning manner to whiten its own output while the phase equalizer (12) is downstream and optimized in adaptive manner during periods of difficult reception, whereas the predictor (11) is downstream and the phase equalizer (12) is upstream, both being optimized jointly in adaptive manner to minimize decision error between the output (d(n)) of the decision circuit (2) and its input (w(n) or y(n)) during periods of easy reception.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: June 1, 1999
    Assignee: France Telecom
    Inventors: Joel Labat, Christophe Laot, Odile Macchi
  • Patent number: 5864545
    Abstract: A phase-splitting T/3 equalizer and echo canceller structure is computationally efficient because only one point per baud is calculated. However, there are two drawbacks to the structure: (1) since the equalizer performs both the phase-splitting function and channel response equalization, its convergence is slow, and (2) when training the echo canceller during half-duplex training, an answering modem needs an assumed equalizer in its receive path to train its echo canceller, because the adaptive equalizer has not yet been trained; however, after equalizer training the echo canceller needs to be retrained because equalizer coefficients have changed. In contrast, a fixed phase splitting filter can be used during training.
    Type: Grant
    Filed: December 6, 1996
    Date of Patent: January 26, 1999
    Assignee: Altocom, Inc.
    Inventors: Mark Gonikberg, Haixiang Liang
  • Patent number: 5838744
    Abstract: An apparatus and method for reliable and jitter-free timing recovery in high speed modems which utilizes the correlations of the received data signal points and the demodulated baseband signal samples feeding into a fractionally-spaced adaptive equalizer. This correlation based approach bypasses calculation of the exact transmitter symbol rate as required in traditional timing recovery methods. Also, the receiver timing adjustments are done via the transformed domain by shifting the taps of the adaptive equalizer. No time domain signal sample interpolation is necessary, so that truly jitter-free timing recovery is realized.
    Type: Grant
    Filed: October 22, 1996
    Date of Patent: November 17, 1998
    Assignee: TALX Corporation
    Inventor: Baohua Zheng
  • Patent number: 5809074
    Abstract: A blind equalization technique uses both the "constant modulus algorithm" (CMA) and the "multimodulus algorithm" (MMA) during blind start-up. This approach provides the basis for a "transition algorithm." One example of a transition algorithm is the CMA-MMA transition algorithm in which an adaptive filter simply switches from CMA to MMA. Other examples are variations of the CMA-MMA transition algorithm and are illustrated by the "Constant Rotation CMA-MMA" transition algorithm and the "Dynamic Rotation CMA-MMA" transition algorithm.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: September 15, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Jean-Jacques Werner, Jian Yang
  • Patent number: 5751768
    Abstract: The present invention relates to a method of fractionally spaced adaptive equalization which allows the achievement of the performances of the optimal linear receiver with a high degree of stability of the control algorithms. The technique is applicable to a generic communication system. The present method provides a fractionally spaced equalizer which is perfectly stable and has a good convergence rate without introducing any deterioration of the performances with respect to the optimal receiver and with an extremely low increase in the complexity of realization as compared to the prior art techniques. The invention is based upon the introduction of a whitening filter of the input signal to a fractionally spaced equalizer stabilized with the tap-leakage technique, where the whitening filter is a device able to make the power spectrum density of the signal--repeated with a period equal to the reciprocal of the signalling interval--constant.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: May 12, 1998
    Assignee: Alcatel Italia S.p.A.
    Inventors: Franco Guglielmi, Carlo Luschi, Arnaldo Spalvieri
  • Patent number: 5732112
    Abstract: In a multi-channel receiver system embodying the invention, a "trained" receiver channel which is active and propagating data signals may be used to train any other receiver channel. Each receiver channel of the system has an input and an output, with each input for receiving a different portion of an original data signal. Each receiver channel includes adaptive filter coupled between its input and its output for propagating the signals received at its input to its output. In accordance with the invention, a first trained receiver channel is used to train a second receiver channel by coupling the output of the first receiver channel to the output of the second receiver channel for training the adaptive filter of the second receiver channel. The training of the second receiver is completed by transmitting the same data signal to the first and second receiver channels.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: March 24, 1998
    Assignee: Globespan Technologies, Inc.
    Inventor: Ehud Langberg
  • Patent number: 5710794
    Abstract: An initial phase-loading circuit (IPLC) for a fractionally-spaced linear equalizer (FSLE) includes a signal coupling component adapted to be coupled to the FSLE in a configuration so as to selectively introduce time-shifted discrete signals. The FSLE includes a set of initial filter tap coefficients that provide a discrete signal to the FSLE, perform discrete signal equalization using the FSLE at least until substantial convergence of the filter tap coefficients, and provide to the FSLE a time-shifted discrete signal to replace the previously provided discrete signal.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: January 20, 1998
    Assignee: Lucent Technologies
    Inventor: Naresh Ramnath Shanbhag
  • Patent number: 5648988
    Abstract: A transversal type digital roll-off filter receiving a signal n-time sampled from analog signal carrying a pulse train of symbol rate T, includes a transversal type delay line including a plurality of delay elements each having a delay time T/n. Nodes are positioned between adjacent two delay elements. The filter further includes a memory for providing first tap rating ratios to control signals of the nodes and a calculation circuit for monitoring pulse forms of the output signal of the filter, and calculating second ratios to additionally control a central node and every n-th node counted from the central node, where the second ratios are calculated to make the output pulse good in shape. The filter acts as a roll-off filter and as an automatic equalizer. In a method of diagnosing the circuits in the above system, a memory in a transmitter further has second tap rating ratios used to diagnose the system, where the first and second ratios are switchably output to a digital filter in the transmitter.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: July 15, 1997
    Assignee: Fujitsu Limited
    Inventors: Takanori Iwamatsu, Norihide Mitsuta
  • Patent number: 5646957
    Abstract: Briefly, in accordance with one embodiment of the invention, an adaptive equalizer comprises: a digital filter including filter tap coefficients; a slicer; and a filter tap coefficient update block. The filter, slicer and coefficient update block are configured so as to perform at least one burst update of the filter tap coefficients. In accordance with another embodiment of the invention, a method of updating the filter tap coefficients of an adaptive equalizer comprises the step of: performing at least one burst update of the filter tap coefficients.
    Type: Grant
    Filed: July 28, 1995
    Date of Patent: July 8, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Gi-Hong Im, Naresh Ramnath Shanbhag, Jean-Jacques Werner
  • Patent number: 5602872
    Abstract: The present invention includes a method and system for controlling an equalizer equalizing data transmitted a communications channel which is oversampled at an oversampling rate of M. The method of the present invention includes the steps of initializing a plurality of data pointers and a first buffer stored in an input memory (22); generating a buffer full flag in response to filling the first buffer with a pre-determined number of data samples; initializing a counter (28) in response to the buffer full flag, the counter (28) generating an enable signal every M cycles; equalizing a portion of the pre-determined number of data samples in response to the enabling signal using an equalizer (20), where the portion of the pre-determined number of data samples is located using the plurality of data pointers; and adjusting the plurality of data pointers in response to the equalizing step using an FSE controller (24).
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: February 11, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: Michael S. Andrews
  • Patent number: 5598432
    Abstract: A reduced speed equalizer is provided which receives signal samples at a first rate but performs the equalizing operation at a second, lower rate which is below the rate at which symbols are transmitted across the channel. The equalizer is docked to receive samples in a shift register at the first rate. Samples stored in the shift register are clocked into a set of buffers at the second rate. The equalizer coefficients are applied to the samples stored in the buffer set to generate a sequence of equalized symbols at the second rate.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: January 28, 1997
    Assignee: Lucent Technologies Inc.
    Inventor: Lee-Fang Wei
  • Patent number: 5546430
    Abstract: This detector is for demodulating a received signal having been previously encoded by a trellis coded modulator and for producing an information data signal with reduced intersymbol interference. The detector comprises a predictor, a delay line, a feedforward filter, an adder, a subtracter, an updater and a trellis coded modulation estimator. The trellis coded modulation estimator has a feedback filter which is adjusted with respect to the feedforward filter to form a decision-feedback equalizer. Moreover, the delay line has a predetermined length which is adjusted according to an order of the feedforward filter and a depth of the trellis coded modulation estimator to achieve a zero relative delay between an output of the feedforward filter and outputs of the trellis coded modulation estimator.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: August 13, 1996
    Assignee: Universite du Quebeca Hull
    Inventors: Ke-Qiang Liao, Yonghai Gu
  • Patent number: 5495501
    Abstract: A transversal type digital roll-off filter receiving a signal n-time sampled from analog signal carrying a pulse train of symbol rate T, includes a transversal type delay line including a plurality of delay elements each having a delay time T/n. Nodes are positioned between adjacent two delay elements. The filter further includes a memory for providing first tap rating ratios to control signals of the nodes and a calculation circuit for monitoring pulse forms of the output signal of the filter, and calculating second ratios to additionally control a central node and every n-th node counted from the central node, where the second ratios are calculated to make the output pulse good in shape. The filter acts as a roll-off filter and as an automatic equalizer. In a method of diagnosing the circuits in the above system, a memory in a transmitter further has second tap rating ratios used to diagnose the system, where the first and second ratios are switchably output to a digital filter in the transmitter.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: February 27, 1996
    Assignee: Fujitsu Limited
    Inventors: Takanori Iwamatsu, Norihide Mitsuta