Accumulator Or Up/down Counter Patents (Class 375/236)
-
Patent number: 7130341Abstract: A method of signal equalization of a transmitted bit stream by means of a feed forward equalizer is provided, whereby the signal is decomposed into at least two components and the components are multiplied with equalization parameters to form equalized components, which are superposed to form an equalized signal, and whereby conditional bit error rates by counting faulty transmitted bits in dependence of preceding and succeeding bits are determined and the equalization parameters are tuned dependent on the determined conditional bit error rates.Type: GrantFiled: September 16, 2002Date of Patent: October 31, 2006Assignee: Lucent Technologies Inc.Inventors: Herbert Haunstein, Ralph Schlenk, Konrad Sticht
-
Patent number: 6947481Abstract: A receiver includes an equalizer and a decoder which decodes data from a signal. The signal is based upon an output of the equalizer. The receiver also includes an encoder, which re-encodes the decoded data, and an error generator, which generates an error vector based upon the signal and the encoded data and which weights the error vector according to a reliability that the decoder accurately decoded the data from the signal. A controller controls the equalizer in response to the weighted error vector.Type: GrantFiled: May 17, 2000Date of Patent: September 20, 2005Assignee: Zenith Electronics CorporationInventors: Richard W. Citta, Peter Ho
-
Patent number: 6940898Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.Type: GrantFiled: November 8, 2002Date of Patent: September 6, 2005Assignee: Scintera Networks, Inc.Inventors: Abhijit G. Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
-
Patent number: 6920333Abstract: A receiver in a communication system, for combining various significant components of a multipath fading signal and eliminating all other small components, consists of a signal generator, a plurality of delay devices, a plurality of decision feedback equalizers with embedded coherent signal combiners, a controller, a coherent signal combiner, and a decision circuit. The first decision feedback equalizer receives its inputs signals from a delay device and a signal generator, and each of the rest decision feedback equalizer receives its input signals from a corresponding delay device and the signal generator of its previous decision feedback equalizer. The coherent signal combiner, coupled to the output of the summation circuit of the last decision feedback equalizer, combines all the significant component signals together. The decision circuit makes a decision on transmitted symbol from the output signal of the coherent signal combiner.Type: GrantFiled: September 12, 2002Date of Patent: July 19, 2005Inventor: George L. Yang
-
Patent number: 6738420Abstract: A digital filter includes a number of coefficient generators that are clocked by a clock having a frequency including an undesired component. The coefficient generators, which each have a number of states, are communicatively coupled to multipliers that receive incoming signals and multiply the incoming signals by coefficients produced by the coefficient generators. Based on the magnitude of the undesired coefficient, certain states of the coefficient generators may be repeated or skipped to adjust the time and frequency domain of the output from the digital filter.Type: GrantFiled: July 24, 2000Date of Patent: May 18, 2004Assignee: PrairieComm, Inc.Inventor: Wayne H. Bradley
-
Patent number: 6674795Abstract: A system, device, and method for time-domain equalizer (TEQ) training determines the TEQ order and TEQ coefficients by applying the multichannel Levinson algorithm for auto-regressive moving average (ARMA) modeling of the channel impulse response. Specifically, the TEQ is trained based upon a received training signal. The received training signal and knowledge of the transmitted training signal are used to derive an autocorrelation matrix that is used in formulating the multichannel ARMA model. The parameters of the multichannel ARMA model are estimated via a recursive procedure using the multichannel Levinson algorithm. Starting from a sufficiently high-order model with a fixed pole-zero difference, the TEQ coefficients corresponding to a low-order model are derived from those of a high-order model.Type: GrantFiled: April 4, 2000Date of Patent: January 6, 2004Assignee: Nortel Networks LimitedInventors: Qingli Liu, Aleksandar Purkovic
-
Patent number: 6587504Abstract: Following arrangement of an adaptive equalizer with a direct filter structure according to the least mean square error architecture, look ahead conversion of modifying a tap coefficient of the next cycle utilizing the tap coefficient of a predetermined preceding cycle is carried out and then a retiming process of adjusting the timing of tap coefficients and signals is carried out to arrange delay elements, whereby a transposition filter is realized. A high-speed adaptive equalizer is provided that can have the critical path reduced without increasing the hardware amount and that is superior in expansionability.Type: GrantFiled: November 2, 1999Date of Patent: July 1, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shuji Murakami, Hirohisa Machida, Hiroyuki Mizutani, Hiroshi Ochi
-
Patent number: 6549088Abstract: A resonant waveguide load structure is provided for use in waveguide systems. The load structure includes a length of waveguide which is open at one end and closed at the other end. The load structure also includes a support pin mounted inside the waveguide near the closed end thereof. The load structure further includes a resonant body mounted on the support pin. The load structure also includes at least one spacer member mounted on the support pin for maintaining the position of the resonant body. This load structure may be combined with a waveguide circulator to provide a novel waveguide equalizer apparatus.Type: GrantFiled: September 21, 2001Date of Patent: April 15, 2003Assignee: The Boeing CompanyInventors: Paul Tatomir, Christopher L. Trammell, Rolf Kich
-
Patent number: 6498789Abstract: In a CDMA mobile communications device, a long code generator can be eliminated from a receiving section by storing a received long code at an output timing of a decimating section 11 through calculation of a write address of a FIFO buffer 12a, calculating a read address of the FIFO buffer at the cycle of a reference clock signal output from a reference clock signal generation section 12c, controlling the received long code through use of a FIFO buffer control section 12b which reads the received long code, and by a symbol combining section 10 combining symbols received over paths and output from a RAKE receiving section at the cycle of the reference clock signal and demodulating the combined symbol through use of the received long code.Type: GrantFiled: December 9, 1998Date of Patent: December 24, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Shoichiro Honda
-
Patent number: 6222876Abstract: A method for tuning an adaptive equalizer in order to receive digital signals from a transmission medium both coarse and fine tuning methods to adaptively equalize a signal received from the transmission medium. The coarse tuning method adjusts an equalizer such that the post equalized signal starts to resemble a known data pattern, such as an MLT3 data pattern. The coarse tuning method monitors and corrects for several things: illegal transitions, over equalization, statistical data pattern anomalies and saturation conditions. Fine tuning methods operate concurrently with the coarse tuning methods and function from the point at which the coarse tuning methods stop being efficient. Additionally, the fine tuning methods hold the waveform locked in. In addition to coarse tuning and fine tuning of the equalizer, the present invention also adjusts gain of the overall signal such that the post equalized signal is always a certain amplitude.Type: GrantFiled: December 19, 1997Date of Patent: April 24, 2001Assignee: 3Com CorporationInventors: Ryan E. Hirth, Ruchi Wadhawan
-
Patent number: 6167080Abstract: A closed feedback loop controls the adaptive equalization of an incoming data signal received via a cable. Detected signal information about the positive and negative peaks of the incoming data signal during different windows in time is processed to generate a set of adaptive equalization control signals which identify differences, if any, between the positive and negative peaks of the present data signal and those which are desired. These equalization control signals control an input signal equalization circuit which adaptively adjusts the waveshape of the present data signal to bring it into conformance with the desired waveshape.Type: GrantFiled: May 12, 1998Date of Patent: December 26, 2000Assignee: National Semiconductor CorporationInventors: Wong Hee, Abhijit Phanse
-
Patent number: 6047026Abstract: A decision feedback equalizer circuit employing a current mode finite impulse response (FIR) filter.Type: GrantFiled: September 30, 1997Date of Patent: April 4, 2000Assignee: OHM Technologies International, LLCInventors: Emil Yu-Ming Chao, Nirav Pravinkumar Dagli, Parameswaran Gopal Iyer, Alarabi Omar Hassen
-
Patent number: 5970094Abstract: An equalizer for filtering a received signal to generate a filtered signal.Type: GrantFiled: November 5, 1997Date of Patent: October 19, 1999Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Duck Myung Lee
-
Patent number: 5768311Abstract: Using digital signal processing in a modem attached to a digital line, the modem sample rate for both transmit and receive signals is interpolated or decimated to the time slot rate of a digital channel connected to the modem by filters which are operated by a unified interpolation/decimation filter controller as a function of a modulo counter. For example, a modem signal is developed as if it were to be supplied to a codec. However, instead of being supplied to the codec, the signal is filtered using a low pass finite impulse response digital filter. The resulting filtered signal is sampled at the time slot rate and supplied in companded form as an output to the time slots of the digital line. Prior to operating the filter, the ratio of the time slot rate to the sample rate is determined. The ratio is expressed in a form that is a ratio of the smallest possible integers. The numerator of the resulting ratio is designated P and the denominator is designated I.Type: GrantFiled: December 22, 1995Date of Patent: June 16, 1998Assignee: Paradyne CorporationInventors: William Lewis Betts, Keith Alan Souders
-
Patent number: 5530721Abstract: An equalizer for use in a receiving system of a code transmission system has a plurality of series-connected delay elements, a plurality of coefficient units for weighting tap output signals extracted in parallel from the delay elements, an adder for adding output signals from the coefficient units, and a tap coefficient setting circuit for adjusting the weighting of the coefficient units. The tap coefficient setting circuit has a multiplier for multiplying a differential signal, the differential signal representing a difference between an output signal from the equalizer and a predetermined reference signal, and the tap output signals, a variation detecting circuit for being supplied with an output signal from the multiplier and detecting a variation of tap coefficients, and an accumulating circuit for outputting established tap coefficients based on an output signal from the variation detecting circuit.Type: GrantFiled: February 8, 1995Date of Patent: June 25, 1996Assignee: Sony CorporationInventors: Akira Inoue, Mitsuhiro Suzuki
-
Patent number: 5422909Abstract: The present invention provides a downconverter method and apparatus for downconverting a multiphase modulated signal. The downconverter can be implemented in a multi-phase receiver such as a quadrature receiver. An analog-to-digital converter (103) converts an intermediate frequency signal to a digital signal at a sampling rate. A Hilbert transformation filter (104) and a delay element (105) connected in parallel provide respective passband quadrature and in-phase components of the digital signal. A digital translator (107) alters the passband quadrature and in-phase components based on a predetermined pattern to provide a baseband quadrature signal and a baseband in-phase signal. The digital translator (107) can be a pseudorandom sequence demodulator for demodulating a code division multiple access (CDMA) signal. Various types of DC estimation can also be provided in addition to automatic gain control.Type: GrantFiled: November 30, 1993Date of Patent: June 6, 1995Assignee: Motorola, Inc.Inventors: Robert T. Love, Kenneth A. Stewart, Bryan Rapala