Abstract: A programmable apparatus is disclosed for generating a frequency modulated signal at a selected center frequency in accordance with digital data of at least first and second data levels. The modulating apparatus comprises a modulator having an input and an output and is responsive to an input modulation signal applied to its input for generating at its output the frequency modulated signal at a center frequency dependent on a quiescent voltage appearing at its input. A circuit is provided for sampling and storing a value of the quiescent voltage. An addressable memory stores a plurality of offsets. A programmable adding circuit adds a downloaded offset voltage to the stored value of the quiescent voltage to output a high modulation voltage. A programmable subtracting circuit subtracts a downloaded offset voltage from the stored value of the quiescent voltage to provide a low modulation voltage.

Abstract: A digital modulator capable of obtaining a high FM modulation index and reducing the quantization noise without increasing the sampling frequency of an A/D converter of input voice. A phase variation .phi.(Ts) of the digital data (Ts is the sampling period) produced on the basis of the output from the A/D converter is divided by a predetermined integer N (N>1) by a divider, and is fed to an integrator. The integrator integrates the divided phase variation .phi.(Ts)/N for every time interval Ts/N, thereby producing a phase component .phi.(t) of the complex envelope of the modulation signal. The phase component .phi.(t) is resolved into cosine and sine components at the time interval Ts/N. The cosine and sine signals are D/A converted into analog signals which are quadrature modulated by a quadrature modulator.

Abstract: A frequency synthesizing circuit has an input on which a bit flow is received, and an output on which a data-modulated output signal is supplied. The circuit moreover comprises a crystal oscillator supplying a reference clock signal, a phase-locked loop (PLL) having a VCO and a phase detector. The phase detector compares the data-modulated output signal with the reference clock signal and, in response to this, supplies an error signal by means of which the VCO output frequency is controlled. A compensation circuit, which receives a measure of the bit flow received, compensates the data-modulated output signal in the phase-locked loop in response to this before it is supplied to the phase detector.

Abstract: A method and a transmitter system is provided for modulating binary information on a frequency shift keying carrier in a very narrow band. Phase reversal keying is initially used to create a carrier. The transmitter of the present invention generates a carrier signal by modulating a reference signal and a control signal having two frequencies representing the binary data to be transmitted. The resulting phase reversal carrier signal is processed by high order filtering such that the output of the transmitter provides a frequency shift keyed carrier at very close frequencies. The resulting carrier signal may, at the receiver, be processed by very narrow band filtering so as to create a communication system which will use only a small part of the available spectrum.

Abstract: A method and apparatus for implementation of a code division multiple access encoding scheme in a fiber-optic network. One preferred embodiment of the present invention provides an encoder and decoder for each terminal in the communications network, for example SONET OC-3, and allows each terminal to transmit their signals into the fiber-optic network at random. Because no time slot management is used, signals from all terminals interfere with one another. A coding technique is used by each decoder to sort its own signal out of this interference. The encoded data from each terminal is modulated with a technique known as MFSK (multiple frequency shift keying). The modulated signal is further used to intensity-modulate a semiconductor laser diode which may or may not be a single wavelength laser. At the receiver, the combined interference signal is first detected by a optical intensity detector and then sent to a frequency tone detectors which demodulate the MFSK signal.

Abstract: A transponder unit (10) includes an N cycle counter (30) and an M cycle counter (28). The N cycle counter (30) has a different cycle value than the M cycle counter (28). During the transmission of information from the transponder unit (10), the duration for data bits having a binary zero value is controlled by the N cycle counter (30). The duration of data bits having a binary one value is controlled by the M cycle counter (28). The use of different cycle values within the N cycle counter (30) and the M cycle counter (28) allows for the transmission of binary one and binary zero data bits having the same bit length despite different frequencies representing the binary one and binary zero bits respectively.

Abstract: A highly reliable and high-speed data transmission is made by using an FH or MFSK mode as suitably selected according to the usage of channels. When a reception signal is entered into a receiver through a transmission line, (i) a signal processing unit supplies the spectrum intensity values of carrier frequencies, (ii) a channel detection unit controls the phase of a time slot based on the spectrum intensity values, selects the MFSK or FH modulation mode, and supplies reception code data corresponding to detected carrier frequencies, and (iii) a decoder supplies reception information data based on the reception code data.

Abstract: The output of a voltage-controlled oscillator (VCO), after being passed through a resonator having a single-peak characteristic, is detected by a detector. The output of the detector is sampled and held at a time instant that the control input voltage to the VCO reaches a maximum and also at a time instant that it reaches a minimum, and the difference between them is fed back to the control input of the VCO. In this way, the center frequency of the VCO is controlled so that it becomes equal to the center frequency of the resonator. In the case of a VCO as an FM modulator in an FM-CW radar, the sample-and-hold timing is derived from a clock signal based on which a triangle wave is generated. In the case of a VCO as an FSK modulator, the sample-and-hold timing is obtained by detecting a 0 and a 1 in input data.

Abstract: The FSK modulator for modulating binary data of the present invention has an object to provide an FSK modulator which can operate at a stable frequency also when a discontinuous data row is entered. The FSK modulator comprises a PLL (phase locked loop) in which binary data is entered at two types of voltage levels different each other, an oscillation output of the PLL treated as output data of the modulator, allows a voltage at an almost-intermediate level to the PLL instead of binary data when the binary data has not been entered.

Abstract: A transmitter which can easily suppress diffusion of a spurious signal with a simple constitution, wherein the on/off operations of the transmitting circuit and the carrier signal generating circuit are controlled by the first control signal which rises at the predetermined timing and falls at the predetermined timing, and the on/off operation of the modulator is controlled by the second control signal which gently rises at the same or later timing than the rise timing of the first control signal and gently falls at the same or earlier timing than the fall timing of the first control signal, so that a phenomenon which is similar to pulse modulation of the leaked carrier signal fc becomes hard to be generated, therefore diffusion of the spurious signal can be suppressed.

Abstract: A PLL-mode radiofrequency module capable of being connected to a transmitter of any kind. The PLL-mode module is provided therein with a CPU, which functions to vary a waveform of a PPM signal fed thereto from a transmitter body so as to permit a pulse duty ratio of the PPM signal to be about 50%. The PPM signal thus varied is fed to a modulation circuit and then subjected to FSK modulation, so that a PLL oscillator constituted by a PLL circuit and a modulation circuit or voltage control oscillator generates a frequency as indicated by a rotary switch. A carrier frequency controller thus constructed is arranged on a side of the PLL-mode radiofrequency module rather than the transmitter body, so that the PLL-mode radiofrequency module may be connected to a transmitter of any kind.

Abstract: A remote ground terminal transmitter for transmitting a modulated data signal having a constant envelope amplitude. The remote ground terminal transmitter comprises a source of data signals, a modulator for providing a carrier signal, receiving a data signal from the source of data signals, and modulating the carrier signal with the received data signal so as to produce a constant envelope minimum shift key modulation signal. The transmitter further comprises a power amplifier which operates in the saturation mode to amplify the modulated carrier signal produced by the modulator to the desired power level.

Abstract: A signal FSK-modulated with a binary data signal has first signal portions representing first logical level data contained in the binary data signal and second signal portions representing second logical level data contained in the binary data signal. Each of the first signal portions has a first frequency and lasts for a first time period and each of the second signal portions has a second frequency and lasts for a second time period. These first and second time periods are determined such that a number of cycles of the FSK-modulated signal appearing in each of the first time periods is equal to a number of cycles of the FSK-modulated signal appearing in each of the second time periods.

Abstract: A circuit for two-level/four-level frequency shift keying modulation, which may be used for a paging transmitter, is compatible with earlier two-level non-return to zero frequency shift keying modulation circuits and includes; a voltage leveling circuit for generating four voltage levels to selectively allow the two-level and four-level frequency shift keying modulation; a decoder for decoding the least significant bit and most significant bit data inputs to generate a decoded signal output; an analog switch for selecting the four voltage levels in accordance with the two-level or four-level frequency shift keying modulation, in response to the decoded signal; an adder for adding the selected voltage level to a reference voltage to generate a corresponding digital output voltage; an audio amplifier for amplifying an audio signal input; an input/filter selector for selecting the digital output voltage or the amplified audio signal in response to an input selection control signal and for selecting one of two fi

Abstract: A dual-mode digital communication system for communicating an information signal during operation in frequency-modulated (FM) and multiple-access modes is disclosed herein. The digital communication system includes a dual-mode transmitter for transmitting the information signal using an FM communication signal during FM mode operation, and for transmitting the information signal using a multiple-access communication signal during multiple-access mode operation. The communication system further includes a dual-mode receiver for receiving the FM communication signal during FM mode operation, and for receiving the multiple-access communication signal during multiple-access mode operation. Incorporated within the dual-mode receiver is a digital demodulator for recovering the information signal from the received FM signal during operation in the FM mode, and for recovering the information signal from the received multiple-access signal during multiple-access mode operation.

Abstract: A digital modulator capable of obtaining a high FM modulation index and reducing the quantization noise without increasing the sampling frequency of an A/D converter of input voice. A phase variation .phi.(Ts) of the digital data (Ts is the sampling period) produced on the basis of the output from the A/D converter is divided by a predetermined integer N (N>1) by a divider, and is fed to an integrator. The integrator integrates the divided phase variation .phi.(Ts)/N for every time interval Ts/N, thereby producing a phase component .phi.(t) of the complex envelope of the modulation signal. The phase component .phi.(t) is resolved into cosine and sine components at the time interval Ts/N. The cosine and sine signals are D/A converted into analog signals which are quadrature modulated by a quadrature modulator.

Abstract: A FSK modulator which uses the combination of a state machine and a toggle flip-flop to generate the FSK signals. The state machine has a loop having a predetermined number of states. The number of clock cycles that the state machine takes to traverse the loop depends on the state or level of the signal at the input to the modulator. The flip-flop converts the state machine output signal to a signal having a rectangular waveform.

Abstract: A radio-frequency module detachably mounted to a transmitter in a radio-control apparatus to supply a high frequency signal to a transmitter. The module includes a phase-lock loop (PLL) circuit along with low pass filters and a voltage controlled oscillator to form a PLL oscillator loop. A rotary switch which is manually set provides an indication to a microprocessor of the desired frequency. The microprocessor supplies the PLL circuit with frequency data. An error voltage is generated by the low pass filters.

Abstract: A digital frequency shift keying (FSK) transmitter provides direct frequency modulation in a wide bandwidth loop. In one embodiment, a discriminator circuit recovers from the output signal of the transmitter a base band signal, which is then compared with the input base band signal to provide an error signal for controlling the output oscillator circuit. In another embodiment, the output oscillator is controlled by a phase detector detecting the phase difference between the base band modulating signal and the output signal of the transmitter. An additional narrow bandwidth loop can be added to compensate for frequency drift in the output oscillator due to temperature or other environmental changes.

Abstract: A method and modulator for modulating a digital signal to an analog intermediate-frequency signal. A baseband digital signal (I, Q) is taken to a digital-to-analog converter (71, 710) in which it is sampled at a certain sampling frequency (f.sub.in) and converted to an analog signal. The conversion produces a baseband signal (f.sub.sig) and signals (N*f.sub.in, f.sub.Ni) at multiples of the sampling frequency (f.sub.in). The sampling frequency is increased, advantageously according to a sigma-delta D/A conversion, and one of the signals (N*f.sub.in,f.sub.Ni) at multiples of the sampling frequency (f.sub.in), produced by the conversion, is selected as the output signal (f.sub.IF), advantageously a multiple (N*f.sub.in, f.sub.Ni) of the sampling frequency that is directly at the intermediate frequency or transmission frequency.

Abstract: An apparatus and method of transmitting digital data over a coaxial cable a noisy environment using several carriers with narrower bandwidths in place of the single carrier with a wide bandwidth. In a frequency spectrum, these several carriers are located between interfering harmonic and spurious noise frequencies generated by the other signals, an particularly clock signals. These narrow signals are then combined for transmission over a cable, substantially reducing noise in the signal recovered at the receiving end.

Abstract: A collision detection method and apparatus which is suitable for use in a wireless CSMA/CD network, or other wireless networks where collision detection is provided. The apparatus includes a detector which detects intermodulation or other mixing products of colliding data transmissions at a station in the network, and a signal processor which indicates collisions between the data transmissions based upon characteristics of the intermodulation products. The system is capable of detecting collisions, both between transmissions from the station on which the device is located and transmissions from other sources, and between two transmissions being received from other sources. The station includes a transmitter having an input for a data packet. Resources coupled to the input add a header to the data packet, the header having characteristics monitored by the collision detector circuitry including a pseudo-random bit sequence.

Abstract: A system for the transmission of data, and a modem for use in such a system, utilize variable shift keying (VSK), in which a data signal is modulated to form a continuous phase signal in which successive symbols are represented by successive signal segments of constant phase angle, typically 180.degree. or one half cycle, different symbols being distinguished by the segments being of different duration, i.e. at different frequencies. The ratios of the frequencies may be chosen to facilitate signal modulation and demodulation, and to control the frequency spectrum of the transmitted signal. Each symbol may represent one or more bits of the data signal. The lengths of half cycles used to represent different symbols may be adjusted by introducing flat peaks into the half cycles whilst maintaining uniform the profile of their flanks so as to facilitate generation and reduce zero crossing detection jitter during reception.

Abstract: An electronics circuit for frequency shift keying a continuous-running caer, such as a sinewave, which allows the user to vary two closely spaced frequencies from a personal computer. The electronics circuit of the present invention comprises a microcontroller which has stored therein a lower frequency and an offset frequency. After the electronics circuit is powered up the microcontroller enters the MAIN program and generates control and address signals to effect a transfer of thirty two data bits representing the lower frequency from the microcontroller to a pair of eight bit RAMS. A programmed array logic device, which receives addresses from the microcontroller, decodes the addresses and then provides chip select and output enable signals to the RAMs to allow the thirty two data bits to be written into the RAMs with the write signal being provided by the microcontroller.

Abstract: Continuous phase modulated (CPM) signals, such as quaternary CPFSK signals, are filtered to limit their bandwidth while simultaneously minimizing the amount of amplitude modulation and intersymbol interference introduced by this filtering process. By designing a modulation filter such as a finite impulse response (FIR) filter to add only a nominal, controlled amount of amplitude modulation, high efficiency, nonlinear power amplifiers may be employed to transmit the filtered CPFSK signals. Although the filter adds a small amount of amplitude modulation and intersymbol interference, digital signal processor-based receivers satisfactorily demodulate this type of signal using sequence estimation algorithms such as the Viterbi algorithm. Thus, the filtering of CPM signals permits narrowing of the transmitted signal spectrum while managing the intersymbol interference resulting from the controlled amount of amplitude modulation added by filtering.

Abstract: A multiple-modulation communication system includes a transmitter that modulates and transmits communication signals modulated by a first modulation technique and communication signals modulated by a second modulation technique. The first modulation technique and the second modulation technique are different. The communication system also includes a receiver capable of receiving the communication signals modulated by the first modulation technique and the communication signals modulated by the second modulation technique and demodulating the communication signals.

Abstract: A communication system (100) encodes and decodes information utilizing at least four modulation levels for transmitting the information as symbols representing symbol bits in symbol bit positions. At least one of the symbol bit positions exhibits an error rate higher than that of another of the positions. A processor (204) encodes (702) the information into an even number of code words and transmits the code words as an interleaved data stream. The processor (204) rearranges (706, 708) the transmission order of the code word bits in a predetermined way to form a modified transmission order such that the code words are transmitted (710) with substantially equal error rates. A receiver (110) receives and demodulates (712) the interleaved data stream to derive the code word bits, and then reorders (714, 716) the code word bits to undo bit modifications resulting from the modified transmission order, thereby restoring the code words. The receiver then decodes the code words to recover the information.

Abstract: A pullable overtone crystal oscillator (201) includes an impedance buffer (217) for buffering an input impedance (109) to an amplifier stage (203). This structure enables construction of an overtone oscillator with increased pullability because a drive level of a crystal (221) can be set independent of the input impedance (109) of the amplifier stage (203).

Abstract: A programmable apparatus is disclosed for generating a frequency modulated signal all a selected center frequency in accordance with digital data of at least first and second data levels. The modulating apparatus comprises a modulator having an input and an output and is responsive to an input modulation signal applied to its input for generating at its output the frequency modulated signal at a center frequency dependent on a quiescent voltage appearing at its input. A circuit is provided for sampling and storing a value of the quiescent voltage, An addressable memory stores a plurality of offsets. A programmable adding circuit adds a downloaded offset voltage to the stored value of the quiescent voltage to output a high modulation voltage. A programmable subtracting circuit subtracts a downloaded offset voltage from the stored value of the quiescent voltage to provide a low modulation voltage.

Abstract: Applicant's invention includes an apparatus and associated method for transmitting information at a high rate using an undermodulated frequency shift keyed signal. The transmission rate is independent of the data content and the system requires no zero crossing detectors. The demodulator combines non-linear processing circuitry with a conventional demodulator.

Abstract: The spectral encoding-decoding system and method are for encoding a sequence of N data bits where N is a predetermined integer, into an information signal to be transmitted on a communication medium, and for decoding the information signal transmitted on the communication signal into an estimated sequence of N data bits. The system comprises an encoder and a decoder. The encoder receives the sequence of N data bits, encodes the sequence into the information signal, and emits the information on the communication medium. The decoder receives the information signal transmitted on the communication medium, decodes the information signal and transmits the estimated sequence of N data bits. The method corresponds to the operations performed by the system.

Abstract: A direct digital frequency synthesizer increases the frequency resolution of the analog output signal by using fractionalization techniques. The best integer value I.sub.FR of a digital signal is determined and the next integer value I.sub.FR +1 of a digital signal is used to determine a weighted fractionalized value of the digital signal. The fractionalized value of the digital signal is used to synthesize the analog output signal having increased frequency resolution. In addition, IFR and IFR+1 are optimally distributed during the weighting process to ensure a minimum cumulative phase error.

Abstract: Modulator especially for digital cellular telephone systems, characterised in that it comprises a programmable peripheral processor (25) carrying out, with the same circuits, the modulation function and the channel coder/decoder tasks.

Abstract: In a modulation scheme involving differential encoding and Reed-Solomon encoding, the differential encoding is performed before the Reed-Solomon encoding in the transmitter. In the receiver, a differential decoding operation is performed after an RS decoding operation. The overall coding scheme and the RS decoding are so arranged as to ensure that the RS decoding will be proper in the presence of phase rotations, notwithstanding the fact that the differential encoding is performed before the RS encoding in the transmitter and the fact that the RS decoding is performed before the differential decoding in the receiver.

Abstract: A phase-locked loop frequency modulation circuit that compensates for the inability of a phase-locked loop to pass low-frequency content of an input modulation signal, and that may be utilized with existing communication apparatus, such as a cellular telephone voice radio, for accurate data transmission without having to modify such apparatus, includes a compensation circuit for processing an input modulation signal to provide a compensation signal that is added to a loop filter output signal by processing the input modulation signal to provide the same effect as adding the input modulation signal to an integrated input modulation signal that is filtered by a filter having the same transfer function as the loop filter to provide the compensation signal.