Wafers Positioned Vertically Within Cassette Patents (Class 414/938)
  • Patent number: 6095806
    Abstract: A boat for semiconductor wafers includes first, second and third support rods arranged between and connected to top and bottom plates. The first, second and third support rods include a plurality of first racks, a plurality of second racks, and a plurality of third racks, respectively, such that the racks of each rods are vertically arrayed with gaps therebetween. The first, second and third racks serving to define a plurality of horizontal wafer supporting levels. Each wafer supporting level is defined by only combination of the first, second and third racks of the corresponding height. In each wafer supporting level, the first and second racks are arranged substantially in symmetry with respect to an axis passing through the center of a wafer transfer port, and the third rack is arranged deviant from the axis by a certain distance corresponding to 5% to 48% of the diameter of the wafer.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: August 1, 2000
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Shizuo Suzuki, Hisashi Kitamiya, Hirofumi Kitayama
  • Patent number: 6092981
    Abstract: The present invention generally provides a modular substrate cassette used to store substrates. The modular substrate cassette is designed to use different components that may be collectively assembled into different cassette configurations while substantially reducing or eliminating custom and complex fabrication costs. The modular substrate cassette may accommodate multiple substrate sizes, including 100 mm, 200 mm, and 300 mm substrates, as well as a variety of substrate shapes, including circular, square, and rectangular. In a preferred embodiment, the substrate supports use materials from standard geometries of bar stock and/or plate stock to minimize the costs of production. Also, in a preferred embodiment, the substrate cassette is designed to allow multi-directional access to substrates stored in the cassette.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: July 25, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Ken Pfeiffer, Greg Verdict
  • Patent number: 6092971
    Abstract: For removing and transporting several spaced, parallel wafers stored in a container, a gripping device is provided. The gripping device has a holding rake and several gripping heads which can be rotated with respect to the holding rake. In one swivel position, the gripping heads are moved through between the wafers and then swivelled into another swivel position. In this latter position, the gripping heads are brought to a stop against the edges of the wafers movement of the gripping device, and then the opposite edges of the wafer disks are brought to stop against the counterholder by displacement of the counterholder. All wafers contained in the container are thus simultaneously securely held and can be displaced out of the container. In order to then swivel the wafers, the holding rake which has slots for receiving the wafer edges is also stopped at the wafer edges, and the counterholder is then pushed back. The wafers are therefore securely swivelled.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: July 25, 2000
    Assignee: Staeubli AG
    Inventors: Christian Balg, Bernhard Strasser, Jakob Blattner
  • Patent number: 6086976
    Abstract: A semiconductor wafer comprising a single crystalline lattice suitable for use in the manufacture of integrated circuits, namely computer chips and dies, wherein a diameter of the wafer is greater than approximately 150 millimeters and wherein the wafer includes a first hole extending through the wafer. The hole is adapted to facilitate handling of the wafer without directly contacting a surface of the wafer. The wafer preferably includes a primary flat and the first hole includes a flat side having a predetermined and known orientation with respect to the primary flat of the wafer. In one embodiment, the wafer further includes a guide hole formed near the first hole such that the center-points of the first hole and the guide hole are oriented with a predetermined and known orientation with respect to the primary flat of the wafer.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: July 11, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark I. Gardner, Mark C. Gilmer
  • Patent number: 6083566
    Abstract: The present invention relates in a system and method for handling and processing substrates for magnetic and optical media and other types of substrates, such as wafers and lenses, requiring thin-film coatings. The system includes input and output locks which act as buffers between atmosphere and the high vacuum within the system and a transfer/main chamber which is comprised of a variable number of chamber modules. The system also includes various mechanisms for moving the substrates and the substrate carriers within the system, and components for dealing with the process and environmental requirements.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: July 4, 2000
    Inventor: Andrew B. Whitesell
  • Patent number: 6074515
    Abstract: In a substrate processing apparatus receiving substrates held in a common carrier in a horizontal attitude, the substrates are transferred in the horizontal attitude from the common carrier to an exclusive carrier. The exclusive carrier is rotatable on a horizontal axis. By rotating the exclusive carrier, the substrates are turned from the horizontal attitude to a vertical attitude. Then, the substrates held in the vertical attitude are taken out of the exclusive carrier and transferred to a processing part for processing in the vertical attitude. This allows a simple and speedy turn of the plurality of substrates. Further, even the apparatus for processing the substrates in a vertical attitude can transfer the substrates into and out of the apparatus in the horizontal attitude by using the common carrier.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: June 13, 2000
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Izuru Iseki, Seiichiro Sato, Yusuke Muraoka
  • Patent number: 6055694
    Abstract: A wafer scrubbing machine is provided with a network of wafer holders which can be moved from a retracted position adjacent each other at a wafer receiving station to an expanded position spaced apart from each within a scrubbing station. The wafers are picked up simultaneously by pairs of depending arms in the scrubbing station and passed between pairs of rotating brushes for cleaning purposes. A common drive wheel is provided to rotate the wafers simultaneously during scrubbing between the brushes. A second network of wafer holders is provided to receive the scrubbed wafers in the scrubbing station and to move into a retracted position within a delivery station for transfer of the cleaned wafers into a cassette for subsequent processing. Two sets of networks may be provided on a common rotatable assembly in order to accommodate two different sizes of delivered wafers.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: May 2, 2000
    Assignee: TSK America, Inc.
    Inventor: Colby R. Steere
  • Patent number: 6053689
    Abstract: A guided vacuum pick-up device for picking up wafers in a wafer storage cassette and a method for using such device. In the device, a vacuum pick-up head is equipped with a guide member which intimately engages a guide bar molded on a wafer storage cassette such that the movement of the vacuum pick-up head can be precisely indexed to the spacing between the adjacent wafers by engaging a guide pin on the guide member to one of a number of positioning grooves provided circumferentially on the guide bar. The device can be used for picking up or putting back wafers in a wafer storage cassette without the danger of scratching or breaking the wafers by accidentally colliding with the wafers.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: April 25, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventor: Meng Chun Li
  • Patent number: 6042372
    Abstract: A vertical heat treatment apparatus for semiconductor wafers (W) including a heat treating furnace (19) which is heated to 600.degree. C. or higher. In the heat treating furnace (19), the wafers (W) are subjected to batch treatment while they are placed on a boat (16). A preparatory vacuum chamber (102) is airtightly connected to a lower side of the heat treating furnace (19). Disposed in the preparatory vacuum chamber (102) are a horizontal transfer mechanism (201) and a vertical transfer mechanism (202) for transferring the boat (16). The two transfer mechanisms (201 and 202) are supported by support members (29a and 33a) mounted on a mechanical base (28). The preparatory vacuum chamber (102) and the support members (29a and 33a) are airtightly connected to each other by means of bellows.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: March 28, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Kazunari Sakata, Tamotsu Tanifuji, Akihiko Tsukada
  • Patent number: 6033521
    Abstract: A tilt mechanism for periodically tilting a cassette configured to hold a plurality of wafers or workpieces such that the wafers or workpieces become gravity-loaded against a rear portion of the cassette. The tilt mechanism is mounted entirely above a worktable of a CMP or other processing machine and comprises a housing which houses a circular cam having a spiral groove formed therein. A tilt arm is pivotally mounted to the housing and extends vertically between a lower end which is adjacent the cam and an upper end which is fixed to a platform supporting a cassette holding a plurality of workpieces. A cam follower is attached to the lower end of the arm and projects into the groove. Rotary motion of the cam effects pivotal movement of the tilt arm which, in turn, effects tilting of the support platform and the cassette.
    Type: Grant
    Filed: June 4, 1997
    Date of Patent: March 7, 2000
    Assignee: SpeedFam-IPEC Corporation
    Inventors: Robert F. Allen, Ricardo T. Jordan
  • Patent number: 6014817
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: January 18, 2000
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 6013134
    Abstract: An apparatus for forming a portion of an electronic device is described incorporating an Ultra High Vacuum-Chemical Vapor Deposition (UHV-CVD) system, a Low Pressure-Chemical Vapor Deposition (LP-CVD) system, and an Ultra High Vacuum (UHV) transfer system. A method for passivating a semiconductor substrate is described incorporating growing silicon containing layers, flowing a hydrogen containing gas and lowering the substrate temperature below 400.degree. C. A method for removing native oxide is described. A method for growing a continuous epitaxial layer while performing a deposition interrupt is described. A method for forming a Si/Si oxide interface is described having low interface trap density. A method for forming a Si/Si oxide/p++ polysilicon gate stack. The invention overcomes the problem of requiring silicon containing wafers being dipped in HF acid prior to CVD processing. The invention overcomes the problem of surface passivation between in-situ processes in multiple CVD reactors.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jack Oon Chu, Khalid Ezzeldin Ismail
  • Patent number: 6013894
    Abstract: Method and apparatus for laser texturing a magnetic recording disk substrate, including a disk-loading and unloading conveyer, a pair of disk-carrying spindles and associated laser systems disposed in spaced-apart relationship, and a disk-handling mechanism disposed between the conveyer and the set of spindles and operative to obtain a first disk rom the conveyer, place it on a first spindle for texturing on one side, remove the partially textured first disk from the first spindle, flip it upside down and place it on a second spindle for texturing on the other side, while at the same time obtaining a second disk from the conveyor and loading it onto the first spindle for texturing on one side. A third disk is then removed from the conveyor and loaded onto the first spindle as the second disk is removed therefrom, flipped over and placed on the second spindle as the first disk is removed therefrom and returned to the conveyor.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: January 11, 2000
    Assignee: Laserway, Inc.
    Inventors: Zheng Da Cheng, Yi Wei Xia
  • Patent number: 6007675
    Abstract: An apparatus and method are described for stripping the photoresist from a wafer while in a substantially parallel manner, another wafer is being transferred between a load lock chamber and a transfer chamber, where the processing occurs. Further, a system is described whereby two load lock chambers are employed so that processing of wafers can continue uninterrupted by a delay caused by the need to open, empty, reload and re-equilibrate a single load lock chamber. Still further, a system is described for performing multi-step dry-stripping applications requiring different conditions for two or more of the steps wherein the steps may be performed simultaneously or sequentially. Finally, a system combining a dry-stripping module and a wet-cleaning module is described which combination system permits the continuous, fully-automated dry-stripping and wet-cleaning of wafers and, upon completion of the entire processing cycle, returning wafers to their original wafer cassettes.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: December 28, 1999
    Assignee: Gamma Precision Technology, Inc.
    Inventor: Masato Toshima
  • Patent number: 5996241
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: December 7, 1999
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 5993081
    Abstract: An in-line processing system having an exposure processing unit and a coating and development processing unit is provided with a conveyance arm for transferring a workpiece between these units. The conveyance arm can access to each of these units, and these units have horizontal workpiece holding planes of substantially the same level. The workpiece can be conveyed between these units while being kept laid horizontally.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: November 30, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Itoh, Shinji Tsutsui, Masahide Sato
  • Patent number: 5988971
    Abstract: In one aspect, the present invention provides an apparatus for transferring wafers to or from a wafer cassette having a plurality of wafer-receiving slots, wherein the apparatus comprises a wafer paddle which is adapted to be inserted into a wafer cassette alongside a wafer. Edge grippers carried by the wafer paddle releasible grip the wafer by its edges. A first capacitive sensor carried by the wafer paddle is oriented in a first direction for sensing information about a wafer in a wafer receiving slot of the wafer cassette. A second capacitive sensor carried by the wafer paddle is oriented in a direction perpendicular to the first direction for sensing additional proximity information about a wafer in a wafer receiving slot of the cassette. A transport mechanism produces movement of the wafer paddle along at least three axes of movement to permit transferring wafers to or from respective wafer receiving slots of the wafer cassette.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: November 23, 1999
    Assignee: ADE Optical Systems Corporation
    Inventors: Michael E. Fossey, Kirk Rodney Johnson, Noel Stephen Poduje
  • Patent number: 5989346
    Abstract: In a semiconductor processing apparatus, an external transfer mechanism transfers substrates between a cassette for storing a plurality of target substrates by vertically arranging the substrates at first intervals, and a processing section for performing semiconductor processing for the substrates. The external transfer mechanism has first and second arms defining first and second support surfaces each of which can support one of the substrates and capable of vertically moving relative to each other. An interval adjuster is disposed to adjust an interval in a vertical direction between the first and second support surfaces by moving the first and second arms relative to each other. An arm driving base is disposed to move the first and second arms between a position at which the first and second arms oppose the cassette and a position at which the first and second arms oppose the processing section.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: November 23, 1999
    Assignee: Tokyo Electron Limited
    Inventor: Tsutomu Hiroki
  • Patent number: 5980188
    Abstract: An apparatus and method for carrying wafers through a multi-step process for producing a semiconductor, without using a cassette, where the apparatus senses whether a wafer is mis-loaded. The apparatus includes a plurality of optical sensors positioned above the wafers for sensing whether a wafer is mis-loaded by transmitting light past circumferential edges of the wafers.
    Type: Grant
    Filed: November 28, 1997
    Date of Patent: November 9, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-in Ko, Jae-sang Park, Kyung-soo Kim, Jae-bum Park
  • Patent number: 5980195
    Abstract: An apparatus is provided with a plurality of stages of mounting bases on each of which is disposed upwardly orientated, narrow tapered pins around the periphery of a semiconductor wafer, and a plurality of stages of turntables, one for each of the mounting bases, with the mounting bases being capable of moving independently of the turntables. When a wafer is transferred from a transporter arm to the tapered pins, the peripheral edge of the wafer comes into contact with the inner peripheral surfaces of the tapered pins and the wafer is centered thereby. The turntable then picks up the wafer and aligns the orientation thereof. This makes it possible to position the centers of a plurality of wafers and position the orientations thereof in a simple manner.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: November 9, 1999
    Assignee: Tokyo Electron, Ltd.
    Inventor: Masahiro Miyashita
  • Patent number: 5975740
    Abstract: An apparatus, method and medium is provided for increasing the efficiency with which wafers are transferred among different processing chambers in a wafer processing facility. A multi-slot cooling chamber allows multiple wafers to be cooled while other wafers are subjected to processing steps in other chambers. Each wafer in the processing sequence is assigned a priority level depending on its processing stage, and this priority level is used to sequence the movement of wafers between chambers. A look-ahead feature prevents low-priority wafer transfers from occurring if such transfers would occur just prior to the scheduling of a high-priority wafer transfer.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: November 2, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Zhihong J. Lin, Chongyang Wang
  • Patent number: 5944940
    Abstract: A wafer transfer system is described for transferring a wafer while at substantially the same time another wafer is being processed. The wafer transfer system comprises, in one embodiment, a transfer chamber having a wafer transfer blade, a load lock chamber coupled to the transfer chamber, an atmospheric robot for loading and unloading the wafer into the load lock chamber, and a slider coupled to the wafer transfer blade for moving the wafer transfer blade between the transfer chamber and the load lock chamber. According to a preferred embodiment, the slider utilizes a magnetic coupling mechanism. In a further embodiment, a device comprising a transfer chamber coupled to a plurality of plasma sources capable of simultaneously or sequentially providing different plasma structures within the transfer chamber, is described.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: August 31, 1999
    Assignee: Gamma Precision Technology, Inc.
    Inventor: Masato Toshima
  • Patent number: 5935330
    Abstract: An automatic wafer plating equipment for automatically plating wafers and more particularly, for automatically plating a small lot of wafers is disclosed. The automatic wafer plating equipment includes a transfer robot provided with a holding arm for pivoting, vertical movement, extending and extracting, a load stage, an orientation stage, a plating stage, a recovery stage, and a cleaning stage. The transfer robot carries out a series of the following operations for plating process. The wafers are picked up one by one from a supply cassette loaded to the load stage. The wafer is then fed to the orientation stage. The wafer orientated at the orientation stage is conveyed to the plating stage. The plated wafer is transferred from the plating stage to the recovery stage. When residue of a plating liquid has been recovered at the recovery stage, the wafer is conveyed to the cleaning stage.
    Type: Grant
    Filed: July 28, 1997
    Date of Patent: August 10, 1999
    Assignee: Electroplating Engineers of Japan Ltd.
    Inventor: Kazuhiro Taniguchi
  • Patent number: 5900105
    Abstract: A wafer transfer system is described for transferring a wafer while at substantially the same time another wafer is being processed. The wafer transfer system comprises, in one embodiment, a transfer chamber having a wafer transfer blade, a load lock chamber coupled to the transfer chamber, an atmospheric robot for loading and unloading the wafer into the load lock chamber, and a slider coupled to the wafer transfer blade for moving the wafer transfer blade between the transfer chamber and the load lock chamber. According to a preferred embodiment, the slider utilizes a magnetic coupling mechanism and a plurality of plasma sources are coupled to the transfer chamber. The plurality of plasma sources are arranged in a plurality of pairs of plasma sources. Each plasma source in a pair of plasma sources share the other plasma source's induction coils.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: May 4, 1999
    Assignee: Gamma Precision Technology, Inc.
    Inventor: Masato Toshima
  • Patent number: 5888048
    Abstract: A system for automatic loading of wafer boats onto a cantilever paddle for insertion of the wafer boats into a furnace tube includes an end effector carriage moving on a track and supporting an end effector having spaced, parallel pads to engage opposed outer side portions of a wafer boat. The end effector receives a wafer boat from a robotic arm of an elevator. The robotic arm moves transversely relative to the track to position the wafer boat over the track on which the paddle carriage moves. The end effector carriage moves the end effector pads under the wafer boat, lifts it from a pair of elevator tines, moves the wafer boat over a desired part of the paddle, and lowers the wafer boat onto the paddle. The end effector carriage then returns the end effector to an initial location.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: March 30, 1999
    Assignee: Amtech Systems, Inc.
    Inventors: John M. Martin, Arthur W. Harrison
  • Patent number: 5885045
    Abstract: A system includes an interface for receiving a pod having a carrier that receives wafers, and that is initially enclosed within a base and a pod cover. The system also includes a mechanism that transfers an exposed carrier between the interface and a platform of a mass-transfer machine included in the system. The machine includes a gantry arm for transferring the carrier between the platform and a transfer station. A retainer assembly is positionable over the carrier at the transfer station, and over a process carrier that is used in a processing tool. Moveable retainers of the assembly receive and hold wafers. The machine includes an elevator that moves between the transfer station and the process carrier. The elevator extends and retracts for transferring wafers between the retainers and either the carrier or the process carrier. A turntable, that receives the process carrier, permits automatically reorienting wafers.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: March 23, 1999
    Assignee: Fortrend Engineering Corporation
    Inventor: John M. Rush
  • Patent number: 5858103
    Abstract: A radius of 0.1-1 mm is provided at a corner between a bottom of each of semiconductor wafer inserting and supporting grooves and a base of a supporting piece between the supporting groove and a supporting groove adjacent thereto, which are formed in bars connecting upper and lower end plates of a vertical wafer boat.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: January 12, 1999
    Assignee: Asahi Glass Company Ltd.
    Inventors: Toshio Nakajima, Hisao Yamamoto
  • Patent number: 5842824
    Abstract: A wafer cassette for storing a wafer is provided vertically above (direction Z) a transport path for a wafer which is carried by a robot arm driven by a drive mechanism to move along a transport guide extending from a wafer inlet from a wafer outlet. The wafer cassette is disposed at a position between the inlet and a pre-alignment mechanism. The wafer cassette is supported by a cassette retaining base. Drive members driven by a wafer up-down mechanism are fixed to both ends of the cassette retaining base which face opposite each other in a direction perpendicular to the transport path. Thus, the wafer cassette is vertically moved by the wafer up-down mechanism to deliver a wafer between the robot arm and the wafer cassette.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: December 1, 1998
    Assignee: Nikon Corporation
    Inventor: Kenji Nishi
  • Patent number: 5839870
    Abstract: An apparatus for preventing the cross contamination of heating element within horizontal furnaces is disclosed. A rotating spindle may connect to either or both of the lifting arm of a triaxial loader or the transfer plate of a loading station. A pair of spindles are able to lift a single wafer boat. Each spindle includes a plurality of active positions with one active position associated with each heating element of the horizontal furnace. A control processor monitors the position of the spindle and rotates the spindle to the active position associated with a heating element when a loading or unloading process is initiated for that heating element.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: November 24, 1998
    Assignee: Novus Corporation
    Inventors: George E. Niemirowski, Adam F. Niemirowski, John M. Harrell, P. V. Patel
  • Patent number: 5841515
    Abstract: A substrate processing apparatus having improved processing and cleanliness characteristics is provided with a developer unit (160) and an exposure unit (170) that are positioned with operation parts of these units being arranged linearly. An interface mechanism (IFD), disposed between the developer unit (160) and the exposure unit (170), includes a substrate transport apparatus (TR2) which supports a peripheral portion of a substrate while transporting the latter. The interface mechanism (IFD) also includes a substrate container cassette (120) serving as a substrate buffer in which a substrate is supported from the back by three pins. Ejection of a substrate from an indexer (IDA) is controlled in accordance with the number of substrates which are present in a reciprocal path between the processing units (160) and (170).
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: November 24, 1998
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Masami Ohtani
  • Patent number: 5836736
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: August 15, 1996
    Date of Patent: November 17, 1998
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright, Darryl S. Byle
  • Patent number: 5803697
    Abstract: A charger assembly for a wafer carrying apparatus, includes a charger for conveying wafers loaded in a plurality of grooves of a boat to a subsequent manufacturing process. The charger has a plurality of wafer guiders disposed side by side and has a first gap therebetween. The charger further includes an adjusting structure by which the first gap between the plurality of guiders is aligned with a second gap formed between groove groups of the boat. A pair of supporting members are detachably attached to the wafer guiders by fasteners to allow lateral movement of the wafers guiders to ensure correct alignment of the grooves of the boat and charger.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: September 8, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Bong Yun, Gee-Ill Seo, Hee-Jun Kim
  • Patent number: 5788454
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: August 4, 1998
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 5784802
    Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: July 28, 1998
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 5765982
    Abstract: A system for automatic loading of wafer boats onto a cantilever paddle for insertion of the wafer boats into a furnace tube includes an end effector carriage moving on a track and supporting an end effector having spaced, parallel pads to engage opposed outer side portions of a wafer boat. The end effector receives a wafer boat from a robotic arm of an elevator. The robotic arm moves transversely relative to the track to position the wafer boat over the track on which the paddle carriage moves. The end effector carriage moves the end effector pads under the wafer boat, lifts it from a pair of elevator tines, moves the wafer boat over a desired part of the paddle, and lowers the wafer boat onto the paddle. The end effector carriage then returns the end effector to an initial location.
    Type: Grant
    Filed: July 10, 1995
    Date of Patent: June 16, 1998
    Assignee: Amtech Systems, Inc.
    Inventors: John M. Martin, Arthur W. Harrison
  • Patent number: 5747780
    Abstract: At the front side of a wafer cassette fitted to a wafer feeding unit of a magnetic levitation wafer conveying device, a wafer stopper for preventing the wafer waiting in the wafer cassette from popping out is provided. The wafer supplied from the magnetic levitation conveying device is supplied into the reaction chamber by magnetic force, and is directly held in the reaction chamber by this magnetic force. Since the wafer stopper is positioned between the wafer cassette fitted in the wafer feeding unit and the starting end of the wafer conveying route, the wafer waiting in the wafer cassette next to the wafer to be conveyed is prevented from popping out together with the wafer to be conveyed. Moreover, the wafer conveyed by the magnetic force can be directly held in the reaction chamber in heated state.
    Type: Grant
    Filed: February 13, 1996
    Date of Patent: May 5, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Shioyama, Masako Hori, Koji Kimura
  • Patent number: 5743699
    Abstract: A wafer transferring apparatus for transferring a plurality of wafers from a first carrier to a second carrier, while the materials are maintained in their predetermined upright arrangement parallel to each other at a predetermined pitch. Each of the first and second carriers accommodates the wafers in a predetermined upright arrangement. A transporting section has a supporting member providing with a plurality of guide grooves arranged at a pitch the same as the predetermined pitch for moving the plurality of wafers up and down between a lowered position and a raised position. The guide grooves of the supporting member are engaged with upper peripheral portions of the respective wafers when the wafers are moved upward or downward. A holding section temporarily holds the plurality of wafers when the plurality of wafers are in their raised position.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: April 28, 1998
    Assignee: Fujitsu Limited
    Inventor: Katsuhiro Ishihara
  • Patent number: 5731678
    Abstract: A workpiece support for supporting a semiconductor workpiece in a semiconductor processing machine is disclosed. The workpiece support has an operator base which essentially forms a yoke having two yoke arms. An operator arm having two fork arms is pivotally mounted between the two yoke arms of the operator base such that the fork arms are protruding. A processing head having a workpiece holder is rotatably mounted between the two protruding fork arms. The processing head may rotate about the fork arms to present the workpiece holder in a position to receive a workpiece or to deploy the workpiece in the semiconductor manufacturing process. The operator arm which pivots about the operator base yoke arms is used to lower the processing head and the workpiece into the process. Both the processing head and the operator arm are supported along horizontal axes having at least two points of support distally separated for stability.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: March 24, 1998
    Assignee: Semitool, Inc.
    Inventors: Vladimir Zila, Robert W. Berner, Daniel J. Woodruff
  • Patent number: 5697759
    Abstract: A method of loading a specimen carrier in an automated specimen processing system facilitates loading into or removing from a tiltable specimen carrier holder a fully loaded specimen carrier by a user with much less risk of repetitive stress injuries than is associated with prior art ways of performing those acts. The tiltable carrier holder has a receiving member and a bottom member. The receiving member is equipped with a guide. The user loads the carrier into the carrier holder by placing in the guide a guide member formed on a back of the carrier. During this action, the holder is oriented in a load position in which a front opening of the carrier faces generally upward and a back opening of the carrier faces generally downward. The carrier is then tilted so that it is supported by its base on the bottom member in an operating position with the front opening oriented for presentation of the specimens to the processing system.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: December 16, 1997
    Assignee: Kensington Laboratories, Inc.
    Inventors: Paul Bacchi, Manuel J. Robalino
  • Patent number: 5692869
    Abstract: An apparatus for transferring in a lump a plurality of semiconductor silicon wafers (3) from a first cassette (4), which contains the wafers inserted therein, to a second cassette (5), which comprises: a push-rod (10), a wafer loading device (11 or 19), a holding mechanism (12) and a cassette replacing mechanism (14). The push-rod (10) pushes out in a lump the wafers (3) upward from the first cassette (4), and inserts in a lump the wafers (3) thus pushed out upward into the second cassette (5). The wafer loading device (11 or 19) is releasably fitted to the uppermost end (10a) of the push-rod (10), and has a plurality of parallel grooves (11a or 20c) for receiving the wafers (3). The holding mechanism (12) grips the wafer loading device (11 or 19) without coming into contact with the wafers (3) so as to hold the wafers (3) at a prescribed position through the wafer loading device (11 or 19).
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: December 2, 1997
    Assignees: Nakajima M.F.G. Inc., Kyowa Engineering Yugen Kaisha
    Inventor: Chiaki Kumagai
  • Patent number: 5678320
    Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: October 21, 1997
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 5674786
    Abstract: Glass substrates suitable for thin film processing can be batch heated to processing temperatures and batch cooled after processing by radiant heating and cooling in a vacuum chamber. The heating and/or cooling chamber is fitted with a cassette including heat conductive shelves that can be heated or cooled, interleaved by the glass substrates mounted on supports so that a gap exists between the shelves and the substrates. As the shelves provide heating or cooling, the glass substrates are radiantly heated or cooled by the shelves, thereby providing uniform heating or cooling of the glass substrates so as to avoid damage or warpage of the substrates. A vacuum system for processing the substrates includes batch-type heating and cooling of the substrates using the chambers of the invention in combination with one-at-a-time film processing chambers that can deposit one or more thin films on the substrates.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: October 7, 1997
    Assignee: Applied Materials, Inc.
    Inventors: Norman L. Turner, John MacNeill White, David Berkstresser
  • Patent number: 5671530
    Abstract: A vertical wafer compact flip chip feeder device includes a loading station for providing a loading location where a flip chip wafer having first and second planar surfaces is received such that the first and second planar surfaces are substantially perpendicular to a first plane. The flip chip feeder device further includes a pick-up station for providing a pick-up location where individual flip chips are retrieved from the flip chip wafer. A wafer translating assembly translates the flip chip wafer between the loading and pick-up stations with the first and second planar surfaces of the flip chip wafer remaining substantially perpendicular to the first plane. A chip pick-up assembly retrieves the individual flip chips from the flip chip wafer at the pick-up station and flips the individual flip chips to a flipped position such that first and second planar surfaces of the individual flip chips are substantially parallel with the first plane.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: September 30, 1997
    Assignee: Delco Electronics Corporation
    Inventors: Christopher David Combs, Andrew Russell Baker, Steven Lee Davidson, Thomas Rezsonya
  • Patent number: 5668452
    Abstract: A collision avoidance technique is provided in an automated semiconductor wafer processing system, wherein a magnet or magnetic strip is incorporated into each boat or carrier used to hold and transport the semiconductor wafers during the IC fabrication process. Additionally, a magnetic field sensing device is incorporated into the robotic arm of the system for sensing the presence of magnetic fields generated by the magnet(s) incorporated into the boats and/or carriers. Using this system, it is possible for the automated system controller to determine whether an imminent collision is about to occur by monitoring changes in the detected magnetic field. In this way, collisions between one boat/carrier and a second boat/carrier may be anticipated and avoided without relying upon physical contact between the two objects in order to detect collision.
    Type: Grant
    Filed: May 9, 1996
    Date of Patent: September 16, 1997
    Assignee: VLSI Technology, Inc.
    Inventors: Danine Villarreal, Anthony Sayka
  • Patent number: 5664337
    Abstract: A semiconductor processing system for wafers or other semiconductor articles. The system uses an interface section at an end of the machine accessible from the clean room. A plurality of processing stations are arranged away from the clean room interface. A transfer subsystem removes wafers from supporting carriers, and positions both the wafers and carriers onto a carrousel which is used as an inventory storage. Wafers are shuttled between the inventory and processing stations by a robotic conveyor which is oriented to move toward and away from the interface end. The system processes the wafers without wafer carriers.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: September 9, 1997
    Assignee: Semitool, Inc.
    Inventors: Jeffrey A. Davis, Gary L. Curtis
  • Patent number: 5662452
    Abstract: An apparatus and method for aligning indexing notches of disk-shaped members, such as semiconductor wafers, include providing an alignment rod that is driven by another roller to cause rotation of the disk-shaped members. The circumferential surfaces of the alignment rod and the drive roller are in frictional contact. Initially, the disk-shaped members rest upon the alignment rod, so that rotation of the alignment rod causes rotation of the disk-shaped members until indexing notches are seated on the alignment rod. In the preferred embodiment, the seating of the indexing notches transfers at least a portion of the weight of the disk-shaped members to a reciprocating structure, such as a comb member. After all of the indexing notches have been aligned, a second weight transfer occurs, with the reciprocating structure following the contour of the drive roller and the disk-shaped members coming to rest on the drive roller. The disk-shaped members can then be uniformly rotated to locate the notches as desired.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: September 2, 1997
    Assignee: H-Square Corporation
    Inventor: Quincy D. Allison
  • Patent number: 5660517
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: August 26, 1997
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright, Darryl S. Byle, John M. Pedersen
  • Patent number: 5658123
    Abstract: A method and apparatus is presented for transferring semiconductor wafers through a barrier between two separate fabrication areas without the transfer of a container (i.e., wafer boat) with the wafers. The method includes providing an air lock chamber configured within a wall separating a first fabrication area and a second fabrication area. A first door providing access to the air lock chamber from the first fabrication area is opened and a first wafer boat containing the wafers is placed into the air lock chamber. The wafers are removed from the first wafer boat and placed in the air lock chamber. The empty first wafer boat is then removed from the air lock chamber, and the first door is closed. A second door providing access to the air lock chamber from the second fabrication area is opened, and an empty second wafer boat is placed into the air lock chamber.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: August 19, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gerald L. Goff, Michael R. Conboy
  • Patent number: 5630690
    Abstract: A load lock interface for a semiconductor wafer process chamber includes a platform adapted to receive and engage with a carrier containing a cassette of semiconductor wafers; and a removable bell-shaped enclosure adapted to surround and seal said carrier from the ambient environment while the carrier is engaged with the load lock interface platform. Once engaged with the carrier, the platform is operable to withdraw the cassette of wafers from the carrier and position the cassette within a load lock. Thereafter, the cassette may be indexed and individual wafers may be removed from the cassette for processing within the process chamber.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: May 20, 1997
    Assignee: Applied Materials, Inc.
    Inventor: Philip M. Salzman
  • Patent number: 5622400
    Abstract: Disclosed is an apparatus and method for modifying standard semiconductor wafer tranfer apparatus and method to permit the standard semiconductor wafer transfer apparatus and method to function with wafers that are extremely thin and flexible and are warped sufficiently out of planar configuration that it is impossible to establish a sufficient vacuum between the lower surface of the wafer and the upper surface of the transfer instrumentality. A positive gaseous medium pressure is applied to the upper surface of the wafer around the periphery thereof to cause those areas that are flexed upwardly to flex downwardly and contact the upper surface of the transfer instrumentality so that a sufficient vacuum can be established between the lower surface of the wafer and the upper surface of the transfer instrumentality to cause the wafer to be firmly secured to the transfer instrumentality to be transferred thereby from one location to another.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 22, 1997
    Assignee: Karl Suss America, Inc.
    Inventor: Gregory George