Electron Beam Imaging Patents (Class 430/296)
  • Patent number: 9754761
    Abstract: An inspection tool includes a controller that is configured to generate a scan pattern for an electron beam to image areas of interest on the wafer. The scan pattern minimizes dwell time of the electron beam on the surface of the wafer between the areas of interest. At least one stage speed and at least one raster pattern can be selected based on the areas of interest. The controller sends instructions to electron beam optics to direct the electron beam at the areas of interest on the surface of the wafer using the scan pattern.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: September 5, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Hong Xiao, Christopher Maher
  • Patent number: 9726983
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: August 8, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9715169
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which a desired substrate pattern for a substrate is input. A plurality of charged particle beam shots is then determined which will form a reticle pattern on a reticle, where the reticle pattern will produce a substrate pattern on the substrate using an optical lithography process, wherein the substrate pattern is within a predetermined tolerance of the desired substrate pattern. A similar method and a similar system for forming a pattern on a reticle are also disclosed.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: July 25, 2017
    Assignee: D2S, Inc.
    Inventor: Akira Fujimura
  • Patent number: 9694545
    Abstract: A purge station assembly for use in an additive manufacturing system, which includes a purge station having a base bracket, a slide mount slidably engaged with the base bracket, and a contact head configured to clean a nozzle tip of a print head. The purge station assembly also includes a mechanism, such as a cable line, operably attached to the slide mount that allows an operator to mechanically move the slide mount relative to the base bracket from a location that is remote from the purge station.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 4, 2017
    Assignee: Stratasys, Inc.
    Inventors: Robert Skubic, Logan R. Kiene, Joel E. Farley, Benjamin L. Braton, James Flannigan, Joel Ostby
  • Patent number: 9691585
    Abstract: A multi charged particle beam writing method includes, shifting a writing position of each corresponding beam to a next writing position by performing another beam deflection of multi charged particle beams, in addition to the beam deflection for a tracking control, while continuing the beam deflection for the tracking control after the maximum writing time has passed; emitting the each corresponding beam in the “on” state to the next writing position having been shifted of the each corresponding beam, during a corresponding writing time while continuing the tracking control; and returning a tracking position such that a next tracking start position is a former tracking start position where the tracking control was started, by resetting the beam deflection for the tracking control after emitting the each corresponding beam to the next writing position having been shifted at least once of the each corresponding beam while continuing the tracking control.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: June 27, 2017
    Assignee: NuFlare Technology, Inc.
    Inventors: Hiroshi Matsumoto, Munehiro Ogasawara, Ryoichi Yoshikawa
  • Patent number: 9678441
    Abstract: In a method for generating, with a computer, a pattern of a mask, a pattern on an object plane of a projection optical system is set, shifted plural pupil functions are generated, a matrix containing the generated plural pupil functions is defined, an image of the pattern on the object plane is calculated by generating a vector obtained by transposing and complex-conjugating a vector containing, as components, values of the pupil functions at origin coordinates on a pupil plane from among components of the matrix, and performing convolution integral between the pattern on the object plane and a Fourier transform of a product of the vector and the matrix, an assist pattern for the pattern on the object plane is generated using the calculated image, and a pattern of the mask including the pattern on the object plane and the assist pattern is generated.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: June 13, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kenji Yamazoe, Ryo Nakayama, Hiroyuki Ishii
  • Patent number: 9678434
    Abstract: Lithography methods disclosed herein accommodate shrinking pattern dimensions. An exemplary method includes receiving a pattern to be transferred to a workpiece by a pattern generator. The pattern generator is divided into a first segment set and a second segment set based on the pattern, such that a collective exposure dose from the first segment set and the second segment set satisfies an exposure dose specified by the pattern. The first segment set is offset from the second segment set in a first direction, and segments in the first segment set and segments in the second segment set are offset from each other in a second direction different than the first direction. The method further includes exposing the workpiece according to the first segment set and the second segment set.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: June 13, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chuan Wang, Burn Jeng Lin, Jaw-Jung Shin, Pei-Yi Liu, Shy-Jay Lin
  • Patent number: 9653306
    Abstract: The present invention is directed to a method for forming a crystalline cobalt silicide film, comprising the steps of: applying to a surface made of silicon a composition obtained by mixing a compound represented by the following formula (1A) or (1B): SinX2n+2??(1A) SimX2m??(1B) wherein each X in the formulas (1A) and (1B) is a hydrogen atom or a halogen atom, n is an integer of 1 to 10, and m is an integer of 3 to 10, or a polymer thereof with a zero-valent cobalt complex to form a coating film; heating the coated film at 550 to 900° C. so as to form a two-layer film which is composed of a first layer made of a crystalline cobalt silicide on the surface made of silicon and a second layer containing silicon atoms, oxygen atoms, carbon atoms and cobalt atoms on the first layer; and removing the second layer of the two-layer film.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 16, 2017
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, JSR CORPORATION
    Inventors: Tatsuya Shimoda, Yasuo Matsuki, Ryo Kawajiri
  • Patent number: 9632409
    Abstract: The present disclosure relates to novel fullerene derivatives, positive and negative photoresist compositions prepared therefrom and methods of using them. The derivatives, their photoresist compositions and the methods are ideal for high speed, fine pattern processing using, for example, ultraviolet radiation, extreme ultraviolet radiation, beyond extreme ultraviolet radiation, X-rays, electron beam and other charged particle rays.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: April 25, 2017
    Assignee: Irresistible Materials LTD
    Inventors: Alex Phillip Graham Robinson, Richard Edward Palmer, Andreas Frommhold, Dongxu Yang
  • Patent number: 9625815
    Abstract: Self-aligned via and plug patterning for back end of line (BEOL) interconnects are described. In an example, a structure for directed self-assembly includes a substrate and a block co-polymer structure disposed above the substrate. The block co-polymer structure has a polystyrene (PS) component and a polymethyl methacrylate (PMMA) component. One of the PS component or the PMMA component is photosensitive.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: April 18, 2017
    Assignee: Intel Corporation
    Inventors: Paul A. Nyhus, Eungnak Han, Swaminathan Sivakumar, Ernisse S. Putna
  • Patent number: 9594862
    Abstract: The present disclosure provides one embodiment of an IC method that includes receiving an IC design layout, which has a plurality of main features and a plurality of space blocks. The IC method also includes calculating an optimized block dummy density ratio r0 to optimize an uniformity of pattern density (UPD), determining a target block dummy density ratio R, determining size, pitch and type of a non-printable dummy feature, generating a pattern for non-printable dummy features and adding the non-printable dummy features in the IC design layout.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: March 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin, Burn Jeng Lin
  • Patent number: 9574104
    Abstract: The present invention relates to novel copolymers containing cross-linkable and graft-able moieties, novel compositions comprised of these novel copolymers and a solvent, and methods for using these novel compositions to form neutral layer films which are both cross-linked and grafted on the substrate which are used in processes for aligning microdomains of block copolymers (BCP) on this neutral layer coated substrate such as self-assembly and directed self-assembly.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: February 21, 2017
    Assignee: AZ ELECTRONIC MATERIALS (LUXEMBOURG) S.A.R.L.
    Inventors: JiHoon Kim, Jian Yin, Hengpeng Wu, Jianhui Shan, Guanyang Lin
  • Patent number: 9568827
    Abstract: An object of the present invention is to provide a fabrication method for pattern-formed structure having a smooth three-dimensional structure through a fewer processes. To achieve the object, the present invention provides a fabrication method for pattern-formed structure comprising: a dot modulation pattern forming process of binarizing a shape of a targeted three-dimensional structure to form a dot modulation pattern, a writing process of using the dot modulation pattern to write directly by a writer on a photosensitive resin layer formed on a substrate, and a developing process of developing the photosensitive resin layer after the writing to form a resin layer with three-dimensional structure, wherein the writing process is performed by a writing energy supplying method in which writing energy is supplied to the photosensitive resin layer by an area larger than a minimum dot area in the dot modulation pattern.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 14, 2017
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Makoto Abe, Masaaki Kurihara, Kazuaki Baba
  • Patent number: 9508948
    Abstract: Disclosed is an organic light emitting display device. The organic light emitting display device includes a substrate in which at least three pixel areas are defined, a first electrode and a hole transporting layer formed on the substrate, an light-emitting material layer formed on the hole transporting layer in each of the pixel areas, and an electron transporting layer and a second electrode formed on the light-emitting material layer. An optical assistant transporting layer is formed on the light-emitting material layer at a position corresponding to one of the pixel areas, and formed of an electron transporting material. Accordingly, provided can be a high-resolution organic light emitting display device that solves an imbalance of electric charges and has an excellent light output efficiency and an enhanced service life.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: November 29, 2016
    Assignee: LG Display Co., Ltd.
    Inventors: Se Hee Lee, Seok Jong Lee, Sun Kap Kwon, Ho Sung Kim
  • Patent number: 9465307
    Abstract: A cleaning method for an EUV light generation apparatus may include closing a connection portion so that a chamber interior and the interior of an exposure apparatus do not communicate when EUV light is not being generated, supplying an etchant gas for etching debris that has accumulated on a reflective surface of an optical element to the chamber interior in a state where the connection portion is closed, and exhausting the chamber interior using an exhaust apparatus while supplying the etchant gas.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: October 11, 2016
    Assignee: GIGAPHOTON INC.
    Inventors: Hakaru Mizoguchi, Shinji Nagai
  • Patent number: 9465298
    Abstract: A pattern forming method, including: (A) coating a substrate with a positive resist composition of which solubility in a positive developer increases and solubility in a negative developer decreases upon irradiation with actinic rays or radiation, so as to form a resist film; (B) exposing the resist film; and (D) developing the resist film with a negative developer; a positive resist composition for multiple development used in the method; a developer for use in the method; and a rinsing solution for negative development used in the method.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: October 11, 2016
    Assignee: FUJIFILM Corporation
    Inventors: Hideaki Tsubaki, Shinichi Kanna
  • Patent number: 9466324
    Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: October 11, 2016
    Assignee: Seagate Technology LLC
    Inventors: HongYing Wang, Kim Y Lee, Yautzong Hsu, Nobuo Kurataka, Gennady Gauzner, Shuaigang Xiao
  • Patent number: 9431474
    Abstract: A method for manufacturing a metal-insulator-metal (MIM) stack is described. The method includes forming a temporary stack by depositing a bottom electrode comprising at least one metal layer; depositing a dielectric comprising at least one layer of a dielectric material having a first dielectric constant value; and depositing a top electrode comprising at least one metal layer. The step of depositing the bottom and/or top electrode includes depositing a non-conductive metal oxide layer directly in contact with the dielectric; and after the step of depositing the bottom and/or top electrode's non-conductive metal oxide layer and the dielectric, subjecting the temporary stack to a stimulus, which transforms the non-conductive metal oxide into a thermodynamically stable oxide having conductive properties or into a metal, and the dielectric material into a crystalline form having a second dielectric constant value higher than the first dielectric constant value, thereby creating the final MIM stack.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: August 30, 2016
    Assignee: IMEC
    Inventor: Mihaela Ioana Popovici
  • Patent number: 9431219
    Abstract: A method that uses both electron beam (e-beam) lithography and directed self-assembly (DSA) of block copolymers (BCPs) makes guiding lines with oxidized sidewalls for use in subsequent DSA of BCPs. A series of films is deposited on a substrate including a first cross-linked polymer mat layer, a layer of resist, an etch stop layer resistant to oxygen reactive-ion-etching, a second cross-linked polymer mat layer, and an e-beam resist. After patterning and etching the second mat layer, a BCP self-assembles onto the patterned second mat layer and one of the BCP components is removed. Then the second mat layer is etched, using the remaining BCP component as an etch mask. Additional etching steps then create guiding lines of the first mat layer with oxidized sidewalls. The resulting guiding lines have better quality and lower roughness than guiding lines made with just e-beam lithography.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: August 30, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Julia Cushen, Ricardo Ruiz, Lei Wan
  • Patent number: 9421807
    Abstract: An ink jet-printable composition, which comprises a compound having a reactive silyl group and which is suitable for printing on non-porous substrates such as a glass or ceramic, and a process of decorating non-porous substrates involving ink jet printing the composition onto the substrate, exposing the printed composition to actinic or electron beam radiation to initiate curing and heating the printed composition to a temperature of at least 100° C.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: August 23, 2016
    Assignee: Sun Chemical B.V.
    Inventors: Alexander Grant, Samuel Thomas Moncur, Nigel Anthony Caiger
  • Patent number: 9405195
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer and a second latent feature in the second patternable material layer.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9397187
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: July 19, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Patent number: 9390891
    Abstract: An apparatus for use in a charged particle multi-beam lithography system is disclosed. The apparatus includes a plurality of charged particle doublets each having a first aperture and each configured to demagnify a beamlet incident upon the first aperture thereby producing a demagnified beamlet. The apparatus further includes a plurality of charged particle lenses each associated with one of the charged particle doublets, each having a second aperture, and each configured to receive the demagnified beamlet from the associated charged particle doublet and to realize one of two states: a switched-on state, wherein the demagnified beamlet is allowed to travel along a desired path, and a switched-off state, wherein the demagnified beamlet is prevented from traveling along the desired path. In embodiments, the first aperture is greater than the second aperture, thereby improving particle beam efficiency in the charged particle multi-beam lithography system.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: July 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chi Wang, Tsung-Chih Chien, Hui-Min Huang, Jaw-Jung Shin, Shy-Jay Lin, Burn Jeng Lin
  • Patent number: 9372394
    Abstract: Aspects of the present invention relate to a test photomask and a method for evaluating critical dimension changes in the test photomask. Various embodiments include a test photomask. The test photomask includes a plurality of cells having a varied density pattern. The plurality of cells include a first group of cells arranged along a first line, the first group of cells having a first combined density ratio. The plurality of cells also include a second group of cells arranged along a second line, the second group of cells having a second combined density ratio. In the plurality of cells, the second combined density ratio for the second group of cells is equal to the first combined density ratio of the first group of cells. The varied density pattern is configured to substantially neutralize fogging effects.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 21, 2016
    Assignees: International Business Machines Corporation, Toppan Printing CO., LTD.
    Inventors: Brian N. Caldwell, Yuki Fujita, Raymond W. Jeffer, James P. Levin, Joseph L. Malenfant, Jr., Steven C. Nash
  • Patent number: 9276081
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: March 1, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Patent number: 9262578
    Abstract: Provided is an integrated circuit (IC) manufacturing method. The method includes receiving a design layout of an IC, wherein the design layout includes a plurality of non-overlapping IC regions and each of the IC regions includes a same initial IC pattern. The method further includes dividing the IC regions into a plurality of groups based on a location effect analysis such that all IC regions in a respective one of the groups are to have substantially same location effect. The method further includes performing a correction to one IC region in each of the groups using a correction model that includes location effect; and copying the corrected IC region to other IC regions in the respective group. The method further includes storing the corrected IC design layout in a tangible computer-readable medium for use by a further IC process stage.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Wang, Ching-Hsu Chang, Feng-Ju Chang, Chun-Hung Wu, Ping-Chieh Wu, Wen-Hao Liu, Ming-Hsuan Wu, Feng-Lung Lin, Cheng Kun Tsai, Wen-Chun Huang, Ru-Gun Liu
  • Patent number: 9257277
    Abstract: Methods for extreme ultraviolet (EUV) mask defect mitigation by using multi-patterning lithography techniques. In one exemplary embodiment, a method for fabricating an integrated circuit including identifying a position of a defect in a first EUV photolithographic mask, the photolithographic mask including a desired pattern and transferring the desired pattern to a photoresist material disposed on a semiconductor substrate. Transferring the desired pattern further transfers an error pattern feature to the photoresist material as a result of the defect in the first EUV photolithographic mask. The method further includes, using a second photolithographic mask, transferring a trim pattern to the photoresist material, wherein the trim pattern removes the error pattern feature from the photoresist material.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: February 9, 2016
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Gek Soon Chua, Tan Soon Yoeng
  • Patent number: 9240327
    Abstract: There is provided a resist underlayer film composition for EUV lithography that is used in a device production process using EUV lithography, reduces adverse effects of EUV, and is effective for obtaining a good resist pattern, and to a method for forming a resist pattern that uses the resist underlayer film composition for EUV lithography. A resist underlayer film-forming composition for EUV lithography, including: a polymer having a repeating unit structure of formula (1): [where each of A1, A2, A3, A4, A5, and A6 is a hydrogen atom, a methyl group, or an ethyl group; X1 is formula (2), formula (3), formula (4), or formula (0): Q is formula (5) or formula (6): and a solvent. A resist underlayer film-forming composition for EUV lithography, comprising: the polymer having the repeating unit structure of formula (1); a crosslinkable compound; and a solvent.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: January 19, 2016
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Rikimaru Sakamoto, Noriaki Fujitani, Takafumi Endo, Ryuji Ohnishi, Bangching Ho
  • Patent number: 9235125
    Abstract: A method of forming a patterned chemical epitaxy template, for orientation of a self-assemblable block copolymer including first and second polymer blocks, on a surface of a substrate, the method including applying a primer layer of a primer composition to the surface, the primer composition including a first polymer moiety having a chemical affinity with the first polymer blocks and a second polymer moiety having a chemical affinity with the second polymer blocks, selectively exposing the surface, the primer layer and any overlying layer to actinic radiation to provide exposed and unexposed regions, to render labile the first polymer moiety in the exposed region, and removing the labile first polymer moiety from the exposed region to deplete the primer layer surface in the exposed region of first polymer moiety to form the patterned chemical epitaxy template.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: January 12, 2016
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Emiel Peeters, Wilhelmus Sebastianus Marcus Maria Ketelaars, Sander Frederik Wuister, Roelof Koole, Christianus Martinus Van Heesch, Aurelie Marie Andree Brizard, Henri Marie Joseph Boots, Thanh Trung Nguyen, Oktay Yildirim
  • Patent number: 9224578
    Abstract: A apparatus includes a unit to operate a first dose of a beam corrected for a proximity effect for each of second mesh regions of a second mesh size obtained by dividing the first mesh size by a product of a natural number and a number of passes, by using a dose model using a dose threshold; a unit to operate a representative temperature rising due to heat transfer originating from irradiation of the beam by using a dose for an applicable pass of the first dose and a unit to operate a polynomial having a term obtained by multiplying a dose modulation coefficient based on the representative temperature by a pattern area density as an element, and a dose that makes a difference between a value obtained by operating the polynomial and the dose threshold within a tolerance is used.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: December 29, 2015
    Assignee: NuFlare Technology, Inc.
    Inventors: Noriaki Nakayamada, Yasuo Kato, Mizuna Suganuma
  • Patent number: 9214527
    Abstract: Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: December 15, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chandra Mouli
  • Patent number: 9177817
    Abstract: A method of fabricating a 3 dimensional structure, includes: forming a stack of at least 2 layers of photo resist material having different photo resist sensitivities upon a substrate; exposing the stack to beams of electromagnetic radiation or charged particles of different dosages to achieve selective solubility along a height of the stack; and dissolving soluble portions of the stack with a solvent to produce a 3 dimensional structure of desired geometry.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: November 3, 2015
    Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
    Inventors: John G. Hartley, Ravi K. Bonam
  • Patent number: 9170489
    Abstract: A pattern-forming method includes in this order: step (1) of forming a film with an electron beam-sensitive or extreme ultraviolet radiation-sensitive resin composition that contains (A) a resin having an acid-decomposable repeating unit and capable of decreasing a solubility of the resin (A) in a developer containing an organic solvent by an action of an acid, (B) a compound capable of generating an acid upon irradiation with an electron beam or extreme ultraviolet radiation and (C) a solvent; step (2) of exposing the film with an electron beam or extreme ultraviolet radiation; and step (4) of forming a negative pattern by development of the film with a developer containing an organic solvent after the exposing of the film, wherein a content of the compound (B) is 21% by mass to 70% by mass on the basis of all solids content of the composition.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: October 27, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Hiroo Takizawa, Hideaki Tsubaki, Shuji Hirano
  • Patent number: 9171698
    Abstract: A drawing apparatus for performing drawing on a substrate with a charged particle beam, includes: a controller configured to control a dose of the charge particle beam at each of a plurality of positions of the charged particle beam on the substrate based on information of displacement of each of the plurality of positions from a target position corresponding thereto and a target dose of the charged particle beam at the target position corresponding to each of the plurality of positions.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: October 27, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masato Muraki, Tomoyuki Morita
  • Patent number: 9153453
    Abstract: A process is disclosed for sectioning by etching of monolayers and multilayers using an RIE technique with fluorine-based chemistry. In one embodiment, the process uses Reactive Ion Etching (RIE) alone or in combination with Inductively Coupled Plasma (ICP) using fluorine-based chemistry alone and using sufficient power to provide high ion energy to increase the etching rate and to obtain deeper anisotropic etching. In a second embodiment, a process is provided for sectioning of WSi2/Si multilayers using RIE in combination with ICP using a combination of fluorine-based and chlorine-based chemistries and using RF power and ICP power. According to the second embodiment, a high level of vertical anisotropy is achieved by a ratio of three gases; namely, CHF3, Cl2, and O2 with RF and ICP. Additionally, in conjunction with the second embodiment, a passivation layer can be formed on the surface of the multilayer which aids in anisotropic profile generation.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: October 6, 2015
    Assignees: Brookhaven Science Associates, LLC, UChicago Argonne, LLC
    Inventors: Nathalie C. D. Bouet, Raymond P. Conley, Ralu Divan, Albert Macrander
  • Patent number: 9146468
    Abstract: There is disclosed a resist underlayer film composition, the resist underlayer film composition contains a truxene compound having a substituted or an unsubstituted naphthol group as shown by the following general formula (1). There can be provided a resist underlayer film composition to form a resist underlayer film being capable of reducing reflectance and having high etching resistance, heat resistance.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: September 29, 2015
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Daisuke Kori, Tsutomu Ogihara
  • Patent number: 9116434
    Abstract: An electron beam exposure method includes the steps of: preparing an exposure mask having a plurality of opening patterns formed by dividing a drawing object pattern into exposable regions; and drawing the drawing object pattern by performing exposure with an electron beam passing through the opening patterns of the exposure mask. Each end portion serving as a joint in each opening pattern of the exposure mask is provided with a joining portion tapered in a width of the opening pattern. The exposure is performed in such a way that portions drawn through adjacent joining portions overlap each other.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: August 25, 2015
    Assignee: Advantest Corp.
    Inventors: Shinichi Hamaguchi, Masaki Kurokawa, Masahiro Takizawa
  • Patent number: 9117769
    Abstract: In a plasma etching method of performing a plasma etching on an amorphous carbon layer of a substrate to be processed by using an inorganic film as a mask, the substrate being mounted in a processing chamber, the plasma etching on the amorphous carbon layer is performed by using O2 gas as a processing gas and the O2 gas to flow in the processing chamber such that a residence time of the O2 gas becomes 0.37 msec or less. The amorphous carbon layer is used as an etching mask of an etching target film formed on the substrate. The plasma etching is performed by using the O2 gas only.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 25, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Kousuke Koiwa
  • Patent number: 9076914
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for processing a substrate. The method may comprise directing an ion beam comprising a plurality of ions along an ion beam path, from an ion source to the substrate; disposing at least a portion of a mask in the ion beam path, between the ion source and the substrate; and translating one of the substrate and the mask relative to other one of the substrate and the mask.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: July 7, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin M. Daniels, Russell L. Low, Benjamin B. Riordon
  • Patent number: 9076564
    Abstract: A multi charged particle beam writing apparatus according to an embodiment, includes a setting unit to set a second region such that more openings in remaining openings except for an opening through which the defective beam passes are included in the second region, a selection unit to select a mode from a first mode in which a pattern is written on a target object by using multiple beams having passed openings in the second region and a second mode in which multiple writing is performed while shifting a position by using at least one of remaining multiple beams in the state where the defective beam is controlled to be beam off and additional writing is performed for a position which was supposed to be written by the defective beam, and a writing processing control unit to control to write in the mode selected.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: July 7, 2015
    Assignee: NuFlare Technology, Inc.
    Inventors: Ryoichi Yoshikawa, Munehiro Ogasawara
  • Patent number: 9063440
    Abstract: A charged particle beam writing apparatus includes a storage unit to store each pattern data of plural figure patterns arranged in each of plural small regions made by virtually dividing a writing region of a target workpiece to be written on which resist being coated. The charged particle beam writing apparatus further including an assignment unit to assign each pattern data of each figure pattern to be arranged in each of the plural small regions concerned, and a writing unit to write, for each of plural groups, each figure pattern in each of the plural small regions concerned by using a charged particle beam.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: June 23, 2015
    Assignee: NuFlare Technology, Inc.
    Inventor: Yasuo Kato
  • Patent number: 9057959
    Abstract: An aqueous solution containing 0.1-20 wt % of a substituted choline or thiocholine hydroxide is a useful developer for photosensitive resist materials. A resist pattern is formed by applying a chemically amplified positive resist composition onto a substrate to form a resist film, exposing the resist film to high-energy radiation, and developing the exposed resist film in an ammonium hydroxide-containing aqueous solution.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: June 16, 2015
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Masaki Ohashi
  • Patent number: 9057907
    Abstract: A mask for forming a black matrix for a display device that includes a data line having a bending structure with respect to a central portion of a pixel region includes a edge frame having a rectangular shape, and a base plate disposed on the edge frame and including a light-transmitting portion and a light-blocking portion, wherein the light-transmitting portion includes first light-transmitting patterns and light-controlling portions between adjacent first light-transmitting patterns, and the light-transmitting portion further includes a bending portion corresponding to the central portion of the pixel region, and wherein the bending portion is disposed with a same distance from the light-transmitting patterns adjacent thereto.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: June 16, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Jin-Pil Kim, Seung-Ryull Park, So-Young Noh, Jin-Bok Lee
  • Patent number: 9057956
    Abstract: A method and system for fracturing or mask data preparation are presented in which overlapping shots are generated to increase dosage in selected portions of a pattern, thus improving the fidelity and/or the critical dimension variation of the transferred pattern. In various embodiments, the improvements may affect the ends of paths or lines, or square or nearly-square patterns. Simulation is used to determine the pattern that will be produced on the surface.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: June 16, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Kazuyuki Hagiwara, Stephen F. Meier, Ingo Bork
  • Patent number: 9054160
    Abstract: An interconnect structure includes a patterned and cured dielectric layer located directly on a surface of a patterned permanent antireflective coating. The patterned and cured dielectric layer and the permanent antireflective coating form shaped openings. The shaped openings include an inverse profile which narrows towards a top of the shaped openings. A conductive structure fills the shaped openings wherein the patterned and cured dielectric layer and the permanent antireflective coating each have a conductively filled region.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: June 9, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert L. Bruce, Qinghuang Lin, Alshakim Nelson, Satyanarayana V. Nitta, Dirk Pfeiffer, Jitendra S. Rathore
  • Patent number: 9052602
    Abstract: An aqueous solution containing 0.1-20 wt % of a cyclic ammonium hydroxide is a useful developer for photosensitive resist materials. A resist pattern is formed by applying a chemically amplified positive resist composition onto a substrate to form a resist film, exposing the resist film to high-energy radiation, and developing the exposed resist film in a cyclic ammonium hydroxide-containing aqueous solution.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: June 9, 2015
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Masaki Ohashi
  • Publication number: 20150147698
    Abstract: A negative resist composition comprising a polymer comprising recurring units (a) of formula (1) and having a Mw of 1,000-500,000 as base resin is provided. R1 is H or methyl, X is a single bond or —C(?O)—O—R4—, R2 is a single bond or C1-C4 alkylene, R3 is C2-C8 alkylene, R4 is a single bond or C1-C4 alkylene, and 0<a?1.0. The composition exhibits a high resolution due to controlled acid diffusion and forms a resist film which is unsusceptible to swell in the developer and hence to pattern collapse.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 28, 2015
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Jun Hatakeyama, Masayoshi Sagehashi
  • Publication number: 20150147697
    Abstract: A resist composition comprising a polymer comprising recurring units (a) of formula (1) and having a Mw of 1,000-500,000 as base resin is provided. R1 is H or methyl, X is a single bond or —C(?O)—O—R5—, R2 is a single bond or C1-C4 alkylene, R3 is C2-C8 alkylene, R4 is an acid labile group, R5 is a single bond or C1-C4 alkylene, and 0<a?1.0. The composition is of dual-tone type in that an intermediate dose region of resist film is dissolved in a developer, but unexposed and over-exposed regions of resist film are insoluble.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 28, 2015
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Masayoshi Sagehashi
  • Publication number: 20150147699
    Abstract: The pattern forming method of the present invention includes (i) forming a film using an actinic ray-sensitive or radiation-sensitive resin composition which contains a resin (A) which has a repeating unit including a group capable of generating a polar group by being decomposed due to an action of an acid and a repeating unit including a carboxyl group, a compound (B) which generates an acid according to irradiation with actinic rays or radiation, and a solvent (C); (ii) exposing the film using a KrF excimer laser, extreme ultraviolet rays, or an electron beam; and (iii) forming a negative tonetone pattern by developing the exposed film using a developer which includes an organic solvent.
    Type: Application
    Filed: January 28, 2015
    Publication date: May 28, 2015
    Applicant: FUJIFILM CORPORATION
    Inventors: Sou KAMIMURA, Hidenori TAKAHASHI, Keita KATO
  • Patent number: 9040212
    Abstract: A method includes scanning a lithography mask with a repair process, and measuring back-scattered electron signals of back-scattered electrons generated from the scanning. An endpoint is determined from the back-scattered electron signals. A stop point is calculated from the endpoint. The step of scanning is stopped when the calculated stop point is reached.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Lin Chen, Chih-Wei Wen, Chung-Hung Lin