Abstract: Integrated circuit structures having differentiated interconnect lines in a same dielectric layer, and methods of fabricating integrated circuit structures having differentiated interconnect lines in a same dielectric layer, are described. In an example, an integrated circuit structure includes an inter-layer dielectric (ILD) layer above a substrate. A plurality of conductive interconnect lines is in the ILD layer. The plurality of conductive interconnect lines includes a first interconnect line having a first height, and a second interconnect line immediately laterally adjacent to but spaced apart from the first interconnect line, the second interconnect line having a second height less than the first height.

Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.

Abstract: Photovoltaic devices, and methods of fabricating photovoltaic devices. The photovoltaic devices may include a first electrode, at least one quantum dot layer, at least one semiconductor layer, and a second electrode. The first electrode may include a layer including Cr and one or more silver contacts.

Abstract: A laminated member includes a glass member of which a linear transmittance at a wavelength of 850 nm is 80% or more, a bonding layer provided on or above the glass member, the bonding layer being constituted by a resin, and a ceramic member provided on or above the bonding layer, the ceramic member being constituted by an SiC member or an AlN member.

Abstract: A laminated member includes a glass member of which a linear transmittance at a wavelength of 850 nm is 80% or more, a bonding layer provided on or above the glass member, the bonding layer being constituted by a resin, and a Si—SiC member provided on or above the bonding layer.

Abstract: A multi-beam apparatus for multi-beam inspection with an improved source conversion unit providing more beamlets with high electric safety, mechanical availability and mechanical stabilization has been disclosed. The source-conversion unit comprises an image-forming element array having a plurality of image-forming elements, an aberration compensator array having a plurality of micro-compensators, and a pre-bending element array with a plurality of pre-bending micro-deflectors. In each of the arrays, adjacent elements are placed in different layers, and one element may comprise two or more sub-elements placed in different layers. The sub-elements of a micro-compensator may have different functions such as micro-lens and micro-stigmators.

Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.

Abstract: In some implementations, a vertical-cavity surface-emitting laser (VCSEL) array may comprise a plurality of channels, a plurality of traces, and a plurality of emitters. A channel, of the plurality of channels, may include a set of emitters, of the plurality of emitters, arranged in a row of emitters. The channel may include a trace, of the plurality of traces, that has a trace width that is tapered along a length of the trace. Numerous other aspects are provided.

Abstract: Provided is a copolymer that can be favorably used as a main chain scission-type positive resist that has excellent heat resistance and that can form a resist pattern having excellent resolution and clarity. The copolymer includes a monomer unit (A) represented by the following formula (I) and a monomer unit (B) represented by the following formula (II), and has a molecular weight distribution of 1.7 or less. In the formulae, L is a single bond or a divalent linking group, Ar is an optionally substituted aromatic ring group, R1 is an alkyl group, R2 is an alkyl group, a halogen atom, or a haloalkyl group, p is an integer of not less than 0 and not more than 5, and in a case in which more than one R2 is present, each R2 may be the same or different.

Abstract: The present invention relates to a method for measuring a sample with a microscope, the method comprising the steps of: measuring a tilt of the sample, correcting an orientation of the sample based on the tilt, and scanning the sample.

Abstract: In embodiments of a digital lithography system, physical design data prepared at a data prep server in a hierarchical data structure. A leaf node comprises a repeater nod, comprising a bitmap image and a plurality of locations at which the bitmap appears in a physical design. At an EYE server, a repeater node bitmap is adjusted based upon, for example, spatial light modulator rotational adjustment and substrate distortion. The adjusted repeater node and the plurality of locations in which the adjusted repeater appears is compared to the repeater of the data prep server and its plurality of locations. In further embodiments, a rasterizer generates a checksum of bitmap to be printed to a substrate, from the EYE server bitmap. The checksum is compared to a checksum of the EYE server bitmap.

Abstract: An electron beam lithography (Ebeam) method for a wafer having alignment and device layers with a design alignment. The Ebeam method includes executing an Ebeam scan of predefined length and resolution based on the design alignment over a pattern edge of the device layer, generating a signal from reflections of the Ebeam scan off the pattern edge, determining an offset of the device layer relative to the alignment layer from a comparison of the signal and the design alignment and applying the offset to the design alignment to obtain an actual measurement of Ebeam alignment.

Abstract: A method includes forming a photoresist layer over a substrate, wherein the photoresist layer includes a polymer, a sensitizer, and a photo-acid generator (PAG), wherein the sensitizer includes a resonance ring that includes nitrogen and at least one double bond. The method further includes performing an exposing process to the photoresist layer. The method further includes developing the photoresist layer, thereby forming a patterned photoresist layer.

Abstract: The present invention relates to a composition containing a compound (A) represented by the following general formula (I) and a compound having two or more polymerizable functional groups (B) in a molecule (except for compound (A)), wherein a mass ratio ((A)/(B)) of the compound (A) to the compound having two or more polymerizable functional groups (B) in a multi-molecule is 30/70 to 50/50: wherein, R1 and R2 each independently represent any one selected from the group consisting of a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, an alkenyl group having 2 to 6 carbon atoms, an aryl group, and an aralkyl group; R3 represents any one selected from the group consisting of an alkyl group having 1 to 6 carbon atoms, an alkenyl group having 2 to 6 carbon atoms, an aryl group, and an aralkyl group; R4 represents any one selected from the group consisting of a (meth)acryloyl group, a styryl group, and an alkenyl group having 2 to 6 carbon atoms; and n represents any integer of 1 to 5.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.

Abstract: A system and method for providing and programming a programmable inductor is provided. The structure of the programmable inductor includes multiple turns, with programmable interconnects incorporated at various points around the turns to provide a desired isolation of the turns during programming. In an embodiment the programming may be controlled using the size of the vias, the number of vias, or the shapes of the interconnects.

Abstract: The present invention discloses a triphenylsulfonium salt compound as shown in the general formula (I), wherein R1 represents an electron-withdrawing group and R2 represents an amplification group. Said compound shows significantly enhanced solubility and photosensitivity compared with unsubstituted triphenylsulfonium salts, and has significantly advantageous performance compared with prior art improved substitutes.

Abstract: The present embodiments relate to a method for manufacturing a two-dimensional material using a top-down method, the method includes the steps of preparing a bulk crystal, forming a metal layer on the bulk crystal, and then attaching a thermal release tape on the metal layer, exfoliating a two-dimensional material to which the metal layer and the thermal release tape have been attached from the bulk crystal, transferring the two-dimensional material to which the metal layer and the thermal release tape have been attached onto a substrate, and removing the thermal release tape and the metal layer from the substrate onto which the two-dimensional material has been transferred.

Abstract: A resist composition including a polymer; and a compound represented by Formula 1, in Formula 1, R1 is hydrogen, a halogen, an alkyl group having 1 to 7 carbon atoms, a carbonyl group having 1 to 7 carbon atoms, an ester group having 1 to 7 carbon atoms, an acetal group having 1 to 7 carbon atoms, an alkoxy group having 1 to 7 carbon atoms, an ether group having 1 to 7 carbon atoms, or a group represented by Formula R, and R2, R3, R4 and R5 are hydrogen, a halogen, an alkyl group having 1 to 7 carbon atoms, an ester group having 1 to 7 carbon atoms, an acetal group having 1 to 7 carbon atoms, an alkoxy group having 1 to 7 carbon atoms, or an ether group having 1 to 7 carbon atoms,

Abstract: A resist composition comprising a base polymer and an acid generator containing a sulfonium or iodonium salt of iodized benzamide group-containing fluorinated sulfonic acid offers a high sensitivity, minimal LWR and improved CDU independent of whether it is of positive or negative tone.

Abstract: Generally, examples described herein relate to deposition masks and methods of manufacturing and using such deposition masks. An example includes a method for forming a deposition mask. A mask layer is deposited on a substrate. Mask openings are patterned through the mask layer. A central portion of the substrate is removed to define a substrate opening through a periphery portion of the substrate. The mask layer with the mask openings through the mask layer extending across the substrate opening.

Abstract: A collimated electron beam is illuminated to a grounded metal mask such that patterns on the mask can be transferred to a substrate identically. In a preferred embodiment, a linear electron source can be provided for enhancing lithographic throughput. The metal mask is adjacent to the substrate, but does not contact with substrate.

Abstract: A method for functionalizing a surface of a dielectric plate that is transparent to visible light—to be able to examine the dielectric plate using optical microscopy—includes depositing a negative film on the dielectric slide. The negative film comprises a polymerizable composition that polymerizes when exposed to an electron beam. The polymerizable composition is polymerized—by exposing the negative film to the electronic beam—at a set of points representing a preset pattern. Non-polymerized portions of the polymerizable composition are dissolved—to develop the negative film—forming a set of pads of polymerized portions of the polymerizable composition. Each pad corresponds to one point of the preset pattern. A metal film is disposed on the negative film, and the developed negative film is dissolved to define holes through the metal film. Each of the holes corresponds to a base of one pad of the set of pads.

Abstract: Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.

Abstract: An electronic device includes a substrate, and the substrate may include one or more layers. The one or more layers may include a dielectric material and may include one or more electrical traces. The electronic device may include a layer of conductive material, and the layer of conductive material may define a void in the conductive material. The electronic device may include a fiducial mark, and the fiducial mark may include a filler material positioned in the void defined by the conductive material. The fiducial mark may be coupled to the layer of conductive material. The filler material may have a lower reflectivity in comparison to the conductive material, for instance to provide a contrast with the conductive material.

Abstract: The present invention relates to a method for interconnecting components of a sporting good, in particular a sports shoe, and a sports shoe manufactured with such a method. The method may include (a.) forming a pattern element having at least one removable at least partially non-transparent or non-reflective portion, (b.) irradiating at least one of the first and the second component via the pattern element with heat radiation and (c.) interconnecting the irradiated first and second component.

Abstract: A negative resist composition comprising an onium salt having formula (A) and a base polymer is provided. The resist composition exhibits a high resolution during pattern formation and forms a pattern with minimal LER.

Abstract: A multi-charged particle beam irradiation apparatus includes a forming mechanism to form multiple charged particle beams, a multipole deflector array to individually deflect each beam of the multiple charged particle beams so that a center axis trajectory of each beam of the multiple charged particle beams may not converge in a region of the same plane orthogonal to the direction of a central axis of a trajectory of the multiple charged particle beams, and an electron optical system to irradiate a substrate with the multiple charged particle beams while maintaining a state where the multiple charged particle beams are not converged.

Abstract: An integrated circuit having a fingered capacitor with multiple metal fingers formed in inverted-trapezoid-shaped trenches in a multi-layer structure having a polish stop layer over an ultra-low-K dielectric layer over a low-K dielectric layer over a dielectric cap layer. The ultra-low-K dielectric layer reduces capacitance variations between the fingers, while the polish stop layer prevents metal height variations that would otherwise result from performing CMP directly on the ultra-low-K dielectric layer. The layered structure may include another low-K dielectric layer over the polish stop layer that provides a soft landing for the CMP. The polish stop layer may be removed after the CMP polishing and another ultra-low-K dielectric layer may be formed to encapsulate the tops of the metal fingers in the ultra-low-K dielectric material.

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane, a porous pellicle frame, a mask with a patterned surface, a first thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame, and a second thermal conductive adhesive layer that secures the porous pellicle frame to the mask.

Abstract: Chain scission resist compositions suitable for EUV lithography applications may include monomer functional groups that improve the kinetics and/or thermodynamics of the scission mechanism. Chain scission resists may include monomer functional groups that reduce the risk that leaving groups generated through the scission mechanism may chemically corrode processing equipment.

Abstract: The present invention provides methods for controllably forming a layer of amorphous ice and other amorphous solids on a substrate, and also provides cryoelectron microscopy (cryo-EM) sample preparation methods and systems that utilize in vacuo formation of amorphous ice and other solids. Formation of the amorphous solid layer can be independent of the deposition of sample molecules to be analyzed using electron microscopy, and allows for the generation of a uniformly thick layer. Optionally, mass spectrometry instruments are used to generate and purify molecules deposited on the generated amorphous solid layer. The techniques and systems described herein can deliver near ideal cryo-EM sample preparation to greatly increase resolution, sensitivity, scope, and throughput of cryo-EM protein imaging, and therefore greatly impact the field of structural biology.

Abstract: In a method of forming a gate-all-around field effect transistor, a gate structure is formed surrounding a channel portion of a carbon nanotube. An inner spacer is formed surrounding a source/drain extension portion of the carbon nanotube, which extends outward from the channel portion of the carbon nanotube. The inner spacer includes two dielectric layers that form interface dipole. The interface dipole introduces doping to the source/drain extension portion of the carbon nanotube.

Abstract: A method of nanoscale patterning is disclosed. The method comprises: mixing predetermined amounts of a first solvent and a second solvent to generate a solvent, the first solvent and the second solvent being immiscible with each other; dissolving a solute material in the solvent to generate a coating material, the solute material having solubility that is higher in the first solvent than in the second solvent; and applying the coating material onto a substrate to form a plurality of pinholes in the coating material. The formation of the plurality of pinholes is associated with suspension drops mostly comprised of the second solvent, separated from the solute material dissolved in the first solvent, in the coating material. A method of making a stamp with a nanoscale pattern is also disclosed based on the above method.

Abstract: Systems and methods are described herein for electron-beam lithography. In some aspects, a photo electron emitter and channel array assembly (PEECAA) may include a photo-electron emitting cathode having a uniform planar surface and an array of beam channels proximate to the cathode. In some cases, at least one of the cathode or the array of beam channels is removable from the PEECAA. The array of beam channels may include a grid of apertures, a plurality of beam channels, and a shared lens array including a plurality of lenses proximate to an exit of the plurality of beam channels. Individual apertures of the grid of apertures align with individual beam channels to allow electrons from the cathode to pass through the array of beam channels and the shared lens array to form a pixelated pattern, such that, upon exposure to the target, the pixelated pattern is permanently formed on the target.

Abstract: A technique to have precise materials deposition in the micro and nanometer scale relating to 3D printing. A microfluidic pipette and an atomic force microscopy (AFM) needle are used to position the pipette a distance from a working stage to avoid surface tension physics associated with droplet formation of pipette excreted material, “ink.” The combination provides greater control over both the amounts of placement of the ink. In practice, both the AFM needle and the pipette are lowered to a work stage (or the stage is raised to the AFM needle). The pipette excretes a pool of ink onto the stage and the AFM needle is placed into the pool. A unit of ink from the pool adheres to the AFM needle. The AFM needle then moved to a work space on the stage and deposits the ink in the work area through a predetermined printing technique. The system is capable of printing photoresist, polymers, nanomaterials, DNA, proteins, stem cells, semiconductors, metal, plastic and almost anything imaginable.

Abstract: A pretreatment solution for inkjet recording contains a photoacid generator that generates sulfonic acid through light exposure.

Abstract: The present invention relates to a method for interconnecting components of a sporting good, in particular a sports shoe, and a sports shoe manufactured with such a method. The method may include (a.) forming a pattern element having at least one removable at least partially non-transparent or non-reflective portion, (b.) irradiating at least one of the first and the second component via the pattern element with heat radiation and (c.) interconnecting the irradiated first and second component.

Abstract: Disclosed are mask definition tools, apparatus, methods, systems and computer program products configured to process data representing a semiconductor fabrication mask. A non-limiting example of a method includes performing a decomposition process on a full Transmission Cross Coefficient (TCC) using coherent optimal coherent systems (OCS) kernels; isolating a residual TCC that remains after some number of coherent kernels are extracted from the full TCC; and performing at least one decomposition process on the residual TCC using at least one loxicoherent system. The loxicoherent system uses a plurality of distinct non-coherent kernel functions and is a compound system containing a paired coherent system and an incoherent system that act in sequence. An output of the coherent system is input as a self-luminous quantity to the incoherent system, and the output of the incoherent system is an output of the loxicoherent system.

Abstract: A method of fabricating an integrated circuit includes applying photoresist to a MESA dielectric layer of a semiconductor structure, to generate a photoresist layer. The method also includes exposing the photoresist layer with a grayscale mask, to generate an exposed photoresist layer. The photoresist exposed layer includes a thick photoresist pattern in a first region, a thin photoresist pattern in a second region where a height of the thin photoresist pattern is less than half a height of the thick photoresist pattern, and a gap region between the thick photoresist pattern and the thin photoresist pattern.

Abstract: A method for fabricating calcite channels in a nanofluidic device is described. A photoresist layer is coated onto a top surface of a silicon nitride (SiN) substrate. After coating the photoresist layer, the photoresist layer is scanned with an electron beam in a predefined pattern. The scanned photoresist is developed to expose portions of the top surface of the SiN substrate in the predefined pattern. Calcite is deposited in the predefined pattern using atomic layer deposition (ALD) using a calcite precursor gas. Using a solvent, a remaining portion of the photoresist layer is removed to expose the deposited calcite in the predefined pattern and on the top surface of the SiN substrate, where a width of the deposited calcite is in range from 50 to 100 nanometers (nm).

Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes inputting an original set of exposure information for the area and inputting a target post-proximity effect correction (PEC) maximum dose. A local pattern density is calculated for the area of the pattern based on the original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PEC maximum dose.

Abstract: A method for exposing a wafer in a charged particle lithography system. The method comprises generating a plurality of charged particle beamlets, the beamlets arranged in groups, each group comprising an array of beamlets; moving the wafer under the beamlets in a first direction at a wafer scan speed; deflecting the beamlets in a second direction substantially perpendicular to the first direction at a deflection scan speed, and adjusting the deflection scan speed to adjust a dose imparted by the beamlets on the wafer.

Abstract: Coordinates of a first region extraction window, a first sample stage coordinate, a second sample stage coordinate, and a second region extraction window, including images of one sample stage and an observation target tissues of a sample when the one sample stage is respectively positioned on two microscopes are respectively obtained. Based on difference between the first sample stage coordinate and the second sample stage coordinate, the second sample stage coordinate is corrected. Based on the obtained corrected second sample stage coordinate, the second positioning unit is moved from the second non-observation position to the second observation position where the second region extraction window is located at a position corresponding to the coordinate position of the first region extraction window.

Abstract: Methods, systems and devices for using charged particle beams (CPBs) to write different die-specific, non-volatile, electronically readable data to different dies on a substrate. CPBs can fully write die-specific data within the chip interconnect structure during the device fabrication process, at high resolution and within a small area, allowing one or multiple usefully-sized values to be securely written to service device functions. CPBs can write die-specific data in areas readable or unreadable through a (or any) communications bus. Die-specific data can be used for, e.g.: encryption keys; communications addresses; manufacturing information (including die identification numbers); random number generator improvements; or single, nested, or compartmentalized security codes. Die-specific data and locations for writing die-specific data can be kept in encrypted form when not being written to the substrate to conditionally or permanently prevent any knowledge of said data and locations.

Abstract: The present invention relates to an electron beam (eBeam) resist composition, particularly an (eBeam) resist composition for use in the fabrication of integrated circuits. Such resist compositions include an anti-scattering compound which minimises scattering and secondary electron generation, thus affording extremely high resolution lithography. Such high resolution lithography may be used directly upon silicon-based substrates to produce integrated circuits, or may alternatively be used to produce a lithographic mask (e.g. photomask) to facilitate high-resolution lithography.

Abstract: A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having a least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point.

Abstract: In one embodiment, a method of obtaining a beam deflection shape includes using a plurality of beams to write a line pattern on a substrate by deflecting the plurality of beams, the plurality of beams being beams in the i-th row (i is an integer satisfying 1?i?m) among multiple charged-particle beams including beams of m rows and n columns (m and n are integers equal to or greater than two), the deflection being performed in such a manner that a writing area for a beam in the j-th column (j is an integer satisfying 1?j?n?1) is continuously adjacent to a writing area for a beam in the (j+1)th column, measuring a degree of unevenness of an edge of the line pattern, and obtaining a deflection shape of the beam based on the degree of unevenness.

Abstract: A composite electrode structure and methods of making and using thereof are disclosed. The structure has a metal substrate with a metal oxide layer. The average thickness of the metal oxide layer is less than 150 nm, and comprises at least a first metal and a second metal, wherein the first metal and the second metal are different elements. A plurality of carbon nanotubes is disposed on a first surface of the metal oxide layer. At least a portion of the carbon nanotubes are disposed such that one end of the carbon nanotube is positioned at least 5 nm below the surface of the metal oxide layer.

Abstract: Manufacturing methods are disclosed to produce DOE, HOE and Fresnel optical elements. These methods enable low cost manufacturing with high precision. The methods include lithography, roll-to-roll imprint and UV-casting.