Having Diamond Semiconductor Component Patents (Class 438/105)
  • Patent number: 8822315
    Abstract: A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first conductivity type into the first surface of a conductive silicon carbide wafer having the same conductivity type as the implanting ions at one or more predetermined dopant concentrations and implant energies to form a dopant profile, annealing the implanted wafer, and growing an epitaxial layer on the implanted first surface of the wafer.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: September 2, 2014
    Assignee: Cree, Inc.
    Inventors: Davis Andrew McClure, Alexander Suvorov, John Adam Edmond, David Beardsley Slater, Jr.
  • Publication number: 20140242750
    Abstract: The present invention provides a polishing slurry capable of polishing even high-hardness materials such as silicon carbide and gallium nitride at a high polishing speed. The present invention is a polishing slurry including a slurry containing a manganese oxide particle and a manganate ion for polishing high-hardness materials having a Mohs hardness of 8 or higher. In the present invention, the manganese oxide particle in the slurry is preferably 1.0 mass % or more; the manganese oxide is preferably manganese dioxide; and the manganate ion is preferably permanganate ion. The polishing slurry according to the present invention enables even high-hardness hardly-machinable materials such as silicon carbide and gallium nitride to be polished smoothly at a high speed.
    Type: Application
    Filed: October 12, 2012
    Publication date: August 28, 2014
    Inventors: Ryuichi Sato, Yohei Maruyama, Atsushi Koike
  • Patent number: 8815641
    Abstract: A method and structure for a semiconductor device including a thin nitride layer formed between a diamond SOI layer and device silicon layer to block diffusion of ions and improve lifetime of the device silicon.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: August 26, 2014
    Assignee: Soitec
    Inventors: Rick C. Jerome, Francois Hebert, Craig McLachlan, Kevin Hoopingarner
  • Publication number: 20140231825
    Abstract: Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing a semiconductor layer on the buffer layer. In one specific aspect, the c-axis of the buffer layer is oriented perpendicular to the working surface of the diamond layer.
    Type: Application
    Filed: September 11, 2013
    Publication date: August 21, 2014
    Inventor: Chien-Min Sung
  • Patent number: 8809916
    Abstract: A pH sensor may include a reference electrode including a p-channel field effect transistor (FET) whose gate includes a diamond surface having a hydrogen ion insensitive terminal, and a working electrode.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: August 19, 2014
    Assignee: Yokogawa Electric Corporation
    Inventors: Yukihiro Shintani, Kazuma Takenaka
  • Patent number: 8796071
    Abstract: The present invention related to a method for manufacturing a thermal dissipation substrate and a thermal dissipation substrate. The method includes steps of: (a) providing a substrate body having a surface; (b) forming a plurality of concave regions on the surface; and (c) filling the plurality of concave regions with a plurality of diamond materials. The thermal dissipation substrate includes: a substrate having a surface at a first horizontal; a plurality of regions formed on the surface at a second horizontal; and a plurality of diamond materials having a relatively high thermal coefficient and disposed on the plurality of regions.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: August 5, 2014
    Assignee: National Chiao Tung University
    Inventors: YewChung Sermon Wu, Tai-Min Chang, Yu Chia Chiu, Jen-Li Hu
  • Patent number: 8765523
    Abstract: A method for manufacturing a semiconductor device includes the steps of preparing a substrate made of silicon carbide and having an n type region formed to include a main surface, forming a p type region in a region including the main surface, forming an oxide film on the main surface across the n type region and the p type region, by heating the substrate having the p type region formed therein at a temperature of 1250° C. or more, removing the oxide film to expose at least a part of the main surface, and forming a Schottky electrode in contact with the main surface that has been exposed by removing the oxide film.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: July 1, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Takeyoshi Masuda
  • Patent number: 8765524
    Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: July 1, 2014
    Assignee: General Electric Company
    Inventors: Avinash Srikrishnan Kashyap, David Mulford Shaddock, Emad Andarawis Andarawis, Peter Micah Sandvik, Stephen Daley Arthur, Vinayak Tilak
  • Patent number: 8753911
    Abstract: LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: June 17, 2014
    Assignee: RiteDia Corporation
    Inventor: Chien-Min Sung
  • Publication number: 20140159055
    Abstract: A method of manufacturing a composite substrate for a semiconductor device, the method comprising: depositing silicon on a surface of a synthetic diamond wafer; and treating the synthetic diamond wafer to transform the deposited silicon into silicon carbide thus forming a layer of silicon carbide on the surface of the synthetic diamond wafer, wherein the synthetic diamond wafer is selected from one of: a single crystal diamond wafer; and a polycrystalline CVD diamond wafer having a nucleation face and a growth face wherein the nucleation face comprises smaller diamond grains than the growth face, and wherein if the synthetic diamond wafer is a polycrystalline CVD diamond wafer then the silicon carbide layer is formed on the growth face of the polycrystalline CVD diamond wafer.
    Type: Application
    Filed: December 5, 2013
    Publication date: June 12, 2014
    Inventors: Richard Stuart Balmer, Timothy Peter Mollart, Christopher John Howard Wort
  • Patent number: 8735907
    Abstract: In a semiconductor diamond device, there is provided an ohmic electrode that is chemically and thermally stable and has an excellent low contact resistance and high heat resistance. A nickel-chromium alloy, or a nickel-chromium compound, containing Ni and Cr such as Ni6Cr2 or Ni72Cr18Si10, which is chemically and thermally stable, is formed on a semiconductor diamond by a sputtering process and so forth, to thereby obtain the semiconductor diamond device provided with an excellent ohmic electrode. If heat treatment is applied after forming the nickel-chromium alloy or compound, it is improved in characteristics.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: May 27, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Takatoshi Yamada, Somu Kumaragurubaran, Shinichi Shikata
  • Patent number: 8637360
    Abstract: Exemplary embodiments provide structures and methods for power devices with integrated clamp structures. The integration of clamp structures can protect the power device, e.g., from electrical overstress (EOS). In one embodiment, active devices can be formed over a substrate, while a clamp structure can be integrated outside the active regions of the power device, for example, under the active regions and/or inside the substrate. Integrating clamp structure outside active regions of power devices can maximize the active area for a given die size and improve robustness of the clamped device since the current will spread in the substrate by this integration.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: January 28, 2014
    Assignee: Intersil Americas Inc.
    Inventor: Francois Hebert
  • Patent number: 8624263
    Abstract: The present invention is contemplated for providing a diamond semiconductor device where an impurity-doped diamond semiconductor is buried in a selected area, and a method of manufacturing the same. That is, a diamond semiconductor device having an impurity-doped diamond area selectively buried in a recessed portion formed in a diamond substrate; and a method of manufacturing a diamond semiconductor device, including the steps of selectively forming an recessed portion on the {100}-facet diamond semiconductor substrate, wherein the bottom face of the recessed portion is surrounded by the {100} facet and the side face of the recessed portion is surrounded by the {110} facet, and forming an impurity-doped diamond area by epitaxially growing diamond in the <111> direction while doping with impurities and burying the recessed portion.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: January 7, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hiromitsu Kato, Toshiharu Makino, Masahiko Ogura, Hideyo Okushi, Satoshi Yamasaki
  • Publication number: 20130344651
    Abstract: A discharge surface treatment apparatus supplies an electrode material to a surface of a treatment target member by generating pulsating discharges across an inter-electrode gap to form a coating of the electrode material, and includes a switching element that turns application of a voltage from a power source to the inter-electrode gap on/off, a capacitance element that is connected to the switching element in parallel with the inter-electrode gap, an inductance element that is connected in series between both of the switching element and the capacitance element and the inter-electrode gap, and a control unit that includes a function of periodically performing on/off so that an induced electromotive force generated in the inductance element due to a change in the current of discharge generated across the inter-electrode gap can be used as a voltage that induces the next discharge
    Type: Application
    Filed: June 26, 2012
    Publication date: December 26, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoshikazu Nakano, Akihiro Goto
  • Patent number: 8609461
    Abstract: Various embodiments provide methods for forming a diamond heat spreader and integrating the diamond heat spreader with a heat source without generating voids at the interface. In one embodiment, a semiconductor layer can be epitaxially formed on a diamond substrate having a desirably low surface root mean square (RMS) roughness. The semiconductor epi-layer can be used as an interface layer for bonding the diamond substrate to the heat source to provide efficient heat spreading.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: December 17, 2013
    Assignee: STC.UNM
    Inventors: Ganesh Balakrishnan, Jerome V. Moloney, Victor Hasson
  • Patent number: 8598593
    Abstract: A chip includes an integrated circuit and a carbonic layer. The carbonic layer includes a graphite-like carbon, wherein a lateral conducting path through the graphite-like carbon electrically connects two circuit elements of the integrated circuit.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: December 3, 2013
    Assignee: Infineon Technologies AG
    Inventor: Uwe Hoeckele
  • Publication number: 20130306988
    Abstract: A structure having: a substrate and a diamond layer on the substrate having diamond nanoparticles. The diamond nanoparticles are formed by colliding diamond particles with the substrate. A method of: directing an aerosol of submicron diamond particles toward a substrate, and forming on the substrate a diamond layer of diamond nanoparticles formed by the diamond particles colliding with the substrate.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 21, 2013
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Charles R. Eddy, Jr., Boris N. Feygelson, Scooter Johnson
  • Publication number: 20130306989
    Abstract: A structure having: a substrate and a diamond layer on the substrate having diamond nanoparticles. The diamond nanoparticles are formed by colliding diamond particles with the substrate. A method of: directing an aerosol of submicron diamond particles toward a substrate, and forming on the substrate a diamond layer of diamond nanoparticles formed by the diamond particles colliding with the substrate.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 21, 2013
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Charles R. Eddy, JR., Boris N. Feygelson, Scooter Johnson
  • Patent number: 8575625
    Abstract: A semiconductor element mounting member is arranged to infiltrate a matrix metal into a porous body that is formed by sintering diamond particles being in direct contact with each other and that has an infiltration auxiliary layer selectively formed only on the exposed surface of each diamond particle. A production method includes a step at which a mixture of diamond particles, a powder of a chemical element out of which the infiltration auxiliary layer is made, and an ammonium chloride powder is compressed and molded, is then heated to 900° C. or more, and is formed into the porous body. A semiconductor device has a semiconductor element mounted on an element mounting surface of the semiconductor element mounting member with a connecting layer therebetween.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: November 5, 2013
    Assignee: A.L.M.T. Corp.
    Inventors: Kouichi Takashima, Yoshifumi Aoi, Eiji Kamijo
  • Patent number: 8569106
    Abstract: A film of an epitaxial layer that allows the reduction in both the height of a bunching step and crystal defects caused by a failure in migration of reactive species on a terrace is formed on a SiC semiconductor substrate having an off angle of 5 degrees or less. A film of a first-layer epitaxial layer is formed on and in contact with a surface of the SiC semiconductor substrate having an off angle of 5 degrees or less. Subsequently, the temperature in a reactor is lowered. A second-layer epitaxial layer is caused to epitaxially grow on and in contact with a surface of the first-layer epitaxial layer. In the above-described manner, the epitaxial layer is structured with two layers, and the growth temperature for the second epitaxial layer is set lower than the growth temperature for the first epitaxial layer.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: October 29, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Kenichi Ohtsuka, Nobuyuki Tomita, Masayoshi Tarutani
  • Publication number: 20130280860
    Abstract: Method for synthesising a material by chemical vapour deposition (CVD), according to which a plasma is created in a vacuum chamber in the vicinity of a substrate, and according to which a carbon-carrying substance and H2 are introduced into the chamber in order to produce in the chamber a gas comprising substances carrying reactive-carbon atoms in the form of unsaturated molecules or radicals from which the synthesis of said material will be performed, and in that the electromagnetic absorption and inelastic diffusion spectra of the solid material to be synthesised are used to take from these spectra the absorption frequencies that contribute to the reactions that lead to the formation of the solid material to be synthesised, and in that energetic rays are produced in the form of a photon beam carrying quantities of energy determined by each of the frequencies corresponding to said absorption and inelastic diffusion frequencies, said photon beam being injected into the plasma where, for energy states of the s
    Type: Application
    Filed: August 1, 2011
    Publication date: October 24, 2013
    Inventor: Horacio Tellez Oliva
  • Patent number: 8563987
    Abstract: The semiconductor device 100 of this invention includes: a semiconductor layer 2 arranged on the principal surface of a substrate 1 and made of a wide bandgap semiconductor; a trench 5 which is arranged in the semiconductor layer 2 and which has a bottom and a side surface; an insulating region 11 arranged on the bottom and side surface of the trench 5; and a conductive layer 7 arranged in the trench 5 and insulated from the semiconductor layer 2 by the insulating region 11. The insulating region 11 includes a gate insulating film 6 arranged on the bottom and the side surface of the trench 5 and a gap 10 arranged between the gate insulating film 6 and the conductive layer 7 at the bottom of the trench 5. The gate insulating film 6 contacts with the conductive layer 7 on a portion of the side surface of the trench 5 but does not contact with the conductive layer 7 at the bottom of the trench 5.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: October 22, 2013
    Assignee: Panasonic Corporation
    Inventor: Haruyuki Sorada
  • Patent number: 8552435
    Abstract: Electronic device structures that compensate for non-uniform etching on a semiconductor wafer and methods of fabricating the same are disclosed. In one embodiment, the electronic device includes a number of layers including a semiconductor base layer of a first doping type formed of a desired semiconductor material, a semiconductor buffer layer on the base layer that is also formed of the desired semiconductor material, and one or more contact layers of a second doping type on the buffer layer. The one or more contact layers are etched to form a second contact region of the electronic device. The buffer layer reduces damage to the semiconductor base layer during fabrication of the electronic device. Preferably, a thickness of the semiconductor buffer layer is selected to compensate for over-etching due to non-uniform etching on a semiconductor wafer on which the electronic device is fabricated.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: October 8, 2013
    Assignee: Cree, Inc.
    Inventors: Qingchun Zhang, Anant Agarwal
  • Patent number: 8536583
    Abstract: A MOSFET includes: a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. The MOSFET has a sub-threshold slope of not more than 0.4 V/Decade.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: September 17, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Shin Harada, Takeyoshi Masuda, Misako Honaga
  • Publication number: 20130234165
    Abstract: Method for coating micromechanical components of a micromechanical system, in particular a watch movement, comprising: providing a substrate (4) component to be coated; providing said component with a first diamond coating (2) doped with boron; providing said component with a second diamond coating (3); wherein: said second diamond coating (3) is provided by CVD in a reaction chamber; during CVD deposition, during the last portion of the growth process, a controlled increase of the carbon content within the reaction chamber is provided, thereby providing an increase of the sp2/sp3 carbon (6) bonds up to an sp2 content substantially between 1% and 45%. Corresponding micromechanical components are also provided.
    Type: Application
    Filed: October 20, 2011
    Publication date: September 12, 2013
    Applicant: THE SWATCH GROUP RESEARCH AND DEVELOPMENT LTD.
    Inventors: Stewes Bourban, David Richard, Beat Gilomen, Detlef Steinmüller, Herwig Drexel, Doris Steinmüller, Slimane Gnodbane
  • Patent number: 8513090
    Abstract: An object is to provide a novel manufacturing method of a semiconductor substrate containing silicon carbide, and another object is to provide a semiconductor device using silicon carbide. A semiconductor substrate is manufactured through the steps of: adding ions to a silicon carbide substrate to form an embrittlement region in the silicon carbide substrate; bonding the silicon carbide substrate to a base substrate with insulating layers interposed therebetween; heating the silicon carbide substrate and separating the silicon carbide substrate at the embrittlement region to form a silicon carbide layer over the base substrate with the insulating layers interposed between therebetween; and performing heat treatment on the silicon carbide layer at a temperature of 1000° C. to 1300° C. to reduce defects of the silicon carbide layer. A semiconductor device is manufactured using the semiconductor substrate formed as described above.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: August 20, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8492773
    Abstract: Exemplary embodiments provide structures and methods for power devices with integrated clamp structures. The integration of clamp structures can protect the power device, e.g., from electrical overstress (EOS). In one embodiment, active devices can be formed over a substrate, while a clamp structure can be integrated outside the active regions of the power device, for example, under the active regions and/or inside the substrate. Integrating clamp structure outside active regions of power devices can maximize the active area for a given die size and improve robustness of the clamped device since the current will spread in the substrate by this integration.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: July 23, 2013
    Assignee: Intersil Americas Inc.
    Inventor: Francois Hebert
  • Publication number: 20130180576
    Abstract: Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp2 bonded carbon contents. In some cases, the sp2 bonded carbon content may be sufficient to provide the conductive diamond-like carbon material with a visible light transmissivity of greater than about 0.70. A charge carrier separation layer can be coupled adjacent and between the diamond-like carbon cathode and an anode. The conductive diamond-like carbon material of the present invention can be useful for any other application which can benefit from the use of conductive and transparent electrodes which are also chemically inert, radiation damage resistance, and are simple to manufacture.
    Type: Application
    Filed: July 16, 2012
    Publication date: July 18, 2013
    Inventor: Chien-Min Sung
  • Publication number: 20130183798
    Abstract: Methods for integrating wide-gap semiconductors with synthetic diamond substrates are disclosed. Diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited or formed on a layered structure including at least one layer of gallium nitride, aluminum nitride, silicon carbide, or zinc oxide. The resulting structure is a low stress process compatible with wide-gap semiconductor films, and may be processed into optical or high-power electronic devices. The diamond substrates serve as heat sinks or mechanical substrates.
    Type: Application
    Filed: September 10, 2012
    Publication date: July 18, 2013
    Inventors: Daniel Francis, Felix Ejeckam, John Wasserbauer, Dubravko Babic
  • Publication number: 20130175546
    Abstract: Disclosed herein is a new and improved system and method for fabricating monolithically integrated diamond semiconductor. The method may include the steps of seeding the surface of a substrate material, forming a diamond layer upon the surface of the substrate material; and forming a semiconductor layer within the diamond layer, wherein the diamond semiconductor of the semiconductor layer has n-type donor atoms and a diamond lattice, wherein at least 0.16% of the donor atoms contribute conduction electrons with mobility greater than 770 cm2/Vs to the diamond lattice at 100 kPa and 300K.
    Type: Application
    Filed: January 6, 2013
    Publication date: July 11, 2013
    Applicant: AKHAN Technologies, Inc.
    Inventor: Adam Khan
  • Publication number: 20130161648
    Abstract: Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 27, 2013
    Applicant: AKHAN Technologies, Inc.
    Inventor: Adam Khan
  • Publication number: 20130153931
    Abstract: The disclosure relates to the formation of n-doped single crystal diamond (SCD). In general, a SCD substrate is preferentially anisotropically etched to provide one or more recesses in the SCD substrate, where the recesses are defined by (1 1 1) surface sidewalls resulting from the preferential anisotropic etching process. The recesses generally have a pyramidal shape. N-type doped SCD (e.g., using a phosphorous dopant) is then deposited into the preferentially anisotropically etched recesses. When the SCD substrate is a p-type diamond (e.g., using a boron dopant), the resulting structure can be used as a p-n junction, for example for use in various power electronic apparatus such as diodes, etc.
    Type: Application
    Filed: August 31, 2011
    Publication date: June 20, 2013
    Applicant: Board of Trustees of Michigan State University
    Inventors: Timothy A. Grotjohn, Jes Asmussen, Timothy Hogan
  • Patent number: 8461028
    Abstract: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: June 11, 2013
    Assignee: Board of Regents, The University of Texas System
    Inventors: Luigi Colombo, Robert M. Wallace, Rodney S. Ruoff
  • Patent number: 8455880
    Abstract: Provided is a light emitting device. A light emitting device includes: a conductive support member; a light emitting structure for generating a light on the conductive support member, the light emitting structure comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer; an electrode on the light emitting structure; and an oxide layer between the electrode and the light emitting structure. The light emitting structure includes an oxygen-injected region where oxygen is injected on an upper portion of the light emitting structure.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: June 4, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hyung Jo Park, Hyun Kyong Cho
  • Patent number: 8455278
    Abstract: N-V centers in diamond are created in a controlled manner. In one embodiment, a single crystal diamond is formed using a CVD process, and then annealed to remove N-V centers. A thin layer of single crystal diamond is then formed with a controlled number of N-V centers. The N-V centers form Qubits for use in electronic circuits. Masked and controlled ion implants, coupled with annealing are used in CVD formed diamond to create structures for both optical applications and nanoelectromechanical device formation. Waveguides may be formed optically coupled to the N-V centers and further coupled to sources and detectors of light to interact with the N-V centers.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: June 4, 2013
    Assignee: Apollo Diamond, Inc
    Inventors: Robert C. Linares, Patrick J. Doering, William W. Dromeshauser, Bryant Linares, Alfred R. Genis
  • Patent number: 8450146
    Abstract: A method for manufacturing a transistor assembly includes the steps of: (a) forming a transistor; (b) polishing a base substrate; and (c) securing the transistor of which the base substrate is polished to a support substrate. The step (a) is a step of forming a first semiconductor layer and a second semiconductor layer on a principle surface of the base substrate. The step (b) is a step of polishing a surface of the base substrate opposite to the principle surface. The step (c) is a step of securing the transistor on the support substrate in the presence of a stress applied on the base substrate in such a direction that a warp of the base substrate is reduced. The base substrate is made of a material different from that of the first semiconductor layer and the second semiconductor layer, and a tensile stress is applied on the second semiconductor layer.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: May 28, 2013
    Assignee: Panasonic Corporation
    Inventors: Kenichiro Tanaka, Tetsuzo Ueda, Hisayoshi Matsuo, Masahiro Hikita
  • Publication number: 20130126903
    Abstract: Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing a semiconductor layer on the buffer layer. In one specific aspect, the c-axis of the buffer layer is oriented perpendicular to the working surface of the diamond layer.
    Type: Application
    Filed: May 21, 2012
    Publication date: May 23, 2013
    Inventor: Chien-Min Sung
  • Publication number: 20130126909
    Abstract: Electronic field effect devices, and methods of manufacture of these electronic field effect devices are disclosed. In particular, there is disclosed an electronic field effect device which has improved electrical properties due to the formation of a highly mobile two-dimensional charge-carrier gas in a simple structure formed from diamond in combination with polar materials.
    Type: Application
    Filed: December 20, 2012
    Publication date: May 23, 2013
    Applicant: DIAMOND MICROWAVE DEVICES LIMITED
    Inventor: Diamond Microwave Devices Limited
  • Patent number: 8445320
    Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Kuan-Neng Chen, Damon Farmer, Yu-Ming Lin
  • Patent number: 8435833
    Abstract: Wide bandgap devices are formed on a diamond substrate, such as for light emitting diodes as a replacement for incandescent light bulbs and fluorescent light bulbs. In one embodiment, diodes (or other devices) are formed on diamond in at least two methods. A first method comprises growing a wide bandgap material on diamond and building devices on that grown layer. The second method involves bonding a wide bandgap layer (device or film) onto diamond and building the device onto the bonded layer. These devices may provide significantly higher efficiency than incandescent or fluorescent lights, and provide significantly higher light or energy density than other technologies. Similar methods and structures result in other wide bandgap semiconductor devices.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: May 7, 2013
    Assignee: Apollo Diamond, Inc.
    Inventor: Robert C. Linares
  • Patent number: 8431935
    Abstract: A semiconductor substrate includes: a substrate having a single crystal silicon on at least one surface thereof; a buffer layer that is provided on the single crystal silicon and has at least one cobalt silicide layer primarily containing cobalt silicide; and a silicon carbide single crystal film provided on the buffer layer.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: April 30, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Hiroyuki Shimada
  • Patent number: 8421050
    Abstract: Methods in accordance with this invention form a microelectronic structure by forming a carbon nano-tube (“CNT”) layer, and forming a carbon layer (“carbon liner”) above the CNT layer, wherein the carbon liner comprises: (1) a first portion disposed above and in contact with the CNT layer; and/or (2) a second portion disposed in and/or around one or more carbon nano-tubes in the CNT layer. Numerous other aspects are provided.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: April 16, 2013
    Assignee: SanDisk 3D LLC
    Inventors: Er-Xuan Ping, Huiwen Xu, April D. Schricker, Wipul Pemsiri Jayasekara
  • Publication number: 20130075757
    Abstract: A semiconductor device according to the present embodiment includes a diamond substrate having a surface plane inclined from a (100) plane in a range of 10 degrees to 40 degrees in a direction of <011> ±10 degrees, and an n-type diamond semiconductor layer containing phosphorus (P) and formed above the surface plane described above.
    Type: Application
    Filed: July 23, 2012
    Publication date: March 28, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mariko Suzuki, Tadashi Sakai, Naoshi Sakuma, Masayuki Katagiri, Yuichi Yamazaki
  • Patent number: 8404562
    Abstract: According to an embodiment, a composite wafer includes a carrier substrate having a graphite core and a monocrystalline semiconductor layer attached to the carrier substrate.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: March 26, 2013
    Assignee: Infineon Technologies AG
    Inventors: Rudolf Berger, Hermann Gruber, Wolfgang Lehnert, Guenther Ruhl, Raimund Foerg, Anton Mauder, Hans-Joachim Schulze
  • Publication number: 20130026492
    Abstract: Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The system may include a diamond material having n-type donor atoms and a diamond lattice, wherein 0.16% of the donor atoms contribute conduction electrons with mobility greater than 770 cm2/Vs to the diamond lattice at 100 kPa and 300K. The method of fabricating diamond semiconductors may include the steps of selecting a diamond material having a diamond lattice; introducing a minimal amount of acceptor dopant atoms to the diamond lattice to create ion tracks; introducing substitutional dopant atoms to the diamond lattice through the ion tracks; and annealing the diamond lattice.
    Type: Application
    Filed: October 14, 2011
    Publication date: January 31, 2013
    Applicant: AKHAN TECHNOLOGIES INC.
    Inventor: Adam Khan
  • Publication number: 20130015469
    Abstract: A semiconductor substrate having a first side and a second side made of single crystal silicon carbide is prepared. A mask layer having a plurality of openings and made of silicon oxide is formed on the second side. The plurality of openings expose a plurality of regions included in the second side, respectively. A plurality of diamond portions are formed by epitaxial growth on the plurality of regions, respectively. The epitaxial growth is stopped before the plurality of diamond portions come into contact with each other. A Schottky electrode is formed on each of the plurality of diamond portions. An ohmic electrode is formed on the first side.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 17, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Hideki Hayashi
  • Publication number: 20120302005
    Abstract: A field effect transistor includes a metal carbide source portion, a metal carbide drain portion, an insulating carbon portion separating the metal carbide source portion from the metal carbide portion, a nanostructure formed over the insulating and carbon portion and connecting the metal carbide source portion to the metal carbide drain portion, and a gate stack formed on over at least a portion of the insulating carbon portion and at least a portion of the nanostructure.
    Type: Application
    Filed: August 3, 2012
    Publication date: November 29, 2012
    Applicant: International Business Machines Corporation
    Inventors: Cyril Cabral, JR., Josephine B. Chang, Alfred Grill, Michael A. Guillorn, Christian Lavoie, Eugene J. O'Sullivan
  • Patent number: 8319246
    Abstract: A semiconductor device includes: a semiconductor structure unit; an interconnect layer provided on the major surface side of the semiconductor structure unit; an electrode pad provided on a surface of the interconnect layer on a side opposite to a surface on which the semiconductor structure unit is provided, and the electrode pad electrically connected to the interconnect layer; a plurality of metal pillars joined to the electrode pad separately from each other; and an external terminal provided commonly at tips of the plurality of metal pillars, the metal pillars having an area in a plan view smaller than an area in a plan view of the external terminal.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: November 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiaki Sugizaki
  • Patent number: 8309438
    Abstract: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: November 13, 2012
    Assignees: Board of Regents, The University of Texas System, Texas Instruments, Inc.
    Inventors: Luigi Colombo, Robert M. Wallace, Rodney S. Ruoff
  • Publication number: 20120273775
    Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 1, 2012
    Inventor: Chien-Min Sung