Abstract: A semiconductor package is disclosed that includes a semiconductor device; a circuit board; and a connection mechanism including a first conductive terminal provided on the semiconductor device, and a second conductive terminal provided on the circuit board side, the connection mechanism electrically connecting the semiconductor device and the circuit board via the first conductive terminal and the second conductive terminal. At least one of the first conductive terminal and the second conductive terminal of the connection mechanism includes one or more carbon nanotubes each having one end thereof fixed to the surface of the at least one of the first conductive terminal and the second conductive terminal, and extending in a direction away from the surface. The first conductive terminal and the second conductive terminal engage each other through the carbon nanotubes.

Abstract: MOSFET is provided with SiC film. SiC film has a facet on its surface, and the length of one period of the facet is 100 nm or more, and the facet is used as channel. Further, a manufacturing method of MOSFET includes: a step of forming SiC film; a heat treatment step of heat-treating SiC film in a state where Si is supplied on the surface of SiC film; and a step of forming the facet obtained on the surface of SiC film by the heat treatment step into a channel. Thereby, it is possible to sufficiently improve the characteristics.

Abstract: Electronic field effect devices, and methods of manufacture of these electronic field effect devices are disclosed. In particular, there is disclosed an electronic field effect device which has improved electrical properties due to the formation of a highly mobile two-dimensional charge-carrier gas in a simple structure formed from diamond in combination with polar materials.

Abstract: A detection device comprising a photodetector comprising a first semiconductor layer through which light first enters the photodetector; the first semiconductor layer formed of a first semiconductor material crystal lattice which terminates at an interface creating a first interface charge; the first semiconductor layer being an absorption layer in which photons in a predetermined wavelength range are absorbed and create photogenerated carriers; and a second polar semiconductor layer deposited on the crystal lattice of the first semiconductor layer substantially transparent to light in the predetermined wavelength range and having a total polarization different from the first semiconductor layer so that a second interface charge is induced at the interface between the first and second semiconductor layers; the induced second interface charge reduces or substantially cancels the first interface charge so as to increase the collection of photogenerated carriers by the photodetector.

Abstract: An avalanche photodetector comprising a multiplication layer formed of a first material having a first polarization; the multiplication layer having a first electric field upon application of a bias voltage; an absorption layer formed of a second material having a second polarization forming an interface with the multiplication layer; the absorption layer having a second electric field upon application of the bias voltage, the second electric field being less than the first electric field or substantially zero, carriers created by light absorbed in the absorption layer being multiplied in the multiplication layer due to the first electric field; the absorption layer having a second polarization which is greater or less than the first polarization to thereby create an interface charge; the interface charge being positive when the first material predominately multiplies holes, the interface charge being negative when the first material predominately multiplies electrons, the change in electric field at the inte

Abstract: In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of a diamond substrate in a [001] direction, a significant reduction in crystal defects peculiar to a diamond is possible. The equivalent effects are also provided by shifting surface orientation of a single-crystal diamond thin-film or channel slightly from a [001] direction. It is possible to obtain a significantly high transconductance gm as compared with that in a transistor produced using conventional surface orientation.

Abstract: To provide a Schottky electrode in a diamond semiconductor, which has a good adhesion properties to diamonds, has a contacting surface which does not become peeled due to an irregularity in an external mechanical pressure, does not cause a reduction in yield in a diode forming process and does not cause deterioration in current-voltage characteristics, and a method of manufacturing the Schottky electrode. A Schottky electrode which includes: scattered island-form pattern Pt-group alloy thin films which are formed on a diamond surface formed on a substrate, in which the Pt-group alloy includes 50 to 99.9 mass % of Pt and 0.

Abstract: Semiconductor-on-diamond devices and methods for making such devices are provided. One such method may include depositing a semiconductor layer on a semiconductor substrate, depositing an adynamic diamond layer on the semiconductor layer opposite the semiconductor substrate, and coupling a support substrate to the adynamic diamond layer opposite the semiconductor layer to support the adynamic layer.

Abstract: A semiconductor device assembly and method can include a single semiconductor layer or stacked semiconductor layers, for example semiconductor wafers or wafer sections (semiconductor dice). On each semiconductor layer, a diamond layer formed therethrough can aid in the routing and dissipation of heat. The diamond layer can include a first portion on the back of the semiconductor layer, and one or more second portions which extend vertically into the semiconductor layer, for example completely through the semiconductor layer. Thermal contact can then be made to the diamond layer to conduct heat away from the one or more semiconductor layers. A conductive via can be formed through the diamond layers to provide signal routing and heat dissipation capabilities.

Abstract: Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp2 bonded carbon contents. In some cases, the sp2 bonded carbon content may be sufficient to provide the conductive diamond-like carbon material with a visible light transmissivity of greater than about 0.70. A charge carrier separation layer can be coupled adjacent and between the diamond-like carbon cathode and an anode. The conductive diamond-like carbon material of the present invention can be useful for any other application which can benefit from the use of conductive and transparent electrodes which are also chemically inert, radiation damage resistance, and are simple to manufacture.

Abstract: The present invention relates to a diamond n-type semiconductor in which the amount of change in carrier concentration is fully reduced in a wide temperature range. The diamond n-type semiconductor comprises a diamond substrate, and a diamond semiconductor formed on a main surface thereof and turned out to be n-type. The diamond semiconductor exhibits a carrier concentration (electron concentration) negatively correlated with temperature in a part of a temperature region in which it is turned out to be n-type, and a Hall coefficient positively correlated with temperature. The diamond n-type semiconductor having such a characteristic is obtained, for example, by forming a diamond semiconductor doped with a large amount of a donor element while introducing an impurity other than the donor element onto the diamond substrate.

Abstract: Semiconductor-on-diamond (SOD) substrates and methods for making such substrates are provided. In one aspect, a method of making an SOD substrate may include depositing a base layer onto a lattice-orienting silicon (Si) substrate such that the base layer lattice is substantially oriented by the Si substrate, depositing a semiconductor layer onto the base layer such that the semiconductor layer lattice is substantially oriented with respect to the base layer lattice, and disposing a layer of diamond onto the semiconductor layer. The base layer may include numerous materials, including, without limitation, aluminum phosphide (AlP), boron arsenide (BAs), gallium nitride (GaN), indium nitride (InN), and combinations thereof. Additionally, the method may further include removing the lattice-orienting Si substrate and the base layer from the semiconductor layer. In one aspect, the Si substrate may be of a single crystal orientation.

Abstract: Wide bandgap devices are formed on a diamond substrate, such as for light emitting diodes as a replacement for incandescent light bulbs and fluorescent light bulbs. In one embodiment, diodes (or other devices) are formed on diamond in at least two methods. A first method comprises growing a wide bandgap material on diamond and building devices on that grown layer. The second method involves bonding a wide bandgap layer (device or film) onto diamond and building the device onto the bonded layer. These devices may provide significantly higher efficiency than incandescent or fluorescent lights, and provide significantly higher light or energy density than other technologies. Similar methods and structures result in other wide bandgap semiconductor devices.

Abstract: The present invention relates to a coating system on a substrate with improved protection against wear as well as corrosion. According to the invention the substrate is coated with a diamond like carbon (DLC) layer. This DLC layer is coated with an additional layer with material different from the DLC coating material, thereby closing the pin holes of the DLC layer.

Abstract: A method for formation of a carbon-based field effect transistor (FET) includes depositing a first dielectric layer on a carbon layer located on a substrate; forming a gate electrode on the first dielectric layer; etching an exposed portion of the first dielectric layer to expose a portion of the carbon layer; depositing a second dielectric layer over the gate electrode to form a spacer, wherein the second dielectric layer is deposited by atomic layer deposition (ALD), and wherein the second dielectric layer does not form on the exposed portion of the carbon layer; forming source and drain contacts on the carbon layer and forming a gate contact on the gate electrode to form the carbon-based FET.

Abstract: The invention provides a STI structure and method for forming the same. The STI structure includes a semiconductor substrate; a first trench embedded in the semiconductor substrate and filled up with a first dielectric layer; and a second trench formed on a top surface of the semiconductor substrate and interconnected with the first trench, wherein the second trench is filled up with a second dielectric layer, a top surface of the second dielectric layer is flushed with that of the semiconductor substrate, and the second trench has a width smaller than that of the first trench. The invention reduces dimension of divots and improves performance of the semiconductor device.

Abstract: The invention provides a STI structure and a method for manufacturing the same. The STI includes a semiconductor substrate; a first trench formed on the upper surface of the semiconductor substrate and filled with an epitaxial layer, wherein the upper surface of the epitaxial layer is higher than that of the semiconductor substrate; and a second trench formed on the epitaxial layer and filled with a first dielectric layer, wherein the upper surface of the first dielectric layer is flush with that of the epitaxial layer, and the width of the second trench is smaller than that of the first trench. The invention reduces the influences of divots on performance of the semiconductor device.

Abstract: Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing a semiconductor layer on the buffer layer. In one specific aspect, the c-axis of the buffer layer is oriented perpendicular to the working surface of the diamond layer.

Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.

Abstract: The invention relates to transparent rectifying contact structures for application in electronic devices, in particular appertaining to optoelectronics, solar technology and sensor technology, and also a method for the production thereof. The transparent rectifying contact structure according to the invention has the following constituents: a) a transparent semiconductor, b) a transparent, non-insulating and non-conducting layer composed of metal oxide, metal sulphide and/or metal nitride, the resistivity of which is preferably in the range of 102 ?cm to 107 ?cm and c) a layer composed of a transparent electrical conductor wherein the layer b) is formed between the semiconductor a) and the layer c) and the composition of the layer b) is defined in greater detail in the description of the patent.

Abstract: First and second synthetic diamond regions are doped with boron. The second synthetic diamond region is doped with boron to a greater degree than the first synthetic diamond region, and in physical contact with the first synthetic diamond region. In a further example embodiment, the first and second synthetic diamond regions form a diamond semiconductor, such as a Schottky diode when attached to at least one metallic lead.

Abstract: A manufacturing method of a silicon carbide semiconductor device in which an electric field applied to a gate oxide film can be relaxed and thereby reliability can be ensured, and by the method manufacturing costs can be reduced. Well regions, channel regions, and gate electrodes are formed so that, given that extending lengths, with respect to the inner sides of source regions, of each of the well regions, the channel regions, and the gate electrodes are Lwell, Lch, and Lg, respectively, a relationship of Lch<Lg<Lwell is satisfied; and the channel regions are further formed by diffusing by activation annealing boron as a third impurity, having been implanted by activation annealing into the source regions, into a silicon carbide layer.

Abstract: A silicon carbide power MOSFET having a drain region of a first conductivity type, a base region of a second conductivity type above the drain region, and a source region of the first conductivity type adjacent an upper surface of the base region, the base region including a channel extending from the source region through the base region adjacent a gate interface surface thereof, the channel having a length less than approximately 0.6 ?m, and the base region having a doping concentration of the second conductivity type sufficiently high that the potential barrier at the source end of the channel is not lowered by the voltage applied to the drain. The MOSFET includes self-aligned base and source regions as well as self-aligned ohmic contacts to the base and source regions.

Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.

Abstract: N-V centers in diamond are created in a controlled manner. In one embodiment, a single crystal diamond is formed using a CVD process, and then annealed to remove N-V centers. A thin layer of single crystal diamond is then formed with a controlled number of N-V centers. The N-V centers form Qubits for use in electronic circuits. Masked and controlled ion implants, coupled with annealing are used in CVD formed diamond to create structures for both optical applications and nanoelectromechanical device formation. Waveguides may be formed optically coupled to the N-V centers and further coupled to sources and detectors of light to interact with the N-V centers.

Abstract: A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.

Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.

Abstract: A graphene field effect transistor includes a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.

Abstract: The present invention provides a body contact device structure and a method for manufacturing the same. According to the present invention, an opening is formed by removing one end of a dummy gate stack after forming the dummy gate stack, wherein a residual portion of the dummy gate stack is a body stack comprising a body pile-up layer that directly contacts a substrate. Next, a replacement gate stack is formed in the opening, and then a body contact is formed on the body pile-up layer in the body stack. The body contact device structure formed by the method of the present invention effectively reduces the parasitic effects and the device area, and improves the performance of the device structure.

Abstract: The present disclosure provides devices for neuronal growth and associate methods. In one aspect, for example, a neuronal growth device is provided including a layer of nanodiamond particles having an exposed neuronal growth surface, a doped diamond layer contacting the layer of nanodiamond particles opposite the neuronal growth surface, and a semiconductor layer coupled to the doped diamond layer opposite the layer of nanodiamond particles. In one aspect, the nanodiamond particles are substantially immobilized by the doped diamond layer.

Abstract: N-V centers in diamond are created in a controlled manner. In one embodiment, a single crystal diamond is formed using a CVD process, and then annealed to remove N-V centers. A thin layer of single crystal diamond is then formed with a controlled number of N-V centers. The N-V centers form Qubits for use in electronic circuits. Masked and controlled ion implants, coupled with annealing are used in CVD formed diamond to create structures for both optical applications and nanoelectromechanical device formation. Waveguides may be formed optically coupled to the N-V centers and further coupled to sources and detectors of light to interact with the N-V centers.

Abstract: A gate after diamond transistor and method of making comprising the steps of depositing a first dielectric layer on a semiconductor substrate, depositing a diamond particle nucleation layer on the first dielectric layer, growing a diamond thin film layer on the first dielectric layer, defining an opening for the gate in the diamond thin film layer, patterning of the diamond thin film layer for a gate metal to first dielectric layer surface, etching the first dielectric layer, depositing and defining a gate metal, and forming a contact window opening in the diamond thin film layer and the first dielectric layer to the ohmic contact.

Abstract: Various embodiments of the present invention are directed to methods for coupling semiconductor-based photonic devices to diamond. In one embodiment of the present invention, a photonic device is optically coupled with a diamond structure. The photonic device comprises a semiconductor material and is optically coupled with the diamond structure with an adhesive substance that adheres the photonic device to the diamond structure. A method for coupling the photonic device with the diamond structure is also provided. The method comprises: depositing a semiconductor material on the diamond structure; forming the photonic device in the semiconductor material so that the photonic device couples with the diamond structure; and adhering the photonic device to the diamond structure.

Abstract: Contacting materials and methods for forming ohmic contact to the N-face polarity surfaces of Group-III nitride based semiconductor materials, and devices fabricated using the methods. One embodiment of a light emitting diode (LED) a Group-III nitride active epitaxial region between two Group-III nitride oppositely doped epitaxial layers. The oppositely doped layers have alternating face polarities from the Group III and nitrogen (N) materials, and at least one of the oppositely doped layers has an exposed surface with an N-face polarity. A first contact layer is included on and forms an ohmic contact with the exposed N-face polarity surface. In one embodiment, the first contact layer comprises indium nitride.

Abstract: LED devices and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.

Abstract: A silicon carbide semiconductor device having a MOS structure includes: a substrate; a channel area in the substrate; a first impurity area; a second impurity area; a gate insulating film on the channel area; and a gate on the gate insulating film. The channel area provides an electric current path. The channel area and the gate insulating film have an interface therebetween. The interface includes a dangling bond, which is terminated by a hydrogen atom or a hydroxyl. The interface has a hydrogen concentration equal to or larger than 2.6×1020 cm?3.

Abstract: A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least two sublayers of oriented carbon nanotubes. A first sublayer is created by growing carbon nanotubes in a first direction parallel to the chip substrate from a catalyst in the presence of a reactant gas flow in the first direction, and a second sublayer is created by growing carbon nanotubes in a second direction parallel to the substrate and different from the first direction from a catalyst in the presence of a reactant gas flow in the second direction. The first and second directions are preferably substantially perpendicular. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal.

Abstract: In one aspect, a method includes fabricating a device. The device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer. In another aspect, a device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer.

Abstract: The present invention provides a method of selectively forming a flat plane on an atomic level on a diamond (001), (110) or (111) surface. A method of selectively forming a flat plane on a diamond surface comprising growing diamond on a stepped diamond surface of any of crystal structures (001), (110) and (111) by CVD (Chemical Vapor Deposition) under growth conditions such that step-flow growth of diamond is carried out thereafter.

Abstract: A method of manufacturing a transistor, typically a MESFET, includes providing a substrate including single crystal diamond material having a growth surface on which further layers of diamond material can be deposited. The substrate is preferably formed by a CVD process and has high purity. The growth surface has a root-mean-square roughness of 3 nm or less, or is free of steps or protrusions larger than 3 nm. Further diamond layers are deposited on the growth surface to define the active regions of the transistor. An optional n+ shielding layer can be formed in or on the substrate, following which an additional layer of high purity diamond is deposited. A layer of intrinsic diamond may be formed directly on the upper surface of the high purity layer, followed by a boron doped (“delta doped”) layer. A trench is formed in the delta doped layer to define a gate region.

Abstract: Self-aligned fabrication of silicon carbide semiconductor devices is a desirable technique enabling reduction in the number of photolithographic steps, simplified alignment of different device regions, and reduced spacing between the device regions. This invention provides a method of fabricating silicon carbide (SiC) devices utilizing low temperature selective epitaxial growth which allows avoiding degradation of many masking materials attractive for selective epitaxial growth. Another aspect of this invention is a combination of the low temperature selective epitaxial growth of SiC and self-aligned processes.

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.

Abstract: A solid state system comprising a host material and a quantum spin defect, wherein the quantum spin defect has a T2 at room temperature of about 300 ?s or more and wherein the host material comprises a layer of single crystal CVD diamond having a total nitrogen concentration of about 20 ppb or less, wherein the surface roughness, Rq of the single crystal diamond within an area defined by a circle of radius of about 5 ?m centred on the point on the surface nearest to where the quantum spin defect is formed is about 10 nm or less, methods for preparing solid state systems and the use of single crystal diamond having a total nitrogen concentration of about 20 ppb or less in spintronic applications are described.

Abstract: A semiconductor substrate including at least a layer based on doped diamond with a thickness greater than or equal to approximately 10 ?m, a layer based on at least one semiconductor or a stack of layers including the semiconductor-based layer, and a layer based on intrinsic diamond disposed against the layer based on doped diamond, between the layer based on doped diamond and the semiconductor-based layer.

Abstract: Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp2 bonded carbon contents. In some cases, the sp2 bonded carbon content may be sufficient to provide the conductive diamond-like carbon material with a visible light transmissivity of greater than about 0.70. A charge carrier separation layer can be coupled adjacent and between the diamond-like carbon cathode and an anode. The conductive diamond-like carbon material of the present invention can be useful for any other application which can benefit from the use of conductive and transparent electrodes which are also chemically inert, radiation damage resistance, and are simple to manufacture.

Abstract: A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.

Abstract: The invention is a method for growing a critical adherent diamond layer on a substrate by Chemical Vapor Deposition (CVD) and the article produced by the method. The substrate can be a compound semiconductor coated with an adhesion layer. The adhesion layer is preferably a dielectric, such as silicon nitride, silicon carbide, aluminum nitride or amorphous silicon, to name some primary examples. The typical thickness of the adhesion layer is one micrometer or less. The resulting stack of layers, (e.g. substrate layer, adhesion layer and diamond layer) is structurally free of plastic deformation and the diamond layer is well adherent to the dielectric adhesion layer such that it can be processed further, such as by increasing the thickness of the diamond layer to a desired level, or by subjecting it to additional thin film fabrication process steps. In addition to preventing plastic deformation of the layer stack, the process also reduces the formation of soot during the CVD process.

Abstract: A deposition apparatus includes: a first electrode for placing a processing object; a second electrode for generating plasma with the first electrode, the second electrode being opposed to the first electrode; and a heat flow control heat transfer part for drawing heat from the processing object to generate a heat flow from a central area to a peripheral area of the processing object.

Abstract: An opaque, low resistivity silicon carbide and a method of making the opaque, low resistivity silicon carbide. The opaque, low resistivity silicon carbide is doped with a sufficient amount of nitrogen to provide the desired properties of the silicon carbide. The opaque, low resistivity silicon carbide is a free-standing bulk material that may be machined to form furniture used for holding semi-conductor wafers during processing of the wafers. The opaque, low resistivity silicon carbide is opaque at wavelengths of light where semi-conductor wafers are processed. Such opaqueness provides for improved semi-conductor wafer manufacturing. Edge rings fashioned from the opaque, low resistivity silicon carbide can be employed in RTP chambers.