Making Conductivity Modulation Device (e.g., Unijunction Transistor, Double Base Diode, Conductivity-modulated Transistor, Etc.) Patents (Class 438/141)
  • Patent number: 6024794
    Abstract: By applying the method, the critical film thickness of a compound semiconductor layer is determined, and a semiconductor device having a compound semiconductor layer with an optimized film thickness excellent in emitting performance is manufactured.The relationship between film thickness of a compound semiconductor layer and photoluminescence (PL) corresponding to the film thickness is obtained by measurement, the film thickness where PL exhibits a peak is designated as critical film thickness. The semiconductor layer comprises II-VI group compound semiconductor layer containing at least cadmium. The relationship between the critical film thickness and cadmium composition ratio is obtained by measurement. An equation which approximates the relationship between the critical film thickness and cadmium composition ratio is formulated.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: February 15, 2000
    Assignee: Sony Corporation
    Inventors: Koshi Tamamura, Hironori Tsukamoto, Masaharu Nagai
  • Patent number: 5908305
    Abstract: The device comprises a layer of silicon separated from a substrate by a layer of insulating material. A rib having an upper surface and two side surfaces is formed in the layer of silicon to provide a waveguide for the transmission of optical signals. A lateral doped junction is formed between the side surfaces of the rib such that an electrical signal can be applied across the junction to control the density of charge carriers across a substantial part of the cross-sectional area of the rib thereby actively altering the effective refractive index of the waveguide.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: June 1, 1999
    Assignee: Bookham Technology Limited
    Inventors: Stephen James Crampton, Arnold Peter Roscoe Harpin, Andrew George Rickman
  • Patent number: 5888852
    Abstract: The method for forming a semiconductor microstructure of this invention includes the steps of: forming a mask pattern having a first opening and a second opening on a substrate having a semiconductor layer as an upper portion thereof; and selectively etching the semiconductor layer using the mask pattern to form a semiconductor microstructure extending in a first direction parallel to a surface of the substrate, wherein, in the step of selectively etching the semiconductor layer, an etching rate in a second direction vertical to the first direction and parallel to the surface of the substrate is substantially zero with respect to an etching rate in the first direction, and a width of the semiconductor microstructure is substantially equal to a shortest distance between the first opening and the second opening in the second direction.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: March 30, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Yuki, Kiyoyuki Morita, Kiyoshi Morimoto, Yoshihiko Hirai
  • Patent number: 5858808
    Abstract: An auxiliary device is constituted by a U-bolt-shaped, pincer-like implement which, during the fabrication of semiconductor devices with a mesa structure from a starting substrate forming a wafer, serves to transfer the outline geometry of the individual semiconductor devices from one side of the wafer to the back of the wafer. The implement has at least one tracer at the end of one of its arms for engaging a sawed groove and for guiding the implement along the sawed groove on one side of the wafer. At the end of the other arm, a marking device with at least one marking stylus is provided whereby the course of the at least one sawed grooved can be transferred from the front side of the wafer to the back, and scribed there in the form of auxiliary lines.
    Type: Grant
    Filed: January 15, 1997
    Date of Patent: January 12, 1999
    Assignee: Deutsche ITT Industries GmbH
    Inventors: Gunter Igel, Johann Schroeder
  • Patent number: 5804470
    Abstract: A method of manufacturing a polysilicon plug in an integrated circuit semiconductor device wherein the polysilicon plug is selectively doped to act as a resistive load or alternatively to act as a diode load. The polysilicon load can be used in an SRAM memory cell.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: September 8, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Donald L. Wollesen
  • Patent number: 5755877
    Abstract: In an extremely thin hetero-epitaxial growth film less than 1 .mu.m, the thin film can be grown at high precision by controlling the growth conditions. The method of growing a thin film on a semiconductor substrate comprises the steps of: forming a semiconductor thin film on a surface of a semiconductor substrate; allowing X-rays to be incident upon the thin film now being grown; measuring fluorescent X-rays emitted from the thin film now being grown in accompany with the application of the X-rays; and controlling growth conditions of the thin film on the basis of the measured values.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: May 26, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanobu Kamakura, Norihiko Tsuchiya