Repair Or Restoration Patents (Class 438/4)
  • Patent number: 12127469
    Abstract: A multi-layer device and its method of manufacture are disclosed. The multi-layer device comprises a first electrode layer, a first repair layer, a functional layer, and a second electrode layer. The first repair layer comprises a conductive hydrogel film or conductive hydrogel beads, the conductive hydrogel film or the conductive hydrogel beads comprising conductive filler particles dispersed in a cross-linked polymer. The repair layer protects the multi-layer device from electrical short circuits. A multi-layer device is also disclosed including a light-transmissive electrode layer comprising a porous mesh or porous spheres.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: October 22, 2024
    Assignee: E Ink Corporation
    Inventor: Nishit Murari
  • Patent number: 12087875
    Abstract: A method for manufacturing a photovoltaic (PV) module includes: using a stringer to simultaneously solder at least two cell strings, and soldering an interconnecting bar at a predetermined position; performing electroluminescence (EL) inspection and appearance inspection/photoluminescence (PL) inspection on cells in the at least two cell strings to obtain cell images and cell inspection results; automatically soldering bus bars at heads and tails of the cell strings; placing the cell modules on front plate glass in sequence, and marking a suspicious cell; when a cell that needs to be repaired exists in the cell modules, sending a repair instruction, and delivering the front plate glass of carrying the cell modules to a repair workstation; at a stacking workstation, soldering together bus bars at tails of two adjacent cell modules; and performing EL inspection and appearance inspection/PL inspection.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: September 10, 2024
    Assignees: Jiangsu Coop&Inno Green Energy Technology Co., Ltd., Wuxi Coop&Inno Green Energy Technology Co., Ltd., WUXI DINGSENMAO TECHNOLOGY CO., LTD
    Inventors: Yujun Zhang, Aibing Tao, Jia Shen
  • Patent number: 12080724
    Abstract: A light emitting display device includes a pixel circuit unit, a data distribution unit, a plurality of signal generating units, a unit light emitting diode, and a dummy opening. The pixel circuit unit is configured to generate an output current. The data distribution unit is configured to apply a data voltage to the pixel circuit unit through a data line. The plurality of signal generating units are respectively configured to apply a scan signal and a light emission control signal to the pixel circuit unit through a plurality of signal lines. The unit light emitting diode is configured to receive the output current of the pixel circuit unit and is attached to the pixel circuit unit. The dummy opening is formed in the region where the pixel circuit unit, the data distribution unit, and a plurality of signal generating units are not positioned.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: September 3, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jun Ki Jeong, Hyun Joon Kim, Mee Hye Jung
  • Patent number: 12015035
    Abstract: A method of manufacturing a display device includes forming an uncut electrode on a substrate, at least a portion of the uncut electrode being formed in a non-emission area; disposing a first insulating layer to overlap the uncut electrode; removing at least a portion of the first insulating layer in the non-emission area; cutting the at least a portion of the uncut electrode in the non-emission area; disposing light emitting elements including a first light emitting element in an emission area and a second light emitting element in the non-emission area; and disposing a second insulating layer to overlap the emission area and the non-emission area. The second light emitting element is disposed in the non-emission area where the uncut electrode is not disposed. Also provided is a display device manufactured by the method.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: June 18, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jeong Hyun Lee, Jeong Nyun Kim, Jong Chan Lee, Sung Geun Bae
  • Patent number: 11935463
    Abstract: A light emitting display device includes: a light emitting diode at a display area, and including an anode and a cathode; a pixel circuit at the display area, and to transmit an output current to the anode of the light emitting diode; a repair line extending in a first direction; a repair pixel circuit connected to the repair line; a bridge including one end overlapping with the repair line; and a connecting portion connected to the anode, and including one end overlapping with the bridge. The bridge is not connected to the repair line, the connecting portion, and the anode.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: March 19, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hai-Jung In, Minku Lee, Seunghee Lee
  • Patent number: 11901219
    Abstract: Methods of forming a semiconductor device structure are described. In some embodiments, the method includes forming an interconnect structure over a substrate. The forming the interconnect structure over the semiconductor device structure includes forming a dielectric layer, then performing an annealing process, then forming one or more openings in the dielectric layer, then performing a first ultraviolet (UV) curing process, and then forming conductive features in the one or more openings.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Wen Pan, You-Lan Li, Chung-Chi Ko
  • Patent number: 11854635
    Abstract: Several embodiments of reclaimable semiconductor device packages and assemblies are disclosed herein. A semiconductor device assembly (100) includes a package (101) having a housing (102) and a package contact (104) arranged to receive a signal indicative of a reclamation state. A plurality of modules of semiconductor dies (106) are located within the housing and electrically coupled to the package contact (104). The dies (106) of the first and second modules dies are configured to store a module configuration state. The first and second modules (107a, 107b) are enabled for operation based, at least in part, on the reclamation state and the module configuration state.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: December 26, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Yueping Li
  • Patent number: 11749150
    Abstract: A display device, a compensation system, and a compensation data compression method. The display device includes a display panel including a plurality of subpixels, a compensation module generating compensation data regarding subpixels disposed in a normal area, a fixed pattern area, and a bad pixel area, and a compression module generating compressed compensation data by compressing the compensation data. The compressed compensation data includes compressed compensation data regarding the normal area, compressed compensation data regarding the fixed pattern area, and compressed compensation data regarding the bad pixel area.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: September 5, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Sunwoo Kwun, Seho Lim
  • Patent number: 11730046
    Abstract: A display device comprises a pixel electrode including a first subpixel electrode and a second subpixel electrode arranged to be spaced apart from each other within at least one subpixel of a plurality of subpixels over a substrate, a driving transistor driving the one subpixel, and a connection electrode structure electrically connecting at least one subpixel of the first subpixel electrode and the second subpixel electrode of the pixel electrode with the driving transistor.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: August 15, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Dohyung Kim, Joonsuk Lee, Saemleenuri Lee, Dasom Hong
  • Patent number: 11652010
    Abstract: Implementations of a method for healing a crack in a semiconductor substrate may include identifying a crack in a semiconductor substrate and heating an area of the semiconductor substrate including the crack until the crack is healed.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 16, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Michael J. Seddon
  • Patent number: 11610298
    Abstract: A method for a substrate processing system includes imaging a substrate before start and after completion of a series of processings on the substrate; specifying a first processing apparatus estimated as having a potential abnormality among a plurality of processing apparatuses; performing a first process on a first inspection substrate under a selected processing condition using the first processing apparatus specified in the specifying, and imaging the first inspection substrate before and after the performing the first process to acquire a first imaging result; performing a second process on a second inspection substrate using a second processing apparatus, and imaging the second inspection substrate for comparison before and after the performing the second process to acquire a second imaging result; and determining whether an actual abnormality exists in the first processing apparatus, based on the first imaging result and the second imaging result.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: March 21, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Takuya Mori
  • Patent number: 11594701
    Abstract: An electroluminescent display device comprises a substrate, a first electrode on the substrate, a connection pattern on the substrate and spaced apart from the first electrode, a bank covering edges of the first electrode and the connection pattern, a light-emitting layer on the first electrode, and a second electrode on the light-emitting layer, the bank and the connection pattern, wherein the connection pattern includes at least one protrusion part and a flat part, and wherein each of the first electrode and the connection pattern includes a first layer and a second layer, the second layer is disposed between the substrate and the first layer, and the second layer of the connection pattern has the at least one protrusion part.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: February 28, 2023
    Assignee: LG Display Co., Ltd.
    Inventor: Heume-Il Baek
  • Patent number: 11594586
    Abstract: An organic light emitting display device including a plurality of pixels having a first sub-pixel and a second sub-pixel comprises a base substrate; a first anode disposed on the base substrate in the first sub-pixel; a second anode disposed on the base substrate in the second sub-pixel; an anode connection part connected to the first and second anodes; a driving transistor including a drain electrode that contacts the anode connection part and switching a driving power supplied to the first and second anodes; an organic light emitting layer disposed on the first and second anodes; a cathode disposed on the organic light emitting layer; and a dummy repair part including a plurality of metal layers overlapping each other with an insulating film interposed therebetween in a laser irradiation area, wherein at least one metal layer among the plurality of metal layers contacts the drain electrode and the cathode has an opened shape in the laser irradiation area.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: February 28, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventor: HeeSuk Pang
  • Patent number: 11489029
    Abstract: A transparent display substrate includes a first base and a plurality of sub-pixels disposed on the first base. At least one sub-pixel of the plurality of sub-pixels has a light-emitting region and a transparent region. In the at least one sub-pixel, each sub-pixel includes at least one thin-film transistor, a capacitor and a self-luminescent device that are located in the light-emitting region of the sub-pixel. The self-luminescent device is disposed on a side of the capacitor away from the at least one thin film transistor in a direction perpendicular to the first base. The at least one thin film transistor and the capacitor are electrically connected.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: November 1, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Song, Guoying Wang
  • Patent number: 11476301
    Abstract: A display apparatus, including a substrate, a conductive structure, a pixel unit, a signal line, a transmission line, and a repair structure, is provided. The substrate has a first surface, a second surface, and a through hole. The conductive structure is disposed in the through hole. The pixel unit is disposed on the first surface. The pixel unit includes first, second, third, and fourth connection pads, a driving element, and a light-emitting element. The light-emitting element is electrically connected to the first and second connection pads. The signal line is disposed on the first surface. The driving element is electrically connected to the first and third connection pads through the signal line. The transmission line is disposed on the second surface and electrically connected to the second or fourth connection pad at least through the conductive structure. The repair structure is disposed between the transmission line and the conductive structure.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: October 18, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chan-Jui Liu, Chen-Chi Lin, Chun-Cheng Cheng
  • Patent number: 11456194
    Abstract: A high-dimensional variable selection unit determines a list of critical parameters from sensor data and parametric tool measurements from a semiconductor manufacturing tool, such as a semiconductor inspection tool or other types of semiconductor manufacturing tools. The high-dimensional variable selection model can be, for example, elastic net, forward-stagewise regression, or least angle regression. The list of critical parameters may be used to design a next generation semiconductor manufacturing tool, to bring the semiconductor manufacturing tool back to a normal status, to match a semiconductor manufacturing tool's results with that of another semiconductor manufacturing tool, or to develop a specification for the semiconductor manufacturing tool.
    Type: Grant
    Filed: June 23, 2019
    Date of Patent: September 27, 2022
    Assignee: KLA-TENCOR CORPORATION
    Inventors: Wei Chang, Joseph Gutierrez, Krishna Rao
  • Patent number: 11443095
    Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
  • Patent number: 11444132
    Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor, a third transistor, and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: September 13, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Zhongyuan Wu, Yongqian Li, Can Yuan, Zhidong Yuan, Meng Li, Dacheng Zhang, Lang Liu
  • Patent number: 11370961
    Abstract: An inhibited mud acid composition, said composition comprising: hydrofluoric acid in solution; an alkanolamine; and a mineral acid selected from a group consisting of: HCl; MEA-HCl and other modified acids, wherein said alkanolamine and hydrofluoric acid are present in a molar ratio of at least 1:1.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: June 28, 2022
    Assignee: Fluid Energy Group Ltd.
    Inventors: Clay Purdy, Markus Weissenberger, Karl W. Dawson, Kyle G. Wynnyk
  • Patent number: 11362166
    Abstract: A display device includes a substrate including a pixel region and a peripheral region. A plurality of pixels is disposed in the pixel region of the substrate. Each of the plurality of pixels includes a light emitting element. Data lines and scan lines are connected to each of the plurality of pixels. A power line is configured to supply power to the plurality of pixels. The power line includes a plurality of first conductive lines and a plurality of second conductive lines intersecting the plurality of first conductive lines. The plurality of second conductive lines is arranged in a region between adjacent light emitting elements of the plurality of pixels. At least some of the plurality of second conductive lines extend in a direction oblique to a direction of extension of the data lines or the scan lines.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: June 14, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yang Wan Kim, Byung Sun Kim, Jae Yong Lee, Chung Yi, Hyung Jun Park, Su Jin Lee
  • Patent number: 11218139
    Abstract: Ring packet built-in self-test (PBIST) circuitry configured to detect errors in wires connecting a ring of superconducting chips includes circuitry configured to make the PBIST immune to interchip latency and still allow the PBIST to test a stop-to-stop connection. By making a PBIST independent of latency, an entire ring can be characterized for latency and for its bit-error rate prior to running any functional test. Such systems and associated methods can be scaled to larger platforms having any number of ring stops. The PBIST circuitry can function as either transmitter or receiver, or both, to test an entire ring. The PBIST can also be used to tune clocks in the ring to achieve the lowest overall bit error rate (BER) in the ring.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: January 4, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Clint Wayne Mumford, Kshitiz Saxena, Miguel Comparan, Adam Muff, Oscar Rosell
  • Patent number: 11211535
    Abstract: A method for fabricating a micro light-emitting diode display is provided. The method includes disposing a plurality of micro light-emitting diodes on a carrier; transferring the micro light-emitting diodes from the carrier to a display substrate and disposing the micro light-emitting diodes in a plurality of pixels of the display substrate; subjecting the micro light-emitting diodes to a pre-bonding process to electrically connect the micro light-emitting diodes to the display substrate; subjecting the micro light-emitting diodes pre-bonded to the display substrate to a first detection process, thereby identifying whether a faulty micro light-emitting diode is present or not; and, subjecting the micro light-emitting diodes to the main bonding process after the first detection process.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: December 28, 2021
    Assignee: PLAYNITRIDE DISPLAY CO., LTD.
    Inventors: Yi-Ching Chen, Pei-Hsin Chen, Yi-Chun Shih, Tzu-Yang Lin, Yu-Hung Lai
  • Patent number: 11177110
    Abstract: A microscopy system includes a gas cluster beam system configured for generating a beam of gas clusters directed toward a sample to irradiate a sample and mill away successive surface layers from the sample, a scanning electron microscope system configured for irradiating the successive surface layers of the sample with an electron beam and for imaging the successive surface layers of the sample in response to the irradiation of the surface layer, and a processor configured for generating a three dimensional image of the sample based on the imaging of the successive layers of the sample.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: November 16, 2021
    Assignee: Howard Hughes Medical Institute
    Inventors: Kenneth J. Hayworth, Harald F. Hess, C. Shan Xu, David Peale
  • Patent number: 10991571
    Abstract: Atomic layer deposition (ALD) process formation of silicon oxide with temperature>500° C. is disclosed.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: April 27, 2021
    Assignee: Versum Materials US, LLC
    Inventors: Haripin Chandra, Meiliang Wang, Manchao Xiao, Xinjian Lei, Ronald Martin Pearlstein, Mark Leonard O'Neill
  • Patent number: 10930508
    Abstract: Disclosed are methods of forming devices. One method may include providing a first set of fins and a second set of fins extending from a substrate, and providing a dummy oxide over the first set of fins and the second set of fins. The method may further include performing a thermal implant to the second set of fins, wherein the thermal implant is an angled ion implant impacting the dummy oxide. The method may further include removing the dummy oxide from the first set of fins and the second set of fins, and forming a first work function (WF) metal over the first set of fins and a second WF metal over the second set of fins.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: February 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Qintao Zhang, Kyu-Ha Shim
  • Patent number: 10930201
    Abstract: Methods and systems for testing a display having an array of microdrivers arranged in multiple of rows and columns including setting a testing mode of a microdriver of the array of microdrivers using multiple pins of the microdriver that are used in scanning or operation modes of the microdriver. The microdriver is configured to light one or more connected micro light emitting diode pixels coupled to the microdriver during the testing mode. Testing also includes operating the microdriver in the testing mode and determining functionality of the one or more connected micro light emitting diode pixels or the microdriver based on the testing mode.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: February 23, 2021
    Assignee: Apple Inc.
    Inventors: Mahdi Farrokh Baroughi, Bo Yang, Xiang Lu, Hopil Bae
  • Patent number: 10867875
    Abstract: A pixel structure includes a substrate, an active device layer, a first insulating layer disposed on the active device layer, a first light emitting element and a second light emitting element disposed on the first insulating layer, a plurality of first signal lines disposed on the first insulating layer, and a plurality of second signal lines. The first signal lines are electrically connected to the active device layer, and the first signal lines are electrically insulated from the first light emitting element. The second signal lines are electrically connected to the first signal lines and the second light emitting element. The second light emitting element overlaps with a portion of the first light emitting element in a first direction. Electrodes of the first light emitting element and electrodes of the second light emitting element are disposed facing the first direction. A repairing method of the pixel structure is also provided.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 15, 2020
    Assignee: Au Optronics Corporation
    Inventor: Ze-Yu Yen
  • Patent number: 10847624
    Abstract: Methods and apparatus to form GaN-based transistors during back-end-of-line processing are disclosed. An example integrated circuit includes a first transistor formed on a first semiconductor substrate. The example integrated circuit includes a dielectric material formed on the first semiconductor substrate. The dielectric material extends over the first transistor. The example integrated circuit further includes a second semiconductor substrate formed on the dielectric material. The example integrated circuit also includes a second transistor formed on the second semiconductor substrate.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Marko Radosavljevic, Sansaptak Dasgupta, Han Wui Then
  • Patent number: 10847324
    Abstract: The present invention relates to a method which can effectively remove perovskite light absorbers, hole transport layers, metal electrodes, and the like by immersing a waste perovskite-based photoelectric conversion element module in a cleaning solution under predetermined conditions. The present invention can recover a substrate from the waste module and manufacture a photoelectric conversion element having a photoelectric conversion efficiency level comparable to the initially high level again, using the same.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: November 24, 2020
    Assignees: GLOBAL FRONTIER CENTER FOR MULTISCALE ENERGY, RESEARCH & BUSINESS FOUNDATION SUNGYUNKWAN
    Inventors: Hyun Suk Jung, Byeong Jo Kim, Dong Hoe Kim, Seung Lee Kwon, Dong Geon Lee, Young Un Jin, So Yeon Park
  • Patent number: 10692744
    Abstract: In one embodiment, a vaporizer is connected to a chamber of a substrate processing apparatus through a gas supply line and a gas introduction port. An exhaust device is connected to the gas supply line. The substrate processing apparatus includes a pressure sensor that obtains a measurement value of a pressure of the gas supply line. A method according to the embodiment includes supplying a processing gas to the chamber from the vaporizer through the gas supply line, and monitoring a change of the measurement value obtained by the pressure sensor in a state in which supply of the processing gas to the gas supply line is stopped.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: June 23, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Risako Miyoshi
  • Patent number: 10573538
    Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The the at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Bing Dang, Jeffrey Donald Gelorme, Li-Wen Hung, John U. Knickerbocker, Cornelia Tsang Yang
  • Patent number: 10325785
    Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Bing Dang, Jeffrey Donald Gelorme, Li-Wen Hung, John U. Knickerbocker, Cornelia Tsang Yang
  • Patent number: 10224219
    Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Bing Dang, Jeffrey Donald Gelorme, Li-Wen Hung, John U. Knickerbocker, Cornelia Tsang Yang
  • Patent number: 10112305
    Abstract: A failure diagnosis device for a mechanical device provided with a motor as a source to drive a motion axis, and configured to acquire a moving position of the motion axis and a disturbance torque value applied to the motion axis every predetermined period, and to diagnose that a failure is occurring when the disturbance torque value is larger than a failure determination threshold, includes a maintenance effect determination unit configured to calculate a change in the disturbance torque value before and after conducting of a maintenance task when the maintenance task is conducted on the motion axis, and a failure diagnosis unit configured to re-set the failure determination threshold only when the change in the disturbance torque value is larger than a predetermined threshold.
    Type: Grant
    Filed: May 25, 2015
    Date of Patent: October 30, 2018
    Assignee: NISSAN MOTOR CO., LTD.
    Inventor: Masaki Kuno
  • Patent number: 10103284
    Abstract: Apparatus for the industrial production of photovoltaic concentrator modules, consisting of a module frame, a lens disc, a sensor carrier disc and an electrical line routing arrangement, comprising the following features: a) a mount for the stress-free mounting of a module frame by means of clamping elements on both longitudinal sides and stop elements on both transverse sides, wherein the setting of the clamping elements takes place by means of the displacement and rotation of a switching rod, b) a device for a punctiform application of acrylic and a linear application of silicone onto the bearing surfaces of the module frame, c) a respective device for placing the sensor carrier disc or the lens disc, wherein these discs are transported in a stress-free fashion by means of special suction apparatuses and are emplaced with a centrally starting, predetermined contact pressure, d) a device for measuring the respective disc position and for positioning a sensor carrier disc or a lens disc, e) a device for the f
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: October 16, 2018
    Assignee: Saint-Augustin Canada Electric Inc.
    Inventors: Gerrit Lange, Karl Friedrich Haarburger, Eckart Gerster
  • Patent number: 10049886
    Abstract: A method embodiment for forming a semiconductor device includes providing a dielectric layer having a damaged surface and repairing the damaged surface of the dielectric layer. Repairing the damaged surface includes exposing the damaged surface of the dielectric layer to a precursor chemical, activating the precursor chemical using light energy, and filtering out a spectrum of the light energy while activating the precursor chemical.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hung Lin, Sheng-Shin Lin, Ying-Chieh Hung, Yu-Ting Huang, Tze-Liang Lee
  • Patent number: 10005991
    Abstract: The present disclosure relates to a method for removing a hard mask consisting essentially of TiN, TaN, TiNxOy, TiW, W, Ti and alloys of Ti and W from a semiconductor substrate. The method comprising contacting the semiconductor substrate with a removal composition. The removal composition comprises 0.1 wt % to 90 wt % of an oxidizing agent; 0.0001 wt % to 50 wt % of a carboxylate; and the balance up to 100 wt % of the removal composition comprising deionized water.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: June 26, 2018
    Assignees: EKC TECHNOLOGY INC, E I DU PONT DE NEMOURS AND COMPANY
    Inventor: Hua Cui
  • Patent number: 9935236
    Abstract: An optoelectronic light emission device is provided that includes a gain region of at least one type III-V semiconductor layer that is present on a lattice mismatched semiconductor substrate. The gain region of the type III-V semiconductor layer has a nanoscale area using nano-cavities. The optoelectronic light emission device is free of defects.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Effendi Leobandung, Ning Li, Tak H. Ning, Jean-Oliver Plouchart, Devendra K. Sadana
  • Patent number: 9876060
    Abstract: A bank repair method in a manufacturing process of an organic EL display device including first and second banks forming a matrix over a substrate. When a defect portion of a first bank is detected, in each of adjacent concave spaces between which the first bank having the defect portion is located, a candidate forming position is set and a dam portion partitioning the concave space into a first space in a vicinity of the defect portion and a second space outside the vicinity of the defect portion is formed. When denoting sub-pixel region surface area as H and denoting a surface area of a region of a candidate first space overlapping with a sub-pixel region as I, the dam portion is formed at the candidate forming position according to a first forming method when I<?×H is fulfilled, where 0.05<?<0.9.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: January 23, 2018
    Assignees: JOLED INC., JAPAN DISPLAY INC.
    Inventor: Toshiaki Onimaru
  • Patent number: 9818809
    Abstract: An examination is performed of whether or not a bank having a defect portion is present. When a bank having a defect portion is present, the bank having the defect portion is repaired by forming a dam in each of adjacent concave spaces between which the bank having the defect portion is located. A dam formed in a concave space partitions the concave space into a first space in a vicinity of the defect portion and a second space outside the vicinity of the defect portion. The dam, at a portion thereof with lowest height, satisfies (h/H)+0.1W?1.5, 0.5?(h/H)?2.0, and 5?W?50, where a ratio of the height h of the dam to a height H of the banks is denoted as h/H, and a width of the dam is denoted as W ?m.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: November 14, 2017
    Assignee: JOLED INC.
    Inventors: Kazuhiro Kobayashi, Toshiaki Onimaru, Yoshiki Hayashida, Takayuki Shimamura
  • Patent number: 9691143
    Abstract: A first output value evaluation device obtains an average value of output values of optical image data for each of unit regions and creates a distribution map of an average value in an inspected region. A first defect history management device creates a distribution map related with the shape of the pattern from the distribution map of the average value and holds the created distribution map. A second output value evaluation device obtains at least one of a variation value and deviation of the output value of each pixel in the unit region. A defect determination device compares the obtained value with a threshold value. A second defect history management device holds information of the output value determined as a defect in the defect determination device. A defect/defect history analysis device analyzes, and checks the information from the first defect history management device and the second defect history management device.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: June 27, 2017
    Assignee: NUFLARE TECHNOLOGY, INC.
    Inventors: Hiromu Inoue, Nobutaka Kikuiri
  • Patent number: 9634189
    Abstract: A patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers, is provided. The patterned surface can include a set of substantially flat top surfaces and a plurality of openings. Each substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the openings can have a characteristic size between approximately 0.1 micron and five microns. One or more of the substantially flat top surfaces can be patterned based on target radiation.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: April 25, 2017
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Rakesh Jain, Jinwei Yang, Michael Shur, Remigijus Gaska
  • Patent number: 9634087
    Abstract: A method is provided for fabricating a FinFET. The method includes providing a semiconductor substrate; forming a hard mask layer on the semiconductor substrate, wherein a position of the hard mask layer may corresponds to a position of subsequently formed fin; forming a doping region in the semiconductor substrate by using the hard mask layer as a mask to perform an anti-punch-through ion implantation process; forming an anti-punch-through region by performing an annealing process onto the doping region, such that impurity ions in the doping region diffuse into the semiconductor substrate under the hard mask layer; and forming a trench by using the hard mask layer as a mask to etch the semiconductor substrate and the doping region, wherein the semiconductor substrates between the adjacent trenches constitutes a fin.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: April 25, 2017
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Xinyun Xie
  • Patent number: 9406615
    Abstract: Techniques are disclosed for forming interconnects in porous dielectric materials. In accordance with some embodiments, the porosity of a host dielectric layer may be reduced temporarily by stuffing its pores with a sacrificial pore-stuffing material, such as titanium nitride (TiN), titanium dioxide (TiO2), or other suitable sacrificial material having a high etch selectivity compared to the metallization and dielectric material of the interconnect. After interconnect formation within the stuffed dielectric layer, the sacrificial pore-stuffing material can be removed from the pores of the host dielectric. In some cases, removal and curing can be performed with minimal or otherwise negligible effect on the dielectric constant (?-value), leakage performance, and/or time-dependent dielectric breakdown (TDDB) properties of the host dielectric layer.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: August 2, 2016
    Assignee: INTEL CORPORATION
    Inventors: Christopher J. Jezewski, David J. Michalak, Kanwal Jit Singh, Alan M. Myers
  • Patent number: 9337378
    Abstract: A system and method for applying an electrical bias to a photovoltaic device in a temperature control chamber, in which the temperature of the photovoltaic device is controlled according to a temperature profile. The temperature profile may include at least one hot phase and at least one cool phase.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: May 10, 2016
    Assignee: First Solar, Inc.
    Inventors: Scott Edmonson, Yacov Elgar, Dhruv Gajaria, Weston Gerwin, Scott Jacoby, Imran Khan, Anthony Maher, Stephen P. Murphy, Gregory A. Ritz
  • Patent number: 9330900
    Abstract: Embodiments of the present invention generally relate to methods of forming carbon-doped oxide films. The methods generally include generating hydroxyl groups on a surface of the substrate using a plasma, and then performing silylation on the surface of the substrate. The hydroxyl groups on the surface of the substrate are then regenerated using a plasma in order to perform an additional silylation. Multiple plasma treatments and silylations may be performed to deposit a layer having a desired thickness.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: May 3, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Kelvin Chan
  • Patent number: 9324560
    Abstract: A patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers, is provided. The patterned surface can include a set of substantially flat top surfaces and a plurality of openings. Each substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the openings can have a characteristic size between approximately 0.1 micron and five microns. One or more of the substantially flat top surfaces can be patterned based on target radiation.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: April 26, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Rakesh Jain, Jinwei Yang, Michael Shur, Remigijus Gaska
  • Patent number: 9290391
    Abstract: A silicon component in a processing chamber for performing an etching process on a substrate is provided. The silicon component contains recycled silicon obtained by a silicon component recycling method including: collecting silicon wastes from any one of a silicon component for a plasma etching apparatus and a silicon ingot for a semiconductor wafer; obtaining a content of impurity based on an electric characteristic of the collected silicon wastes; determining an input amount of the silicon wastes, an input amount of a silicon source material, and an input amount of impurity based on the content of impurity obtained in the measurement process and a target value of an electric characteristic of a final product; manufacturing a silicon ingot by inputting the silicon wastes, the silicon source material, and the impurity into a crucible; and manufacturing the final product using the silicon ingot.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: March 22, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Kosuke Imafuku
  • Patent number: 9136108
    Abstract: A method for restoring a porous surface of a dielectric layer formed on a substrate, includes: (i) providing in a reaction space a substrate on which a dielectric layer having a porous surface with terminal hydroxyl groups is formed as an outer layer; (ii) supplying gas of a Si—N compound containing a Si—N bond to the reaction space to chemisorb the Si—N compound onto the surface with the terminal hydroxyl groups; (iii) irradiating the Si—N compound-chemisorbed surface with a pulse of UV light in an oxidizing atmosphere to oxidize the surface and provide terminal hydroxyl groups to the surface; and (iv) repeating steps (ii) through (iii) to form a film on the porous surface of the dielectric layer for restoration.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: September 15, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Kiyohiro Matsushita, Hirofumi Arai
  • Patent number: 9050623
    Abstract: Porous ULK film is cured with UV radiation at progressively shorter wavelengths to obtain ULK films quickly at a desired dielectric constant with improved mechanical properties. At longer wavelengths above about 220 nm or about 240 nm, porogen is removed while minimizing silicon-carbon bond formation. At shorter wavelengths, mechanical properties are improved while dielectric constant increases.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: June 9, 2015
    Assignee: Novellus Systems, Inc.
    Inventor: Bhadri N. Varadarajan