Abstract: A method and system for repairing photomasks is disclosed. A scanning electron microscope (SEM) is used to identify, measure, and correct defects. The SEM is operated in multiple modes, including a measuring mode and a repair mode. The repair mode is of higher landing energy and exposure time than the measuring mode, and induces shrinkage in the photoresist to correct various features, such as vias that are too small.

Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

Abstract: The present invention relates to a method for producing zinc oxide on gallium nitride and application thereof, and particularly relates to a method for producing zinc oxide on gallium nitride by hydrothermal method and a method for recycling substrates by the zinc oxide.

Abstract: A method and apparatus for repairing transistors comprises applying a first voltage to a source, a second voltage to the gate and a third voltage to the drain for a predetermined time In this manner the semiconductor structure may be repaired or returned to the at or near the original operating characteristics.

Abstract: A method for fabricating a semiconductor device includes a first step of forming, on a first substrate, a first element region in which a plurality of elements are collectively arranged, a second step of relocating the plurality of elements formed on the first substrate to a holding member in the same arrangement as in the first element region to have the plurality of elements held on the holding member, a third step of rearranging the plurality of elements held on the holding member and having the plurality of elements held on an intermediate substrate, thereby forming a second element region having a shape different from a shape of the first element region on the intermediate substrate, and a fourth step of dispersing the plurality of elements held on the intermediate substrate and adhering the plurality of elements to a second substrate.

Abstract: In a light-emitting element provided with a thick layer of a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a portion which a conductive foreign substance enters between the pair of electrodes emits stronger light at a voltage lower than a voltage required when a normal portion starts emitting light. In a light-emitting element provided with a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a voltage may be applied thereto in the forward direction. Then, an abnormal light-emission portion may be detected because the portion emits light at a luminance of 1 (cd/m2) or higher when the applied voltage is lower than a voltage required when a normal portion starts emitting light. The portion may be irradiated with laser light so as to be insulated.

Abstract: Disclosed herein is a method of forming electronic device having thin-film components by using trenches. One or more of thin-film components is formed by depositing a thin-film in the trench followed by processing the deposited thin-film to have the desired thickness.

Abstract: The present invention discloses an array substrate, a liquid crystal display (LCD) device and methods for manufacturing and repairing the array substrate. Said array substrate for thin film transistor (TFT) LCD comprises one or more pixel electrodes, gate lines and data lines; the crossover of said gate line and said data line is formed with a parasitic capacitor; said data line is also provided with slit part; and said slit part is overlapped with the gate line to form a protective capacitor which is in parallel connection with said parasitic capacitor and of which the voltage resistance is less than said parasitic capacitor. Because the data line is provided with the slit part which overlaps the gate line to form the protective capacitor which is in parallel connection with the parasitic capacitor and of which the voltage resistance is less than that of the protective capacitor, and because the data line is positioned on the top layer, the late stage repair of the present invention becomes easier.

Abstract: A method is provided for laser patterning an integrated circuit (IC) etching mask. The method provides an IC packaged die with a first region underlying a backside surface of a bulk silicon (Si) layer. An etch-resistant film is formed overlying the backside surface. Alternately, the entire IC die package is conformally coated. A semi-transparent film is formed overlying the etch-resistant film, semi-transparent to light having a first wavelength. In response to irradiating the semi-transparent film with light having a first power density, an IC die first region is located. In response to irradiating the semi-transparent film with a laser light having a second power density, greater than the first power density, an area of etch-resistant film overlying the first region is decomposed. More explicitly, an area of semi-transparent film overlying the first region is ablated, and the etch-resistant film underlying the ablated semi-transparent film is heated.

Abstract: An electroluminescent organic semiconductor element includes a substrate and a first electrode arranged on the substrate. The semiconductor element additionally contains a second electrode and at least one organic layer, which is arranged between the first electrode and the second electrode. The organic layer is a layer that generates light by recombination of charge carriers. At least one of the first and the second electrode contains a highly conductive organic sublayer.

Abstract: Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.

Abstract: One object is to provide a method for manufacturing a display device in which shift of the threshold voltage of a thin film transistor including an oxide semiconductor layer can be suppressed even when ultraviolet light irradiation is performed in the process for manufacturing the display device. In the method for manufacturing a display device, ultraviolet light irradiation is performed at least once, a thin film transistor including an oxide semiconductor layer is used for a switching element, and heat treatment for repairing damage to the oxide semiconductor layer caused by the ultraviolet light irradiation is performed after all the steps of ultraviolet light irradiation are completed.

Abstract: A repair method for repairing an active device array substrate is provided. The active device array substrate includes a substrate, scan lines, data lines, active devices, pixel electrodes, and common lines. At least one of the scan line has an open defect. The scan lines and the data lines are intersected to define sub-pixel regions. The active devices are electrically connected with the scan lines and the data lines correspondingly. Each pixel electrode is disposed in one of the sub-pixel regions and electrically connected with one of the active devices. The repair method includes cutting one of the common lines neighboring to the open defect to form a cutting block that is electrically insulated from the common lines; and welding the cutting block, the scan line having the open defect and two active devices located at two opposite sides of the open defect.

Abstract: In a disclosed good chip classifying method capable of classifying the good chips on a wafer, defective chips are divided into defective groups so that the defective chips contiguous to each other are placed into the same defective group based on the wafer test results; the defective group is judged as a defective chip concentrated distribution area when the number of the defective chips exceeds the prescribed value; a defective chip concentrated distribution nearby area including all the defective chips in the defective chip concentrated distribution area and nearby good chips is formed; and the good chips in the defective chip concentrated distribution nearby area are classified to have a chip index based on four directions (X and Y axis directions) on which the defective chips in the defective chip concentrated distribution area are disposed.

Abstract: The invention relates to a process for manufacturing a semiconductor structure comprising a functionalized layer on a support substrate, comprising the following steps: (a) implanting ionic species in a source substrate comprising the said functionalized layer and a sacrificial buffer layer located under the functionalized layer relative to the direction of implantation, to a depth delimiting the thickness of an upper part of the source substrate comprising the functionalized layer and at least part of the buffer layer; (b) bonding the source substrate to the support substrate; (c) fracturing the source substrate and transferring the upper part of the source substrate to the support substrate; (d) removing the buffer layer by selective etching with respect to the functionalized layer.

Abstract: A TFT array substrate includes a pixel region and a wiring region disposed outside the pixel region. The wiring region has a wiring layer including scan or data wirings. A repair wiring layer including repair wiring is disposed insulatedly below or above the wiring layer. A scan or data wiring has a first intersection and a second intersection with a repair wiring section of the repair wiring. When the scan or data wiring is broken, a repair wiring section is cut off the repair wiring by a first cut-off point and a second cut-off point, and the broken scan or data wiring is electrically connected to the repair wiring section through soldering the first intersection and the second intersection. Thus, products that would otherwise be rejected in the manufacturing process of LCD panels can be repaired, which decreases the reject ratio, increases the yield and saves the production cost.

Abstract: An interposer substrate includes an array of interconnects in the interposer substrate, the array of connectors arranged in accordance with an array of interconnects for a processor on a circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one connector in the array of interconnects, the conductive trace arranged parallel to the interposer substrate such that no electrical connection exists between the connector in the interposer substrate and a corresponding one of the interconnects for the processor on the circuit substrate, and at least one peripheral circuit residing on the interposer substrate in electrical connection with the conductive trace.

Abstract: A method for manufacturing a semiconductor device comprises: forming a recess in a substrate; implanting at the bottom of the recess to form an amorphous layer to a predetermined depth under the bottom of the recess; carrying out crystal orientation selective wet etching to form a Sigma shaped recess by use of the amorphous layer as a stopping layer. Through forming an amorphous layer by means of implantation which is used as a stopping layer in a subsequent wet etching, a Sigma shaped recess with a cuspate bottom is avoided, and a Sigma shaped recess having a planar bottom is obtained, which may further improve semiconductor device performance.

Abstract: A method for manufacturing a thin film photoelectric conversion module comprising the steps of: (A) forming a plurality of divided strings by dividing a string, in which thin film photoelectric conversion elements provided by sequentially laminating a first electrode layer, a photoelectric conversion layer and a second electrode layer on the surface of an insulating substrate are electrically connected in series, into a plurality of strings by dividing grooves, electrically insulating and separating the first electrode layer and the second electrode layer one from the other and extending in a serial connection direction; and (B) performing reverse biasing by applying a reverse bias voltage to each of thin film photoelectric conversion elements of the divided string.

Abstract: A stacked structure of chips including a first chip and a second chip is provided. The first chip includes a first and a second circuit blocks, a signal path, a first and a second hardwired switches. The second chip stacks with the first chip stack and includes a third circuit block, a third and a fourth hardwired switches. If the first circuit block is defective and the second and the third circuit blocks are functional, the first hardwired switch and the third hardwired switch are set correspondingly such that a power-supply bonding pad is connected to the third power terminal and disconnected to the first power terminal, and the second hardwired switch and the fourth hardwired switch are set correspondingly such that the third signal terminal is electrically connected to the signal path to make the third circuit block replace the first circuit block and provide the first function.

Abstract: A capacitor unit in a display device includes: a capacitor element having a first capacitor electrode connected to a power line and provided in a GM electrode layer and a second capacitor electrode connected to a line and provided in an SD electrode layer; a backup capacitor element having a first backup capacitor electrode provided in the GM electrode layer and a second backup capacitor electrode connected to the power line and provided in the SD electrode layer; a disconnect-able portion at which a connection between the second capacitor electrode and the line can be disconnected; and a connectable portion at which the first backup capacitor electrode and the line can be connected, and the disconnect-able portion and the connectable portion are arranged at a position in which the disconnect-able portion and the connectable portion overlap in a stacking direction.

Abstract: A display device capable of suppressing decrease in capacitance and capable of reducing area even when a capacitor unit is repaired is provided. A capacitor unit in a display device includes: a capacitor element having a first capacitor electrode connected to a power line and provided in an SD electrode layer and a second capacitor electrode provided in a GM electrode layer; a backup capacitor electrode provided in the TM electrode layer; a disconnect-able portion at which a connection between the first capacitor electrode and the power line can be disconnected; and a connectable portion at which the backup capacitor electrode and the power line can be connected, and the disconnect-able portion and the connectable portion overlap in a stacking direction.

Abstract: A semiconductor device includes a substrate, an insulator layer on the substrate, an inductor on the insulator layer, and a film including a ferromagnetic particle on the inductor.

Abstract: Methods for repairing low-k dielectrics using a plasma immersion carbon doping process are provided herein. In some embodiments, a method of repairing a low-k dielectric material disposed on a substrate having one or more features disposed through the low-k dielectric material may include depositing a conformal oxide layer on the low-k dielectric material and within the one or more features; and doping the conformal oxide layer with carbon using a plasma doping process.

Abstract: A non-abrading method to facilitate bonding of semiconductor components, such as silicon wafers, that have micro structural defects in a bonding interface surface. In a preferred method, micro structural defects are removed by forming an oxide layer on the bonding interface surface to a depth below the level of the defect, and then removing the oxide layer to expose a satisfactory surface for bonding, thereby increasing line yield and reducing scrap triggers in fabrication facilities.

Abstract: A method for decapsulating an integrated circuit package without the need of using a mask during the decapsulation process is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided. The caustic solution is capable of etching the molding compound and intermittently contacts a pre-selected area of the molding compound to etch the molding compound. As a consequence, the caustic solution removes the molding compound in the pre-selected area so the circuit element in the package is substantially exposed.

Abstract: A method for decapsulating an integrated circuit package in the absence of a mask is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided and drained. The caustic solution is capable of etching the molding compound while in continuous contact with the molding compound to etch the molding compound. As a consequence, the molding compound is removed so that the circuit element in the package is substantially exposed.

Abstract: A method for repairing a semiconductor structure having a current-leakage issue includes finding a semiconductor structure having a current-leakage issue through application of a test voltage from an electric test device and applying an electric power stress to the semiconductor structure to melt a stringer or a bridge between two conductive elements or to allow the stringer or the bridge to be oxidized.

Abstract: A laser mold removing method of the invention is for processing a composite material composed of a plurality of materials having different reflectances to a laser beam, and includes emitting laser beam in which a processing laser beam for processing the processing object and a measurement laser beam adapted to irradiate the processing object and having an output smaller than that of the processing laser beam are emitted, measuring a reflected light quantity of the measurement laser beam reflected by the processing object, and controlling based on the reflected light quantity.

Abstract: An embodiment of the disclosed provides a TFT-LCD array substrate is provided, comprising a base substrate; a first transparent conductive film, a gate layer, a gate insulating layer, a semiconductor layer, and a source/drain electrode layer sequentially formed on the base substrate from the bottom up, wherein for each pixel unit of the array substrate the first transparent conductive film comprises at least a first part and a second part that do not contact with each other, and the first part is located under an area of the data line, without contacting the gate line and the common electrode line. When a data line in the array substrate has an open failure, this part of the transparent conductive film can be welded together with the data line using laser welding so as to repaire the data line.

Abstract: A semiconductor memory device includes at least one first semiconductor chip including a plurality of memory cells and a second semiconductor chip including a fuse circuit configured to repair defective cells among the memory cells of the at least one first semiconductor chip.

Abstract: Methods for the repair of damaged low k films are provided. Damage to the low k films occurs during processing of the film such as during etching, ashing, and planarization. The processing of the low k film causes water to store in the pores of the film and further causes hydrophilic compounds to form in the low k film structure. Repair processes incorporating ultraviolet (UV) radiation and silylation compounds remove the water from the pores and further remove the hydrophilic compounds from the low k film structure.

Abstract: A method of manufacturing an organic electroluminescence device includes: preparing an organic EL device in which an anode, an organic layer including a luminescent layer, and a cathode formed of a transparent material are stacked in order and which has a shorted defective portion; irradiating the organic EL device with a laser beam from a direction of the cathode; measuring an intensity of radiated light from the organic EL device after the laser beam is absorbed through multiphoton absorption; changing a focal position of the laser beam in a stacking direction for performing the irradiating and measuring, and subsequently determining the focal position of the laser beam in the stacking direction such that the intensity of the radiated light is minimal; and irradiating the determined focal position with the laser beam, so as to solve a defect caused by the shorted defective portion.

Abstract: A process for recycling a support substrate of a material substantially transparent to at least a wavelength of electromagnetic radiation. The process includes providing an initial substrate; forming an intermediate layer on a bonding face of the support substrate having an initial roughness, with the intermediate layer being of a material substantially transparent to at least a wavelength of electromagnetic radiation; forming an electromagnetic radiation absorbing layer either on the bonding face of the initial substrate or on the intermediate layer; bonding the initial substrate to the support substrate via the electromagnetic radiation absorbing layer; and irradiating the electromagnetic radiation absorbing layer through the support substrate and the intermediate layer to induce separation of the support substrate from the initial substrate.

Abstract: Provided is an organic EL display manufacturing method which has: a step wherein an organic EL panel having a substrate and organic EL elements arranged in matrix on the substrate is prepared, and each organic EL element is permitted to have a pixel electrode disposed on the substrate, an organic layer disposed on the pixel electrode, a transparent counter electrode disposed on the organic layer, a sealing layer disposed on the transparent counter electrode, and a color filter disposed on the sealing layer; a step of detecting a defective portion on the organic layer in the organic EL element; and a step of breaking the transparent counter electrode in a region on the defective portion of the transparent counter electrode by irradiating the region on the defective portion with a laser beam. The laser beam is radiated by being tilted with respect to the normal line on the display surface of the organic EL panel.

Abstract: An EL light-emitting element in which a lower electrode layer, an EL layer, and an upper electrode layer are stacked is formed on a substrate, and a wiring is formed on a counter substrate. Further, the substrate and the counter substrate are bonded so that the wiring is in physical contact with the upper electrode layer of the EL element. Accordingly, the wiring can serve as an auxiliary wiring for increasing conductivity of the upper electrode layer. With such an auxiliary wiring, a potential drop due to the resistance of the upper electrode layer can be suppressed even in the light-emitting device whose light-emitting portion is large.

Abstract: Disclosed herein is a method of forming electronic device having thin-film components by using trenches. One or more of thin-film components is formed by depositing a thin-film in the trench followed by processing the deposited thin-film to have the desired thickness.

Abstract: A semiconductor device includes: a substrate made of silicon carbide and having a main surface having an off angle of not less than ?° and not more than +5° relative to a (0-33-8) plane in a <01-10> direction; a p type layer made of silicon carbide and formed on the main surface of the substrate by means of epitaxial growth; and an oxide film formed in contact with a surface of the p type layer. A maximum value of nitrogen atom concentration is 1×1021 cm?3 or greater in a region within 10 nm from an interface between the p type layer and the oxide film.

Abstract: A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer.

Abstract: The present disclosure provides a defect correcting apparatus including a defect detecting device configured to detect a defect within a repetitive pattern in a multilayer substrate a defect correcting device configured to correct the defect in the multilayer substrate by a specified defect correcting method, and a control device configured to, when the defect detected by the defect detecting device is detected overlapping a region in which occurrence of an interlayer short-circuit defect is assumed, generate an object corresponding to the defect correcting method for the interlayer short-circuit defect, and controlling the defect correcting device for correcting the defect using the generated object.

Abstract: Provided is a three-dimensional semiconductor device. The three-dimensional semiconductor device includes a body in which a plurality of semiconductor chips or packages are stacked, a protective substrate configured to protect an outer layer chip or package of the body and configured to transmit a laser beam, and a fuse pattern portion having a pattern of a fuse function formed to cut off an electrical connection of a defective chip or package by the laser beam penetrating the protective substrate when at least one of the chips or packages is defective.

Abstract: A sample with at least a first structure and a second structure is measured and a first model and a second model of the sample are generated. The first model models the first structure as an independent variable and models the second structure. The second model of the sample models the second structure as an independent variable. The measurement, the first model and the second model together to determine at least one desired parameter of the sample. For example, the first structure may be on a first layer and the second structure may be on a second layer that is under the first layer, and the processing of the sample may at least partially remove the first layer, wherein the second model models the first layer as having a thickness of zero.

Abstract: Such a device is disclosed that includes: redundancy circuits for replacing defective memory cells included in a memory cell array; an electrical fuse circuit that stores addresses of the defective memory cells; a data determination circuit that generates a determination signal by determining whether test data read from the memory cell array is correct or incorrect; and an analysis circuit that supplies, in a first operation mode, the electrical fuse circuit with an address signal supplied when the determination signal is activated, and supplies, in a second operation mode, the electrical fuse circuit with an address signal supplied when a data mask signal supplied from outside is activated irrespective of the determination signal.

Abstract: A method and system for repairing photomasks is disclosed. A scanning electron microscope (SEM) is used to identify, measure, and correct defects. The SEM is operated in multiple modes, including a measuring mode and a repair mode. The repair mode is of higher landing energy and exposure time than the measuring mode, and induces shrinkage in the photoresist to correct various features, such as vias that are too small.

Abstract: Methods and systems for altering the electrical resistance of a wiring path. The electrical resistance of the wiring path is compared with a target electrical resistance value. If the electrical resistance of the wiring path exceeds the target electrical resistance value, an electrical current is selectively applied to the wiring path to physically alter a portion of the wiring path. The current may be selected to alter the wiring path such that the electrical resistance drops to a value less than or equal to the target electrical resistance value.

Abstract: An electronic device assembly is provided which includes a substrate, an interposer and an integrated circuit chip. The substrate is fabricated of a first material having a first thermal expansivity, and the interposer and integrated circuit chip are fabricated of a second material having a second thermal expansivity. The second thermal expansivity is different from the first thermal expansivity so that there is a coefficient of thermal expansion mismatch between the substrate and the interposer or chip. The interposer is coupled to the substrate via a first plurality of electrical contacts and an underfill adhesive at least partially surrounding the electrical contacts to bond the interposer to the substrate and thereby reduce strain on the first plurality of electrical contacts. The integrated circuit chip is coupled to the interposer via a second plurality of electrical contacts only, without use of an adhesive surrounding the second plurality of electrical contacts.

Abstract: A structure for repairing a line defect in which a short can be easily repaired using an adjacent wiring line despite limited repairing space and a method of repairing the defect are disclosed.

Abstract: A reworking method for integrated circuit devices includes the following: providing a substrate having a first base layer and a first dielectric layer formed thereon, performing a first dry etching process to remove the first dielectric layer, performing a CMP process to remove the first base layer, and sequentially reforming a second base layer and a second dielectric layer on the substrate. When certain layers on the IC device have hailed an inspection or when quality defects are found, the defective layer is removed according to the provided reworking method.

Abstract: Methods for the repair of damaged low k films are provided. Damage to the low k films occurs during processing of the film such as during etching, ashing, and planarization. The processing of the low k film causes water to store in the pores of the film and further causes hydrophilic compounds to form in the low k film structure. Repair processes incorporating ultraviolet (UV) radiation and carbon-containing compounds remove the water from the pores and further remove the hydrophilic compounds from the low k film structure.

Abstract: A method and system for repairing photomasks is disclosed. A scanning electron microscope (SEM) is used to identify, measure, and correct defects. The SEM is operated in multiple modes, including a measuring mode and a repair mode. The repair mode is of higher landing energy and exposure time than the measuring mode, and induces shrinkage in the photoresist to correct various features, such as vias that are too small.