Dopant Introduction Into Semiconductor Region Patents (Class 438/45)
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Patent number: 7913195Abstract: According to mask layout data created for a particular factory facility, transistors constituting a semiconductor device are classified into multiple groups depending on the gate length. Thereafter, the concentration of impurity introduced into a channel layer is set for each group, and thereby the gate length-threshold characteristics of a transistor are controlled. An overlapping area of a gate electrode and an element region of a certain group is extracted from mask layout data. The overlapping area is expanded to determine the shape of a mask used in injecting impurity in a channel layer. The data on the mask shape is then added to the mask layout data.Type: GrantFiled: February 6, 2008Date of Patent: March 22, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Yoshihiro Takao
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Publication number: 20110062430Abstract: Methods for the production of a blue light emitting nanomaterial are provided comprising nitriding Group 13 metals to produce nitrided Group 13 metals and doping the nitrided Group 13 metals with a dopant, particularly an M2+ dopant, such as Mg2+ or Zn2+, to produce doped nanoparticles. Blue light emitting nanocomposites on other materials, such as SiO2 or TiO2, are also provided. Blue light emitting nanomaterials and nanocomposites also can be coupled to photonic crystals. Nanocrystal-based electroluminescence device are also disclosed.Type: ApplicationFiled: June 1, 2009Publication date: March 17, 2011Inventors: Franciscus Cornelis Jacobus Maria van Veggel, Mingqian Tan, Venkataramanan Mahalingam, Vasanthakumaran Sudarsan
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Patent number: 7901962Abstract: The present invention relates to a method for preparing an organic light-emitting diode, including: (A) providing a substrate with a first electrode thereon; (B) using a first solution to form a first light-emitting layer over the first electrode, where the first solution includes a first solvent and a first dye; (C) using a second solution to form a second light-emitting layer over the first light-emitting layer, where the second solution includes a second solvent and a second dye, and the first solvent and the second solvent are different solvents and satisfy at least one of the following conditions: the dipole moment difference between the first solvent and the second solvent being 0.5 D or more, or the viscosity of the first solvent being 0.3 mPa·s or more; and (D) forming a second electrode over the second light-emitting layer.Type: GrantFiled: October 28, 2010Date of Patent: March 8, 2011Assignee: National Tsing Hua UniversityInventors: Jwo-Huei Jou, Pei-Yu Hwang
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Patent number: 7897497Abstract: A light-generating semiconductor region is grown by epitaxy on a silicon substrate. The light-generating semiconductor region is a lamination of layers of semiconducting nitrides containing a Group III element or elements. The silicon substrate has a p-type impurity-diffused layer formed therein by thermal diffusion of the Group III element or elements from the light-generating semiconductor region as a secondary product of the epitaxial growth of this region on the substrate. The p-type impurity-diffused layer is utilized as a part of overvoltage protector diodes which are serially interconnected with each other and in parallel with the LED section of the device between a pair of electrodes.Type: GrantFiled: July 28, 2008Date of Patent: March 1, 2011Assignee: Sanken Electric Co., Ltd.Inventors: Yasuhiro Kamii, Arei Niwa, Junji Sato, Mikio Tazima
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Publication number: 20110045622Abstract: In a fabricating method of an LED, a first-type doped semiconductor material layer, a light emitting material layer, and a second-type doped semiconductor material layer are sequentially formed on a substrate. The first-type and second-type doped semiconductor material layers and the light emitting material layer are patterned to form a first-type doped semiconductor layer, an active layer, and a second-type doped semiconductor layer. The active layer is disposed on a portion of the first-type doped semiconductor layer. The second-type doped semiconductor layer is disposed on the active layer and has a first top surface. A wall structure is formed on the first-type doped semiconductor layer that is not covered by the active layer, and the wall structure surrounds the active layer and has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Electrodes are formed on the first-type and second-type doped semiconductor layers.Type: ApplicationFiled: November 1, 2010Publication date: February 24, 2011Applicant: LEXTAR ELECTRONICS CORP.Inventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao
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Patent number: 7892872Abstract: Highly uniform silica nanoparticles can be formed into stable dispersions with a desirable small secondary particle size. The silican particles can be surface modified to form the dispersions. The silica nanoparticles can be doped to change the particle properties and/or to provide dopant for subsequent transfer to other materials. The dispersions can be printed as an ink for appropriate applications. The dispersions can be used to selectively dope semiconductor materials such as for the formation of photovoltaic cells or for the formation of printed electronic circuits.Type: GrantFiled: January 2, 2008Date of Patent: February 22, 2011Assignee: NanoGram CorporationInventors: Henry Hieslmair, Shivkumar Chiruvolu, Hui Du
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Patent number: 7883913Abstract: A manufacturing method of an image sensor of vertical type is provided that includes: forming an insulation layer with a metal wiring and a contact plug therein on a first substrate; bonding a second substrate having an image sensing unit over the insulation layer; forming a trench in the second substrate to divide the image sensing unit for each pixel; forming a PTI by gap-filling the trench with insulating material; forming a first material layer over the PTI, the image sensing unit, and the insulation layer; and forming a second material layer over the first material layer and performing a deuterium annealing process thereon. The crystal defects of the substrate generated when performing the trench etching on the donor substrate to define unit pixels are cured by performing the deuterium annealing process, making it possible to improve the sensitivity and illumination characteristics of the image sensor of vertical type.Type: GrantFiled: December 15, 2009Date of Patent: February 8, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Jong Man Kim
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Patent number: 7880183Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.Type: GrantFiled: May 5, 2010Date of Patent: February 1, 2011Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Hong San Kim, James S. Speck
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Patent number: 7875559Abstract: Provided are a method of manufacturing a transparent N-doped p-type ZnO semiconductor layer using a surface chemical reaction between precursors containing elements constituting thin layers, and a thin film transistor (TFT) including the p-type ZnO semiconductor layer. The method includes the steps of: preparing a substrate and loading the substrate into a chamber; injecting a Zn precursor and an oxygen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the oxygen precursor using an atomic layer deposition (ALD) technique to form a ZnO thin layer on the substrate; and injecting a Zn precursor and an nitrogen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the nitrogen precursor to form a doping layer on the ZnO thin layer.Type: GrantFiled: January 8, 2008Date of Patent: January 25, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Sang Hee Park, Chi Sun Hwang, Hye Yong Chu, Jeong Ik Lee
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Publication number: 20110012087Abstract: A semiconductor nanocrystal include a first I-III-VI semiconductor material and have a luminescence quantum yield of at least 10%, at least 20%, or at least 30%. The nanocrystal can be substantially free of toxic elements. Populations of the nanocrystals can have an emission FWHM of no greater than 0.35 eV.Type: ApplicationFiled: January 22, 2009Publication date: January 20, 2011Inventors: Peter Matthew Allen, Moungi G. Bawendi
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Publication number: 20110012088Abstract: An optoelectronic semiconductor body includes an epitaxial semiconductor layer sequence including a tunnel junction including an intermediate layer between an n-type tunnel junction layer and a p-type tunnel junction layer, wherein the intermediate layer has an n-barrier layer facing the n-type tunnel junction layer, a p-barrier layer facing the p-type tunnel junction layer, and a middle layer with a material composition differing from material compositions of the n-barrier layer and the p-barrier layer; and an active layer that emits electromagnetic radiation.Type: ApplicationFiled: February 26, 2009Publication date: January 20, 2011Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Martin Strassburg, Lutz Hoeppel, Matthias Sabathil
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Patent number: 7867791Abstract: The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film with a light intensity reducing function is used. With such an exposure mask, various light exposures can be more accurately controlled, which enables a resist to be processed into a more accurate shape. Therefore, when such a mask layer is used, the conductive film and the insulating film can be processed in the same step into different shapes in accordance with desired performances. As a result, thin film transistors with different characteristics, wires in different sizes and shapes, and the like can be manufactured without increasing the number of steps.Type: GrantFiled: July 18, 2006Date of Patent: January 11, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideto Ohnuma, Masayuki Sakakura
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Patent number: 7863068Abstract: A light emitting diode (LED) includes a p-n junction containing luminescent activator ions. The visible emission from the activator ions preferably complementing the band edge emission of the LED in order to produce an overall white emission from the LED. In a preferred embodiment, the LED has double heterojunction structure having a semiconductor active layer between two confinement layers. The semiconductor active layer includes activator ions preferably selected from among Eu3+, Tb3+, Dy3+, Pr3+, Tm3+, and Mn2+. The electron-hole pairs trapped within the active layer sensitize the activator ions, causing the activator ions to emit light.Type: GrantFiled: April 29, 2008Date of Patent: January 4, 2011Assignee: OSRAM SYLVANIA Inc.Inventor: Kailash C. Mishra
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Patent number: 7863067Abstract: The present disclosure provides a method for fabricating a semiconductor device including providing a semiconductor substrate comprising a first surface and a second surface, wherein at least one imaging sensor is located adjacent the first surface, activating a dopant layer in the semiconductor substrate adjacent the second surface using a localized annealing process, and etching the dopant layer.Type: GrantFiled: March 14, 2007Date of Patent: January 4, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Gwo-Yuh Shiau, Ming Chyi Liu, Tzu-Hsuan Hsu, Chia-Shiung Tsai
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Patent number: 7858407Abstract: A microresonator comprising a single-crystal silicon resonant element and at least one activation electrode placed close to the resonant element, in which the resonant element is placed in an opening of a semiconductor layer covering a substrate, the activation electrode being formed in the semiconductor layer and being level at the opening.Type: GrantFiled: November 6, 2008Date of Patent: December 28, 2010Inventors: Nicolas Abelé, Pascal Ancey, Alexandre Talbot, Karim Segueni, Guillaume Bouche, Thomas Skotnicki, Stéphane Monfray, Fabrice Casset
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Publication number: 20100289016Abstract: Disclosed is an organic light emitting diode, in which the light transmittance of a transparent cathode is improved, and which includes a substrate, a first electrode formed on the substrate, an organic layer formed on the first electrode, a second electrode formed on the organic layer, and a transparent layer formed at either one or both of a position between the organic layer and the second electrode and a position on the upper surface of the second electrode and including any one selected from among an oxide, a nitride, a salt and mixtures thereof, so that the formation of the transparent layer on the cathode results in increased light transmittance and decreased resistance, thereby improving electrical performance of products. A method of manufacturing the organic light emitting diode is also provided.Type: ApplicationFiled: May 13, 2010Publication date: November 18, 2010Applicant: NEOVIEWKOLON CO., LTD.Inventors: Young-Bo Ha, Eun-Chul Shin, Young-Eun Kim, Woo-Bin Im, Hyun-Sik Park
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Patent number: 7833834Abstract: A method for producing a nitride semiconductor laser light source is provided. The nitride semiconductor laser light source has a nitride semiconductor laser chip, a stem for mounting the laser chip thereon, and a cap for covering the laser chip. The laser chip is encapsulated in a sealed container composed of the stem and the cap. The method for producing this nitride semiconductor laser light source has a cleaning step of cleaning the surface of the laser chip, the stem, or the cap. In the cleaning step, the laser chip, the stem, or the cap is exposed with ozone or an excited oxygen atom, or baked by heat. The method also has, after the cleaning step, a capping step of encapsulating the laser chip in the sealed container composed of the stem and the cap. During the capping step, the cleaned surface of the laser chip, the stem, or the cap is kept clean.Type: GrantFiled: September 29, 2005Date of Patent: November 16, 2010Assignee: Sharp Kabushiki KaishaInventors: Daisuke Hanaoka, Masaya Ishida, Atsushi Ogawa, Yoshihiko Tani, Takuro Ishikura
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Patent number: 7816163Abstract: The present invention concerns a radiation-emitting semiconductor body with a vertical emission direction, a radiation-generating active layer, and a current-conducting layer having a current-blocking region and a current-permeable region, the semiconductor body being provided for a vertically emitting laser with an external resonator, and the external resonator having a defined resonator volume that overlaps with the current-permeable region.Type: GrantFiled: September 29, 2008Date of Patent: October 19, 2010Assignee: Osram Opto Semiconductors GmbHInventors: Wolfgang Schmid, Klaus Streubel, Norbert Linder
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Publication number: 20100252806Abstract: Disclosed are a carbon nano-tube (CNT) light emitting device and a method of manufacturing the same. Specifically, the CNT light emitting device comprises: a CNT thin film formed using a CNT dispersed solution; a n-doping polymer formed on one end of the CNT thin film; a p-doping polymer formed on the other end of the CNT thin film; and a light emitting part between the n-doping polymer and the p-doping polymer. In addition, the method of manufacturing a CNT light emitting device comprises steps of: mixing CNTs with a dispersing agent or dispersing solvent to prepare a CNT dispersed solution; forming a CNT thin film using the CNT dispersed solution; coating a n-doping polymer on one end of the CNT thin film; and coating a p-doping polymer on the other end of the CNT thin film.Type: ApplicationFiled: December 20, 2007Publication date: October 7, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaeyoung CHOI, Hyeon Jin SHIN, Seonmi YOON, Seong Jae CHOI
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Publication number: 20100248407Abstract: Provided is a method for producing a Group III nitride-based compound semiconductor light-emitting device, wherein a contact electrode is formed on an N-polar surface of an n-type layer through annealing at 350° C. or lower. In the case where, in a Group III nitride-based compound semiconductor device produced by the laser lift-off process, a contact electrode is formed, through annealing at 350° C. or lower, on a micro embossment surface (i.e., a processed N-polar surface) of an n-type layer from vanadium, chromium, tungsten, nickel, platinum, niobium, or iron, when a pseudo-silicon-heavily-doped layer is formed on the micro embossment surface (i.e., N-polar surface) of the n-type layer through treatment with a plasma of a silicon-containing compound gas, and treatment with a fluoride-ion-containing chemical is not carried out, ohmic contact is obtained, and low resistance is attained.Type: ApplicationFiled: March 30, 2010Publication date: September 30, 2010Applicant: TOYODA GOSEI CO., LTD.Inventors: Toshiya Umemura, Ryohei Inazawa, Koichi Goshonoo, Tomoharu Shiraki
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Patent number: 7804042Abstract: In a laser annealing system for workpieces such as semiconductor wafers, a pyrometer wavelength response band is established within a narrow window lying between the laser emission band and a fluorescence emission band from the optical components of the laser system, the pyrometer response band lying in a wavelength region at which the optical absorber layer on the workpiece has an optical absorption coefficient as great as or greater than the underlying workpiece. A multi-layer razor-edge interference filter having a 5-8 nm wavelength cut-off edge transition provides the cut-off of the laser emission at the bottom end of the pyrometer response band.Type: GrantFiled: June 18, 2007Date of Patent: September 28, 2010Assignee: Applied Materials, Inc.Inventors: Jiping Li, Bruce E. Adams, Timothy N. Thomas, Aaron Muir Hunter, Abhilash J. Mayur, Rajesh S. Ramanujam
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LASER MEDIA WITH CONTROLLED CONCENTRATION PROFILE OF ACTIVE LASER IONS AND METHOD OF MAKING THE SAME
Publication number: 20100226407Abstract: A laser medium comprises a solid-state host material and dopant species provided within the solid-state host material. A first portion of the dopant species has a first valence state, and a second portion of the dopant species has a second valence state. In an embodiment, a concentration of the first portion of the dopant species decreases radially with increasing distance from a center of the medium, and a concentration of the second portion of the dopant species increases radially with increasing distance from the center of the medium. The laser medium further comprises impurities within the solid-state host material, the impurities converting the first portion of the dopant species having the first valence state into the second portion of dopant species having the second valence state.Type: ApplicationFiled: March 3, 2009Publication date: September 9, 2010Applicant: RAYTHEON COMPANYInventors: Kevin W. Kirby, David S. Sumida -
Patent number: 7791166Abstract: A structure and a method for forming the same. The structure includes (a) a substrate which includes a top substrate surface which defines a reference direction perpendicular to the top substrate surface, (b) N semiconductor regions on the substrate, and (c) P semiconductor regions on the substrate, N and P being positive integers. The N semiconductor regions comprise dopants. The P semiconductor regions do not comprise dopants. The structure further includes M interconnect layers on top of the substrate, the N semiconductor regions, and the P semiconductor regions, M being a positive integer. The M interconnect layers include an inductor. (i) The N semiconductor regions do not overlap and (ii) the P semiconductor regions overlap the inductor in the reference direction. A plane perpendicular to the reference direction and intersecting a semiconductor region of the N semiconductor regions intersects a semiconductor region of the P semiconductor regions.Type: GrantFiled: May 4, 2007Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Brent Alan Anderson, Howard Smith Landis, Edward Joseph Nowak
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Publication number: 20100221859Abstract: A semiconductor structure and a method for manufacturing the same are provided. Compared to conventional structures of thin film transistors, the structure of the present invention uses a patterned first metal layer as a data line, and a patterned second metal layer as a gate line. In a thin film transistor, a gate is also located in the patterned first metal layer, and is electrically connected to the gate line located in the patterned second metal layer through a contact hole. A source and a drain of the thin film transistor are electrically connected to the data line through a contact hole. The structure of the present invention increases a storage capacitance and an aperture ratio.Type: ApplicationFiled: May 17, 2010Publication date: September 2, 2010Applicant: AU OPTRONICS CORP.Inventor: Yu-Cheng Chen
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Patent number: 7785911Abstract: Provided are a semiconductor laser diode having a current confining layer and a method of fabricating the same. The semiconductor laser diode includes a substrate, a first material layer deposited on the substrate, an active layer which is deposited on the first material layer and emits a laser beam, and a second material layer which is deposited on the active layer and includes a ridge portion protruding from the active layer and a current confining layer formed by injection of ions into peripheral portions of the ridge portion so as to confine a current injected into the active layer. Therefore, it is possible to fabricate an improved semiconductor laser diode having a low-resonance critical current value that can remove a loss in an optical profile and reduce the profile width of a current injected into the active layer while maintaining the width of the ridge portion.Type: GrantFiled: October 13, 2006Date of Patent: August 31, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Joon-seop Kwak, Kyoung-ho Ha, Yoon-joon Sung
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Publication number: 20100200862Abstract: A liquid crystal display device may comprise a semiconductor layer on a substrate and including a channel portion and ohmic contact portions at both sides of the channel portion, wherein an edge portion of the semiconductor layer has a side surface of a substantially tapered shape; a gate insulating layer covering the semiconductor layer; a gate electrode on the gate insulating layer and substantially corresponding to the channel portion; source and drain electrodes contacting the semiconductor layer; and a pixel electrode contacting the drain electrode.Type: ApplicationFiled: April 19, 2010Publication date: August 12, 2010Inventors: Joon Young YANG, Jae Young Oh, Soopool Kim
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Patent number: 7772602Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.Type: GrantFiled: March 24, 2009Date of Patent: August 10, 2010Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Hong San Kim, James S. Speck
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Patent number: 7772601Abstract: Disclosed is a light emitting device having a plurality of light emitting cells. The light emitting device comprises a thermally conductive substrate, such as a SiC substrate, having a thermal conductivity higher than that of a sapphire substrate. The plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. For example, the semi-insulating buffer layer may be formed of AlN or semi-insulating GaN. Since the thermally conductive substrate having a thermal conductivity higher than that of a sapphire substrate is employed, heat-dissipating performance can be enhanced as compared with a conventional sapphire substrate, thereby increasing the maximum light output of a light emitting device that is driven under a high voltage AC power source.Type: GrantFiled: July 5, 2005Date of Patent: August 10, 2010Assignee: Seoul Opto Device Co., Ltd.Inventors: Chung Hoon Lee, Hong San Kim, James S. Speck
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Patent number: 7772587Abstract: Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far.Type: GrantFiled: March 14, 2006Date of Patent: August 10, 2010Assignee: Electronics and Telecommunications Research InstituteInventors: Kyung Hyun Kim, Nae Man Park, Chul Huh, Tae Youb Kim, Jae Heon Shin, Kwan Sik Cho, Gun Yong Sung
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Publication number: 20100197061Abstract: A method for forming a selective emitter of a solar cell and a diffusion apparatus for forming the same are provided. The method includes texturing a surface of a silicon substrate by etching the silicon substrate, coating an impurity solution on the surface of the silicon substrate, injecting a first thermal energy into the whole surface of the silicon substrate, and, while the first thermal energy is injected into the whole surface of the silicon substrate, injecting a second thermal energy by irradiating a laser beam into a partial region of the surface of the silicon substrate.Type: ApplicationFiled: July 17, 2009Publication date: August 5, 2010Inventors: Yunsung HUH, Seungil PARK, Mangeun LEE
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Publication number: 20100189147Abstract: Semiconductor devices and a method for generating light in a semiconductor device are invented and disclosed. The method includes the steps of forming a vertical cavity surface emitting laser including an active region and an oxide layer, the active region separated from the oxide layer and configured to generate light in response to an injected current and introducing an implant layer adjacent and underneath the oxide layer to confine the injected current to a region of the device where charge carriers are combining to generate light. The semiconductor devices include an implant layer between the oxide layer and the active region. The implant layer prevents lateral leakage current from exiting a region of the device where charge carriers are combining to generate light.Type: ApplicationFiled: January 24, 2009Publication date: July 29, 2010Inventors: Chen Ji, Laura Giovane
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Patent number: 7759148Abstract: A method for manufacturing a semiconductor optical device includes forming a BDR (Band Discontinuity Reduction) layer of a first conductivity type doped with an impurity, depositing a contact layer of the first conductivity type in contact with the BDR layer after forming the the BDR layer, the contact layer being doped with the same impurity as the BDR layer and used to form an electrode, and heat treating after forming the contact layer.Type: GrantFiled: August 13, 2007Date of Patent: July 20, 2010Assignee: Mitsubishi Electric CorporationInventors: Yoshihiko Hanamaki, Kenichi Ono
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Publication number: 20100176389Abstract: Provided are an organic light emitting diode and a method of manufacturing the same. The organic light emitting diode adjusts an optical resonance thickness and prevents spectrum distortions without use of an auxiliary layer. The organic light emitting diode includes a first electrode that is optically reflective; a second electrode that is optically transmissible and faces the first electrode; an organic emission layer interposed between the first electrode and the second electrode, the organic emission layer including: a first emission layer including a mixed layer that contains a host material and a dopant material, and a second emission layer comprising only the host material; and a carrier injection transport layer interposed between the organic emission layer and the first electrode or between the organic emission layer and the second electrode.Type: ApplicationFiled: January 13, 2010Publication date: July 15, 2010Applicant: Samsung Mobile Display Co., Ltd.Inventors: Min-Seung CHUN, Mi-Kyung Kim, Dong-Heon Kim, Jung-Ha Son, Jae-Hyun Kwak, Kyung-Hoon Choi, Mie-Hwan Park, Young-Ho Park, Young-Suck Choi, Tae-Shick Kim, Choon-Woo Im, Kwan-Hee Lee
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Patent number: 7756687Abstract: A method for predicting the contribution of silicon interstitials to n-type dopant transient enhanced diffusion during a pn junction formation is disclosed. Initially, fundamental data for a set of microscopic processes that can occur during one or more material processing operations are obtained. The fundamental data are then utilized to build kinetic models for a set of reactions that contribute substantially to an evolution of n-type dopant concentration and electrical activities. The kinetic models are subsequently applied to a simulator to predict temporal and spatial evolutions of concentration and electrical activity profiles of the n-type dopants.Type: GrantFiled: September 29, 2006Date of Patent: July 13, 2010Inventors: Gyeong S. Hwang, Scott A. Harrison
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Patent number: 7754512Abstract: According to the present invention, a light-emitting semiconductor device has light-emitting elements separated by isolation trenches, preferably on two sides of each light-emitting element. The device may be fabricated by forming a single band-shaped diffusion region, then forming trenches that divide the diffusion region into multiple regions, or by forming individual diffusion regions and then forming trenches between them. The trenches prevent overlap between adjacent light-emitting elements, regardless of their junction depth, enabling a high-density array to be fabricated while maintaining adequate junction depth.Type: GrantFiled: May 3, 2005Date of Patent: July 13, 2010Assignee: Oki Data CorporationInventors: Masumi Taninaka, Hiroyuki Fujiwara, Susumu Ozawa, Masaharu Nobori
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Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof
Patent number: 7749820Abstract: Disclosed is a manufacturing method of a thin film transistor, which enables the formation of a thin film transistor by using only one photomask. The method includes: over a substrate sequentially forming a first insulating film, a first conductive film, a second insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film; forming a resist mask thereover using a first photomask; performing a first etching to allow the side surface of the layers including an upper portion of the first insulating film, the first conductive film, the second insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film to be coplanar to a side surface of the resist mask; and performing a second etching to selectively etch the first conductive film to allow the side surface of the first conductive film is located inside the side surface of the layers.Type: GrantFiled: February 26, 2009Date of Patent: July 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hidekazu Miyairi -
Publication number: 20100159625Abstract: A method for manufacturing a p-type gallium nitride-based (GaN) device is disclosed. In accordance with the method, an Mg in an MgNx layer disposed on p-type gallium nitride is diffused into the p-type gallium nitride by a heat treatment to dope the p-type gallium nitride with the Mg while activating the diffused Mg simultaneously, eliminating a need for an additional heat treatment for the activation and preventing a nitrogen in the p-type gallium nitride from being separated therefrom.Type: ApplicationFiled: November 24, 2006Publication date: June 24, 2010Applicant: THELEDS CO., LTD.Inventor: Jong Hee Lee
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Patent number: 7736923Abstract: An optical semiconductor device includes: a first conductivity type first semiconductor region; a first conductivity type second semiconductor region formed on the first semiconductor region; a second conductivity type third semiconductor region formed on the second semiconductor region; a photodetector section formed of the second semiconductor region and the third semiconductor region; a micro mirror formed of a trench formed selectively in a region of the first semiconductor region and the second semiconductor region except the photodetector section; and a semiconductor laser element held on the bottom face of the trench. A first conductivity type buried layer of which impurity concentration is higher than those of the first semiconductor region and the second semiconductor region is selectively formed between the first semiconductor region and the second semiconductor region in the photodetector section.Type: GrantFiled: April 7, 2008Date of Patent: June 15, 2010Assignee: Panasonic CorporationInventor: Takaki Iwai
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Patent number: 7724425Abstract: Methods and corresponding apparatus for optical amplification in semiconductors, particularly indirect band-gap semiconductors, and most particularly in silicon. A first aspect of the invention employs certain doping elements to provide inter-band-gap energy levels in combination with optical or current-injection pumping. The doping element, preferably a noble metal and most preferably Gold, is chosen to provide an energy level which enables an energy transition corresponding to a photon of wavelength equal to the signal wavelength to be amplified. The energy transition may be finely “adjusted” by use of standard doping techniques (such as n-type or p-type doping) to alter the conduction and valence band energy levels and thereby also the magnitude of the energy transition. A second aspect of the invention relates to the use of a non-homogeneous heat distribution which has been found to lead to optical amplification effects.Type: GrantFiled: January 25, 2009Date of Patent: May 25, 2010Assignee: Ramot at Tel Aviv University Ltd.Inventors: Shlomo Ruschin, Stanislav Stepanov
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Patent number: 7723139Abstract: Embodiments of a method of quantum well intermixing (QWI) comprise providing a wafer comprising upper and lower epitaxial layers, which each include barrier layers, and a quantum well layer disposed between the upper and lower epitaxial layers, applying at least one sacrificial layer over the upper epitaxial layer, and forming a QWI enhanced region and a QWI suppressed region by applying a QWI enhancing layer over a portion of the sacrificial layer, wherein the portion under the QWI enhancing layer is the QWI enhanced region, and the other portion is the QWI suppressed region. The method further comprises the steps of applying a QWI suppressing layer over the QWI enhanced region and the QWI suppressed region, and annealing at a temperature sufficient to cause interdiffusion of atoms between the quantum well layer and the barrier layers of the upper epitaxial layer and the lower epitaxial layer.Type: GrantFiled: October 1, 2007Date of Patent: May 25, 2010Assignee: Corning IncorporatedInventors: Yabo Li, Kechang Song, Chung-En Zah
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Patent number: 7700394Abstract: There is obtained a silicon wafer which has a large diameter, where no slip generated therein in a wide range of a density of oxygen precipitates even though a heat treatment such as SLA or FLA is applied thereto, and which has high strength. First, by inputting as input parameters combinations of a plurality of types of oxygen concentrations and thermal histories set for manufacture of a silicon wafer, a Fokker-Planck equation is solved to calculate each of a diagonal length L and a density D of oxygen precipitates in the wafer after a heat treatment step to form the oxygen precipitates (11) and immediately before a heat treatment step of a device manufacturing process is calculated.Type: GrantFiled: June 21, 2005Date of Patent: April 20, 2010Assignee: Sumco CorporationInventors: Shinsuke Sadamitsu, Wataru Sugimura, Masanori Akatsuka, Masataka Hourai
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Publication number: 20100090202Abstract: In a method for manufacturing an organic transistor element, an electrode is subjected to wet etching into a predetermined pattern on an organic semiconductor layer. In the process for performing wet etching on the electrode so as to obtain a predetermined pattern, an etching liquid containing a dopant of the organic semiconductor layer is used to perform wet etching on the electrode and, simultaneously, the organic semiconductor layer is doped with the dopant.Type: ApplicationFiled: December 28, 2007Publication date: April 15, 2010Applicant: DAI NIPPON PRINTING CO., LTDInventors: Katsunari Obata, Takuya Hata, Kenji Nakamura, Hiroyuki Endoh
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Patent number: 7696620Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of the photodiodes (4) are formed in array form on the surface at a side of the n-type silicon substrate (3) onto which light to be detected is made incident and the penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with the spacer (6), having a predetermined planar pattern, provided at non-forming regions of the incidence surface side at which the photodiodes (4) are not formed.Type: GrantFiled: March 10, 2004Date of Patent: April 13, 2010Assignee: Hamamatsu Photonics K.K.Inventor: Katsumi Shibayama
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Publication number: 20100038674Abstract: A light-emitting diode (LED) device is provided. The LED device has a lower LED layer and an upper LED layer with a light-emitting layer interposed therebetween. A current blocking layer is formed in the upper LED layer such that current passing between an electrode contacting the upper LED layer flows around the current blocking layer. When the current blocking layer is positioned between the electrode and the light-emitting layer, the light emitted by the light-emitting layer is not blocked by the electrode and the light efficiency is increased. The current blocking layer may be formed by converting a portion of the upper LED layer into a resistive region. In an embodiment, ions such as magnesium, carbon, or silicon are implanted into the upper LED layer to form the current blocking layer.Type: ApplicationFiled: August 12, 2009Publication date: February 18, 2010Inventors: Ding-Yuan Chen, Chen-Hua Yu, Wen-Chih Chiou
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Publication number: 20100034230Abstract: A semiconductor light emitting device includes: a substrate; a first clad layer formed above the substrate and made of AlGaInP mixed crystal of a first conductivity type; an active layer formed on the first clad layer and made of AlGaInP mixed crystal; and a second clad layer formed on the active layer and made of AlGaInP mixed crystal of a second conductivity type opposite to the first conductivity type, wherein the first clad layer and the second clad layer each have a band gap wider than a band gap of the active layer, and at least one of the active layer and the first and second clad layers is doped with arsenic at an impurity concentration level not changing the band gap. Carbon capturing is suppressed, and surface morphology is suppressed from being degraded.Type: ApplicationFiled: August 5, 2009Publication date: February 11, 2010Applicant: Stanley Electric Co., Ltd.Inventors: Wataru TAMURA, Tatsuma Saito
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Publication number: 20100034232Abstract: A laser amplification structure comprising an active medium and at least two electrodes disposed on either side of the active medium, the active medium comprising a first layer of a silicon oxide doped with rare earth ions, wherein the first silicon layer is co-doped with silicon nanograins and rare earth ions.Type: ApplicationFiled: November 21, 2006Publication date: February 11, 2010Inventors: Fabrice Gourbilleau, David Bréard, Richard Rizk, Jean-Louis Doualan
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Publication number: 20100026198Abstract: The light emitting device of the invention includes a first electrode, a second electrode, and a carrier formed between the first electrode and the second electrode and containing germanium light emitters, wherein the germanium light emitters contain germanium oxide in which at least part of the germanium oxide has oxygen deficiency and have a wavelength peak of emission in both or either the range of 250 to 350 nm and/or the range of 350 to 500 nm when a potential difference is applied to the first electrode and the second electrode.Type: ApplicationFiled: July 28, 2009Publication date: February 4, 2010Inventors: Nobutoshi ARAI, Masatomi Harada, Kouichirou Adachi, Hiroshi Iwata
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Publication number: 20100012970Abstract: An LED chip includes a substrate, a semiconductor device layer, a wall structure, and a number of electrodes. The semiconductor device layer is disposed on the substrate and includes a first-type doped semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first-type doped semiconductor layer, and a second-type doped semiconductor layer disposed on the active layer and having a first top surface. The wall structure is disposed on the first-type doped semiconductor layer that is not covered by the active layer and surrounds the active layer. Besides, the wall structure has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Additionally, the electrodes are disposed on and electrically connected with the first-type doped semiconductor layer and the second-type doped semiconductor layer.Type: ApplicationFiled: September 5, 2008Publication date: January 21, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao
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Patent number: RE41336Abstract: A fabrication process for a semiconductor device including a plurality of semiconductor layers, the plurality of semiconductor layers including at least a nitrogen-containing alloy semiconductor AlaGabIn1-a-bNxPyAszSb1-x-y-z (0?a?1, 0?b?1, 0<x<1, 0?y<1, 0?z<1), and a method of making the semiconductor device and apparatus. For at least two semiconductor layers out of the plurality of semiconductor layers, a value of lattice strain of said at least two semiconductor layers is set at less than a critical strain at which misfit dislocations are generated at an interface between said two adjacent semiconductor layers.Type: GrantFiled: January 2, 2003Date of Patent: May 18, 2010Assignee: Opnext Japan, IncInventors: Masahiko Kondow, Kazuhisa Uomi, Hitoshi Nakamura
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Patent number: RE42074Abstract: A method of manufacturing a light emitting device, including the steps of: forming an active layer composed of a compound semiconductor containing indium by a vapor phase growth method; and forming a cap layer composed of a compound semiconductor on said active layer by a vapor phase growth method at a growth temperature approximately equal to or lower than a growth temperature for said active layer.Type: GrantFiled: December 18, 2002Date of Patent: January 25, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Tatsuya Kunisato, Takashi Kano, Yasuhiro Ueda, Yasuhiko Matsushita, Katsumi Yagi