Chemically Responsive Patents (Class 438/49)
  • Patent number: 8653567
    Abstract: A chemically sensitive sensor with a lightly doped region that affects an overlap capacitance between a gate and an electrode of the chemical sensitive sensor. The lightly doped region extends beneath and adjacent to a gate region of the chemical sensitive sensor. Modifying the gain of the chemically sensitive sensor is achieved by manipulating the lightly doped region under the electrodes.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: February 18, 2014
    Assignee: Life Technologies Corporation
    Inventor: Keith Fife
  • Patent number: 8647577
    Abstract: The described embodiments may provide a method of fabricating a chemical detection device. The method may comprise forming a microwell above a CMOS device. The microwell may comprise a bottom surface and sidewalls. The method may further comprise applying a first chemical to be selectively attached to the bottom surface of the microwell, forming a metal oxide layer on the sidewalls of the microwell, and applying a second chemical to be selectively attached to the sidewalls of the microwell. The second chemical may lack an affinity to the first chemical.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: February 11, 2014
    Assignee: Life Technologies Corporation
    Inventors: Wolfgang Hinz, John Matthew Mauro, Shifeng Li, James Bustillo
  • Publication number: 20140034907
    Abstract: A nanowire sensor having a nanowire in a network structure includes: source and drain electrodes formed over a substrate; a nanowire formed between the source and drain electrodes and having a network structure in which patterns of intersections are repeated; and a detection material fixed to the nanowire and selectively reacting with a target material introduced from outside.
    Type: Application
    Filed: March 19, 2012
    Publication date: February 6, 2014
    Inventors: Jeong Soo Lee, Yoon Ha Jeong, Tai Uk Rim, Chang Ki Baek, Sung Ho Kim, Ki Hyun Kim
  • Publication number: 20140035007
    Abstract: The present disclosure relates to a gas sensor for determining substances contained in a gas mixture, comprising a substrate on which a source electrode, a drain electrode and a gate electrode are arranged, at least one electrically insulating layer being arranged between the substrate and the gate electrode, the gate electrode comprising an electrically conductive ceramic material, and the gate electrode having a range of variation of its thickness that is greater than or equal to one quarter of its total thickness. Such a gas sensor may have in particular improved measuring characteristics and, furthermore, allow itself to be produced in an improved way. The present disclosure also relates to a method for producing such a gas sensor.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 6, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Andreas Krauss, Alexander Martin
  • Patent number: 8642371
    Abstract: The various embodiments herein provide a method for fabricating Ion-Selective Field-Effect Transistor (ISFET) with a nano porous poly silicon layer on a gate region. The method includes providing a p-type silicon substrate and forming a silicon dioxide layer on the p-type silicon substrate. A poly silicon layer is deposited on the silicon dioxide layer. The poly silicon layer is patterned to form a gate region, a source region and a drain region in the silicon dioxide layer. A passivation layer is deposited on the gate region, source region and the drain region. The passivation layer is etched using a buffered HF to transform the poly silicon layer into a nano porous layer on the gate region by a sequential reactive ion etching process.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: February 4, 2014
    Inventors: Shamsoddin Mohajerzadeh, Mehran Shahmohammdi, Nina Zehfroosh
  • Publication number: 20140030838
    Abstract: A method for forming a sensor includes forming a base-region barrier in contact with a base substrate. The base-region barrier includes a monocrystalline semiconductor having a same dopant conductivity as the base substrate. An emitter and a collector are formed in contact with and on opposite sides of the base-region barrier to form a bipolar junction transistor. The collector, the emitter and the base-region barrier are planarized to form a level surface opposite the base substrate such that when the level surface is exposed to charge, the charge is measured during operation of the bipolar junction transistor.
    Type: Application
    Filed: August 3, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jin Cai, Tak H Ning, Jeng-Bang Yau, Sufi Zafar
  • Publication number: 20140027866
    Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.
    Type: Application
    Filed: August 21, 2013
    Publication date: January 30, 2014
    Applicant: Genia Technologies, Inc.
    Inventor: Roger J.A. Chen
  • Patent number: 8637339
    Abstract: An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: January 28, 2014
    Assignee: Neokismet L.L.C.
    Inventors: Anthony C. Zuppero, Jawahar M. Gidwani
  • Patent number: 8633553
    Abstract: A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: January 21, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Ferrera, Matteo Perletti, Igor Varisco, Luca Zanotti
  • Patent number: 8624321
    Abstract: A thin film transistor is provided, which includes a gate insulating layer covering a gate electrode, a microcrystalline semiconductor layer provided over the gate insulating layer, an amorphous semiconductor layer overlapping the microcrystalline semiconductor layer and the gate insulating layer, and a pair of impurity semiconductor layers which are provided over the amorphous semiconductor layer and to which an impurity element imparting one conductivity type is added to form a source region and a drain region. The gate insulating layer has a step adjacent to a portion in contact with an end portion of the microcrystalline semiconductor layer. A second thickness of the gate insulating layer in a portion outside the microcrystalline semiconductor layer is smaller than a first thickness thereof in a portion in contact with the microcrystalline semiconductor layer.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: January 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshiyuki Kurokawa, Hiromichi Godo, Hidekazu Miyairi
  • Patent number: 8618611
    Abstract: Embodiments of the invention integrate carbon nanotubes on a CMOS substrate using localized heating. An embodiment can allow the CMOS substrate to be in a room-temperature environment during the carbon nanotube growth process. Specific embodiments utilize a maskless post-CMOS microelectromechanical systems (MEMS) process. The post-CMOS MEMS process according to an embodiment of the present invention provides a carbon nanotube growth process that is foundry CMOS compatible. The maskless process, according to an embodiment, eliminates the need for photomasks after the CMOS fabrication and can preserve whatever feature sizes are available in the foundry CMOS process. Embodiments integrate single-walled carbon nanotube devices into a CMOS platform.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: December 31, 2013
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Huikai Xie, Ant Ural
  • Patent number: 8618581
    Abstract: A field effect transistor device includes: a reservoir bifurcated by a membrane of three layers: two electrically insulating layers; and an electrically conductive gate between the two insulating layers. The gate has a surface charge polarity different from at least one of the insulating layers. A nanochannel runs through the membrane, connecting both parts of the reservoir. The device further includes: an ionic solution filling the reservoir and the nanochannel; a drain electrode; a source electrode; and voltages applied to the electrodes (a voltage between the source and drain electrodes and a voltage on the gate) for turning on an ionic current through the ionic channel wherein the voltage on the gate gates the transportation of ions through the ionic channel.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hongbo Peng, Stanislav Polonsky, Stephen M. Rossnagel, Gustavo Alejandro Stolovitzky
  • Publication number: 20130341185
    Abstract: The present invention relates to a method for fabricating a semiconductor device for stimulation and/or data recording of biological material to a such semiconductor device. The method comprises providing a semiconductor substrate comprising a first insulating layer; providing a patterned conductive layer on top of the first insulating layer; depositing and patterning a second insulating layer atop the patterned conductive layer; growing carbon nano-sheets atop the second insulating layer; and defining carbon nano-sheet electrode areas on the second insulating layer by etching away the carbon nano-sheets outside of the carbon nano-sheet electrode areas.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 26, 2013
    Inventors: Nadine Collaert, Daire J. Cott, Michael De Volder
  • Publication number: 20130341734
    Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a plurality of sensing electrodes (34) over said substrate, each sensing electrode being electrically connected to at least one of said circuit elements; and a plurality of wells (50) for receiving a sample, each sensing electrode defining the bottom of one of said wells, wherein each sensing electrode comprises at least one portion (34?) extending upwardly into said well. A method of manufacturing such an IC is also disclosed.
    Type: Application
    Filed: June 21, 2013
    Publication date: December 26, 2013
    Inventor: Matthias Merz
  • Publication number: 20130334579
    Abstract: A manufacturing method of an electrochemical sensor comprises forming a graphene layer on a donor substrate, laminating a film of dry photoresist on the graphene layer, removing the donor substrate to obtain an intermediate structure comprising the film of dry photoresist and the graphene layer, and laminating the intermediate structure onto a final substrate with the graphene layer in electrical contact with first and second electrodes positioned on the final substrate. The film of dry photoresist is then patterned to form a microfluidic structure on the graphene layer and an additional dry photoresist layer is laminated over the structure. In one type of sensor manufactured by this process, the graphene layer acts as a channel region of a field-effect transistor, whose conductive properties vary according to characteristics of an analyte introduced into the microfluidic structure.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 19, 2013
    Inventors: Corrado Accardi, Stella Loverso, Sebastiano Ravesi, Noemi Graziana Sparta
  • Publication number: 20130334619
    Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a metallization stack (30) over said substrate for providing interconnections to at least some of said circuit elements, the metallization stack comprising a plurality of patterned metal layers (31) spatially separated from each other by respective electrically insulating layers (32), at least some of said electrically insulating layers comprising conductive portions (33) that electrically interconnect portions of adjacent metal layers, wherein at least one of the patterned metallization layers comprises a plurality of ion-sensitive electrodes (34), each ion-sensitive electrode being electrically connected to at least one of said circuit elements, a plurality of sample volumes (50) extending into said metallization stack, each sample volume terminating at one of said ion-sensitive electrodes; and an ion-sensitive layer lining at least the ion-sensitive electrodes in said sample volumes.
    Type: Application
    Filed: June 18, 2013
    Publication date: December 19, 2013
    Inventors: Matthias Merz, Casper Juffermans, Axel Nackaerts
  • Publication number: 20130334061
    Abstract: A Sensor for sensing the presence of at least one fluidum in a space adjoining the sensor is disclosed. In one aspect, the sensor has a two-dimensional electron gas (2DEG) layer stack, a gate electrode overlaying at least part of the 2DEG layer stack for electrostatically controlling electron density of a 2DEG in the 2DEG layer stack and a source and a drain electrode contacting the 2DEG layer stack for electrically contacting the 2DEG, wherein a detection opening is provided in between the gate electrode and the 2DEG layer stack and wherein the detection opening communicates with the space through a detection opening inlet such that molecules of the fluidum can move from the adjoining space through the detection opening inlet into the detection opening where they can measurably alter a electric characteristic of the 2DEG.
    Type: Application
    Filed: June 4, 2013
    Publication date: December 19, 2013
    Inventors: Peter Offermans, Roman Vitushinsky, Mercedes Crego Calama, Sywert Brongersma
  • Publication number: 20130313569
    Abstract: A technique capable of realizing a semiconductor gas sensor having a high rising response speed is provided. A gate insulating film (e.g., a SiO2 film) is formed on a Si layer, and a modified TiOx (a TiOx nanocrystal) film is formed on the gate insulating film. Further, on the modified TiOx film, a Pt film is formed. This Pt film is composed of a plurality of Pt crystal grains, and in a crystal grain boundary gap existing among the plurality of Pt crystal grains, Ti and oxygen (O) are present, and particularly, a TiOx nanocrystal is formed on a surface in the vicinity of a grain boundary triple point as the center.
    Type: Application
    Filed: April 25, 2013
    Publication date: November 28, 2013
    Applicant: Hitachi, Ltd.
    Inventor: Toshiyuki USAGAWA
  • Publication number: 20130315782
    Abstract: A biochip comprising a plastic substrate, an IC chip, and a sealing cover is disclosed in this invention. The plastic substrate combines the function of sample inlet area, separating structure, micro-fluidic channel, flow resistor, detection area, and capillary pump or suction area. Sealing the plastic substrate with porous cover could make the structure of micro-fluidic to form the capillary effect or degas-driven effect, and drive the sample naturally without extra pump. The detection area is constituted by the IC chip which is embedded into the plastic substrate, and the IC chip includes the amplifier circuit and detection structure. In the detection area, there uses the biological specific conjugates to catch the bio-particles, nano-particles, or macromolecule sensitively. And finally, transfer the detected electric signal to a mobile communication device.
    Type: Application
    Filed: November 8, 2012
    Publication date: November 28, 2013
    Inventor: JUNG-TANG HUANG
  • Patent number: 8592814
    Abstract: Disclosed is a semiconductor device which consumes low power and has high reliability and tolerance for electrostatic discharge. The semiconductor device includes, over a first substrate, a pixel portion and a driver circuit portion both of which have a thin film transistor having an oxide semiconductor layer. The semiconductor device further possesses a second substrate to which a first counter electrode layer and a second counter electrode layer are provided, and a liquid crystal layer is interposed between the first and second substrates. The first and second counter electrode layers are provided over the pixel portion and the driver circuit portion, respectively, and the second counter electrode layer has the same potential as the first counter electrode layer.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: November 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideaki Shishido
  • Publication number: 20130306934
    Abstract: The present invention relates to a horizontal biosensor, comprising a reduced graphene oxide layer formed on a substrate; a molecular linker formed on the reduced graphene oxide layer; and a metal nanoparticle layer formed on the molecular linker.
    Type: Application
    Filed: August 13, 2012
    Publication date: November 21, 2013
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventor: Hyoyoung LEE
  • Patent number: 8586394
    Abstract: A method of making a sub-miniature “micro-chip” oxygen sensor is provided where multiple sensor elements are applied to a dielectric ceramic substrate consisting of a heater pattern, followed by a dielectric layer. Intermeshing electrodes are then applied either over the heater pattern/dielectric layers or on the opposite side of the substrate. The space between the intermeshing electrodes is filled with an n-type or p-type high temperature semiconductor which is covered by a porous protection layer. After singulation (dicing), the sensor element is assembled having conductors applied to the contact pads on the element and is packaged in an assembly for introduction to the exhaust stream of a combustion process. A large step-wise change in the resistance of the element takes place as a result of changes in oxygen content in the exhaust whereby one can determine if the exhaust is rich or lean for use in an engine management or combustion management systems for emissions control.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: November 19, 2013
    Assignee: Kerdea Technologies, Inc.
    Inventor: Ken E. Fosaaen
  • Patent number: 8587040
    Abstract: A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 19, 2013
    Assignee: Sony Corporation
    Inventors: Shoji Kobayashi, Yoshiharu Kudoh, Takuya Sano
  • Publication number: 20130302932
    Abstract: Methods and apparatus relating to FET arrays for monitoring chemical and/or biological reactions such as nucleic acid sequencing-by-synthesis reactions. Some methods provided herein relate to improving signal (and also signal to noise ratio) from released hydrogen ions during nucleic acid sequencing reactions.
    Type: Application
    Filed: September 5, 2012
    Publication date: November 14, 2013
    Applicant: LIFE TECHNOLOGIES CORPORATION
    Inventors: James Bustillo, Jonathan SCHULTZ, Todd Rearick, Mark Milgrew
  • Patent number: 8573030
    Abstract: Embodiments of the present disclosure provide for methods of selecting a nanostructured deposit for a conductometric gas sensor, methods of detecting a gas based on the acidic or basic characteristic of the gas using a conductometric gas sensor, devices including conductometric gas sensors, arrays of conductometric gas sensors, methods of determining the acidic or basic characteristic of a gas, methods of treating a sensor, and the like.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: November 5, 2013
    Assignee: Georgia Tech Research Corporation
    Inventor: James L. Gole
  • Patent number: 8574942
    Abstract: A method of preparing a silicon nanowire and a method of fabricating a lithium secondary battery including the silicon nanowire are provided. The method of preparing a silicon nanowire may include forming a catalyst layer including metal particles separated from one another on a silicon layer, selectively etching the silicon layer contacting the metal particles, and removing the metal particles.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: November 5, 2013
    Assignee: Unist Academy-Industry Research Corporation
    Inventors: Soojin Park, Byoungman Bang, Jung-Pil Lee, Hyun-Kon Song, Jaephil Cho
  • Publication number: 20130288417
    Abstract: Semiconductor devices having integrated nanochannels confined by nanometer spaced electrodes, and VLSI (very large scale integration) planar fabrication methods for making the devices. A semiconductor device includes a bulk substrate and a first metal layer formed on the bulk substrate, wherein the first metal layer comprises a first electrode. A nanochannel is formed over the first metal layer, and extends in a longitudinal direction in parallel with a plane of the bulk substrate. A second metal layer is formed over the nanochannel, wherein the second metal layer comprises a second electrode. A top wall of the nanochannel is defined at least in part by a surface of the second electrode and a bottom wall of the nanochannel is defined by a surface of the first electrode.
    Type: Application
    Filed: June 27, 2013
    Publication date: October 31, 2013
    Inventors: Stefan Harrer, Stanislav Polonsky, Mark B. Ketchen, John A. Ott
  • Patent number: 8558288
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
  • Publication number: 20130264660
    Abstract: At least two separate single-crystal silicon layers are formed in a micromechanical substrate which has a diaphragm in a partial region. The diaphragm has a thickness of less than 20 ?m and includes part of a first of the single-crystal silicon layers. The substrate construction also includes a heating element configured to generate a temperature of more than 650° C. in at least part of the diaphragm. The substrate includes at least one diffusion barrier layer that reduces the oxidation of the first single-crystal silicon layer.
    Type: Application
    Filed: May 23, 2011
    Publication date: October 10, 2013
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Maximilian Fleischer, Oliver Freudenberg, Harry Hedler, Markus Schieber, Manfred Schreiner, Karl Weidner, Kerstin Wiesner, Jörg Zapf
  • Publication number: 20130265031
    Abstract: A nanogap sensor includes a first layer in which a micropore is formed; a graphene sheet disposed on the first layer and including a nanoelectrode region in which a nanogap is formed, the nanogap aligned with the micropore; a first electrode formed on the grapheme sheet; and a second electrode formed on the graphene sheet, wherein the first electrode and the second electrode are connected to respective ends of the nanoelectrode region.
    Type: Application
    Filed: September 6, 2012
    Publication date: October 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeo-young SHIM, Tae-han JEON, Kun-sun EOM, Dong-ho LEE, Hee-jeong JEONG, Seong-ho CHO
  • Patent number: 8551798
    Abstract: The present disclosure provides a microstructure device with an enhanced anchor and a narrow air gap. One embodiment of a microstructure device provided herein includes a layered wafer. The layered wafer includes a silicon handle layer, a buried oxide layer formed on the handle layer, and a silicon device layer formed on the buried oxide layer. A top oxide layer is formed on the device layer. The top oxide layer, the device layer, and the buried oxide layer are etched, thereby forming trenches to create an anchor and a microstructure device in the device layer. In process of fabricating the device, a thermal oxide layer is formed along sides of the microstructure device to enclose the microstructure device in the buried oxide layer, the top oxide layer and the thermal oxide layer. Then, a poly layer if formed to fill in the trenches and enclose the anchor. After the poly layer fills in the trenches, the oxide layers enclosing the microstructure device are etched away, releasing the microstructure device.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: October 8, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hsien Lin, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 8552748
    Abstract: A device for detecting and/or quantifying organophosphorus compounds, including an electrical device including a source electrode and a drain electrode separated by a semiconductive material, characterized in that at least one receptor molecule, including a group R and a primary alcohol in spatial proximity to a tertiary amine, with which the primary alcohol is capable of reacting in the presence of an organophosphorus compound, is grafted, by the group R, onto one of the electrodes or onto the semiconductive material, and a device for detecting the variation in positive charges between the two electrodes.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: October 8, 2013
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Jean-Pierre Simonato, Alexandre Carella
  • Publication number: 20130256825
    Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a thermal conductivity based gas sensor having an electrically resistive sensor element located on the major surface for exposure to a gas to be sensed. The integrated circuit further includes a barrier located on the major surface for inhibiting a flow of the gas across the sensor element.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: NXP B.V.
    Inventors: Aurelie HUMBERT, Roel DAAMEN, Viet Hoang NGUYEN
  • Patent number: 8546168
    Abstract: A system and method employing at least one semiconductor device, or an arrangement of insulating and metal layers, having at least one detecting region which can include, for example, a recess or opening therein, for detecting a charge representative of a component of a polymer, such as a nucleic acid strand proximate to the detecting region, and a method for manufacturing such a semiconductor device. The system and method can thus be used for sequencing individual nucleotides or bases of ribonucleic acid (RNA) or deoxyribonucleic acid (DNA). The semiconductor device includes at least two doped regions, such as two n-typed regions implanted in a p-typed semiconductor layer or two p-typed regions implanted in an n-typed semiconductor layer. The detecting region permits a current to pass between the two doped regions in response to the presence of the component of the polymer.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: October 1, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jon Sauer, Bart van Zeghbroeck
  • Patent number: 8535512
    Abstract: Methods and devices for sequencing nucleic acids are disclosed herein. Devices are also provided herein for measuring DNA with nano-pores sized to allow DNA to pass through the nano-pore. The capacitance can be measured for the DNA molecule passing through the nano-pore. The capacitance measurements can be correlated to determine the sequence of base pairs passing through the nano-pore to sequence the DNA.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: September 17, 2013
    Assignee: California Institute of Technology
    Inventors: Sameer Walavalkar, Axel Scherer, Thomas A. Tombrello, Aditya Rajagopal, Andrew P. Homyk, Erika Garcia
  • Patent number: 8535967
    Abstract: A method for etching a diaphragm pressure sensor based on a hybrid anisotropic etching process. A substrate with an epitaxial etch stop layer can be etched utilizing an etching process in order to form a diaphragm at a selective portion of the substrate. The diaphragm can be oriented at an angle (e.g., 45 degree) with respect to the substrate in order to avoid an uncertain beveled portion in a stress/strain field of the diaphragm. The diaphragm can be further etched utilizing an etch finishing process to create an anisotropic edge portion on the major areas of the diaphragm and optimize the thickness and size of the diaphragm. Such an approach provides an enhanced diaphragm structure with respect to a wide range of pressure sensor applications.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: September 17, 2013
    Assignee: Honeywell International Inc.
    Inventor: Robert Higashi
  • Publication number: 20130236988
    Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 12, 2013
    Applicant: MCube, Inc.
    Inventors: Sudheer S. Sridharamurthy, Te-Hse Terrence Lee, Ali J. Rastegar, Mugurel Stancu, Xiao Charles Yang
  • Patent number: 8525340
    Abstract: A packaged electronic device includes a flexible circuit structure and a die. The flexible circuit structure includes a first structural layer and electrical conductors. The die is bonded to the flexible circuit structure by a flexible attachment layer. The die includes interconnects in electrical contact with die circuitry and extending through the die, through the flexible attachment layer, and into electrical contact with respective electrical conductors at first ends. A flexible second structural layer is disposed on the die and exposed portions of the electrical conductors, wherein the die and the electrical conductors are encapsulated by the first structural layer and the second structural layer. The first structural layer and/or the second structural layer include a plurality of openings defining respective exposed areas on the electrical conductors at second ends.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: September 3, 2013
    Assignee: Premitec, Inc.
    Inventors: Helmut Eckhardt, Stefan Ufer
  • Patent number: 8525237
    Abstract: Grafting M13 bacteriophage into an array of poly(3,4-ethylenedioxythiophene) (PEDOT) nanowires generated hybrids of conducting polymers and replicable genetic packages (rgps) such as viruses. The incorporation of rgps into the polymeric backbone of PEDOT occurs during electropolymerization via lithographically patterned nanowire electrodeposition (LPNE). The resultant arrays of rgps-PEDOT nanowires enable real-time, reagent-free electrochemical biosensing of analytes in physiologically relevant buffers.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: September 3, 2013
    Assignee: The Regents of the University of California
    Inventors: Gregory A. Weiss, Reginald M. Penner, Jessica A. Arter, David K. Taggart, Keith C. Donavan
  • Patent number: 8519447
    Abstract: An ion sensitive sensor having an EIS structure, including: a semiconductor substrate, on which a layer of a substrate oxides is produced; an adapting or matching layer, which is prepared on the substrate oxide; a chemically stable, intermediate insulator, which is deposited on the adapting or matching layer; and an ion sensitive, sensor layer, which is applied on the intermediate insulator. The adapting or matching layer differs from the intermediate insulator and the substrate oxide in its chemical composition and/or structure. The adapting or matching layer and the ion sensitive, sensor layer each have an electrical conductivity greater than that of the intermediate insulator. There is an electrically conductive connection between the adapting or matching layer and the ion sensitive, sensor layer.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 27, 2013
    Assignee: Endress + Hauser Conducta Gesellschaft für Mess- und Regeltechnik mbH + Co. KG
    Inventor: Hendrik Zeun
  • Publication number: 20130213823
    Abstract: A diamond electrode and a diamond microelectrode array for biosensors and electroanalytical applications, such as electrochemical impedance spectroscopy (EIS), are disclosed. The electrode comprises a layer of ultra-smooth conductive nanocrystalline diamond (NCD) having a resistivity of >0.05 ?cm and a surface roughness of <20 nm Ra. Preferably, the diamond layer comprises boron or nitrogen-doped ultrananocrystalline diamond (UNCD) having an average grain size <10 nm and a surface roughness <10 nm Ra. It may be patterned to define a microelectrode array with a plurality of individually addressable electrodes, each having a diameter in the range from 100 nm to 100 ?m. The surface of each microelectrode is hydrogen-terminated before bio-functionalization, i.e. modifying with sensing molecules for detection of a specific biological or chemical target and coating with a blocker for reducing non-specific binding.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 22, 2013
    Applicant: Advanced Diamond Technologies, Inc.
    Inventor: Advanced Diamond Technologies, Inc.
  • Publication number: 20130214332
    Abstract: A transistor includes a source region, a drain region, and a nanogrid channel connecting the source and drain regions. The nanogrid channel includes first and second vertical channel regions connecting the source and drain regions. The first and second vertical channel regions have a space therebetween. A cross member extends from the first vertical channel region into the space.
    Type: Application
    Filed: August 21, 2012
    Publication date: August 22, 2013
    Applicant: Diagtronix, Inc.
    Inventor: Qiang Wu
  • Publication number: 20130207204
    Abstract: A method of forming a biosensor chip enables a bond pad and detector electrode to be formed of different materials (one is formed of a connection layer such as copper and the other is formed of a diffusion barrier layer such as tantalum or tantalum nitride). A single planarizing operation is used for both the bond pad and the detector electrode. By using the same processing, resist patterning on an already-planarized surface is avoided, and the cleanliness of both the bond pad and detector electrode is ensured. Self-aligned nanoelectrodes and bond pads are obtained.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: NXP B.V.
    Inventor: Frans Widdershoven
  • Publication number: 20130207206
    Abstract: A method of manufacturing a biosensor semiconductor device in which copper electrodes at a major surface of the device are modified to form Au—Cu alloy electrodes. Such modification is effected by depositing a gold layer over the device, and then thermally treating the device to promote interdiffusion between the gold and the electrode copper. Alloyed gold-copper is removed from the surface of the device, leaving the exposed electrodes. The electrodes are better compatible with further processing into a biosensor device than is the case with conventional copper electrodes, and the process windows are wider than for gold capped copper electrodes. A biosensor semiconductor device having Au—Cu alloy electrodes is also disclosed.
    Type: Application
    Filed: August 7, 2012
    Publication date: August 15, 2013
    Applicant: NXP B.V.
    Inventors: David VAN STEENWINCKEL, Thomas MERELLE, Franciscus Petrus WIDDERSHOVEN, Viet Hoang NGUYEN, Dimitri SOCCOl, Jan Leo Dominique FRANSAER
  • Publication number: 20130210641
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Application
    Filed: March 11, 2013
    Publication date: August 15, 2013
    Applicant: Life Technologies Corporation
    Inventor: Life Technologies Corporation
  • Publication number: 20130207205
    Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 15, 2013
    Applicant: GENIA TECHNOLOGIES, INC.
    Inventor: Roger Chen
  • Publication number: 20130210182
    Abstract: Methods and apparatus relating to FET arrays for monitoring chemical and/or biological reactions such as nucleic acid sequencing-by-synthesis reactions. Some methods provided herein relate to improving signal (and also signal to noise ratio) from released hydrogen ions during nucleic acid sequencing reactions.
    Type: Application
    Filed: March 12, 2013
    Publication date: August 15, 2013
    Applicant: LIFE TECHNOLOGIES CORPORATION
    Inventor: Life Technologies Corporation
  • Publication number: 20130209991
    Abstract: Sensors based on single-walled carbon nanotubes (SWNT) are integrated into a microfluidic system outfitted with data processing and wireless transmission capability. The sensors combine the sensitivity, specificity, and miniature size of SWNT-based nanosensors with the flexible fluid handling power of microfluidic “lab on a chip” analytical systems. Methods of integrating the SWNT-based sensor into a microfluidic system are compatible with the delicate nature of the SWNT sensor elements. The sensor devices are capable of continuously and autonomously monitoring and analyzing liquid samples in remote locations, and are applicable to real time water quality monitoring and monitoring of fluids in living systems and environments. The sensor devices and fabrication methods of the invention constitute a platform technology, because the devices can be designed to specifically detect a large number of distinct chemical agents based on the functionalization of the SWNT.
    Type: Application
    Filed: January 10, 2013
    Publication date: August 15, 2013
    Applicant: Northeastern University
    Inventor: Northeastern University
  • Publication number: 20130200437
    Abstract: Provided is a method of forming a nanogap pattern of a biosensor. First, an oxide layer is formed on a substrate and a first nitride layer is formed on the oxide layer. The first nitride layer is partially etched to form a first nitride layer pattern having a first gap that gradually narrows from a top portion to a bottom portion thereof and exposes the oxide layer. A second nitride layer is formed along the first nitride layer and along sidewalls and a bottom surface of the first gap. The second nitride layer is etched to form a second nitride layer pattern having a second gap narrower than the first gap on the sidewalls of the first gap. The oxide layer is etched by using the second nitride layer pattern as an etching mask to form an oxide layer pattern having a third gap, and thus, the nanogap pattern is completed.
    Type: Application
    Filed: October 18, 2011
    Publication date: August 8, 2013
    Applicant: MICOBIOMED CO., LTD.
    Inventor: Kwan Goo Rha
  • Publication number: 20130200438
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity. An amplification factor of the BioFET device may be provided by a difference in capacitances associated with the gate structure on the first surface and with the interface layer formed on the second surface.
    Type: Application
    Filed: March 14, 2013
    Publication date: August 8, 2013
    Inventor: Taiwan Semiconductor Manufacturing Company, Ltd.