Making Device Or Circuit Responsive To Nonelectrical Signal Patents (Class 438/48)
  • Patent number: 11114997
    Abstract: A bulk acoustic wave resonator includes a substrate, a seed layer disposed on the substrate, a first electrode disposed on the seed layer and including an aluminum alloy layer containing scandium (Sc), a piezoelectric layer disposed on the first electrode and including a layer having a cation (Al) polarity, and a second electrode disposed on the piezoelectric layer.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: September 7, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ran Hee Shin, Tae Kyung Lee, Sung Jun Lee, Hwa Sun Lee, Je Hong Kyoung, Sung Sun Kim, Jin Suk Son
  • Patent number: 11092471
    Abstract: The present disclosure resides in a sensor element for determining a physical, measured variable of a measured medium, comprising: a planar substrate; a functional layer applied on a surface of the substrate; a passivating layer applied on the functional layer; a metal connecting layer applied on the surface of the passivating layer such that the passivating layer is completely covered; and a metal platelet applied on the surface of the metal connecting layer such that no contact can occur between the passivating layer and the measured medium, as well as residing in a thermal flow sensor, which has at least two such sensor elements.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 17, 2021
    Assignee: Innovative Sensor Technology IST AG
    Inventors: Florian Krogmann, Patrik Grob, Barb Yannick
  • Patent number: 11092440
    Abstract: According to one embodiment, a method for controlling a vibration device includes a movable body capable of vibrating in a first direction, and a catch and release mechanism capable of catching the movable body that freely vibrates in the first direction, by an electrostatic attractive force, and releasing the caught movable body to freely vibrate the movable body in the first direction, wherein in a condition that tc is a time from a rise start time point to a rise end time point of an applied voltage for catching the movable body that freely vibrates in the first direction, by the electrostatic attractive force, and td is a period of the free vibration in the first direction of the movable body, the time tc is longer than the time td.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: August 17, 2021
    Assignee: KABUSHIKIKAISHA TOSHIBA
    Inventors: Ryunosuke Gando, Tamio Ikehashi, Etsuji Ogawa, Tetsuro Itakura, Yohei Hatakeyama, Yasushi Tomizawa
  • Patent number: 11086222
    Abstract: A method of manufacturing a semiconductor structure includes providing a substrate and a photoresist over the substrate; placing a mask over the photoresist; exposing the photoresist to a predetermined electromagnetic radiation through the mask; and removing at least a portion of the photoresist exposed to the predetermined electromagnetic radiation. The mask includes a first portion configured to totally allow the predetermined electromagnetic radiation passing through, a second portion configured to partially allow the predetermined electromagnetic radiation passing through, and a third portion configured to block the predetermined electromagnetic radiation, the second portion is disposed between the first portion and the third portion.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: August 10, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shing-Yih Shih, Yu-Mei Ni, Shih-Yi Liu
  • Patent number: 11078075
    Abstract: The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: August 3, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Chih-Ming Chen, Yuan-Chih Hsieh, Chung-Yi Yu
  • Patent number: 11022577
    Abstract: Methods for forming an electrode structure, which can be used as a biosensor, are provided in which the electrode structure has non-random topography located on one surface of an electrode base. In some embodiments, an electrode structure is obtained that contains no interface between the non-random topography of the electrode structure and the electrode base of the electrode structure. In other embodiments, electrode structures are obtained that have an interface between the non-random topography of the electrode structure and the electrode base of the electrode structure.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventor: Emily R. Kinser
  • Patent number: 10991612
    Abstract: A wafer has a first side with a device area comprising a plurality of devices, and a second side opposite to the first side, wherein the second side has a plurality of protrusions protruding along a thickness direction of the wafer. The wafer is processed by providing a protective film and a base sheet having a cushioning layer applied to a front surface thereof, and attaching a front surface of the protective film to the second side of the wafer. The protective film is adhered to at least a peripheral portion of the second side with an adhesive, and a back surface of the protective film opposite to the front surface thereof is attached to the cushioning layer. The protrusions are embedded in the cushioning layer and a back surface of the base sheet is substantially parallel to the first side of the wafer.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: April 27, 2021
    Assignee: DISCO CORPORATION
    Inventor: Karl Heinz Priewasser
  • Patent number: 10991581
    Abstract: A method for manufacturing a semiconductor film capable of forming a semiconductor film with high crystalline quality using a solid-state laser is provided. A method for manufacturing a semiconductor film according to the present disclosure includes the steps of (a) irradiating an amorphous semiconductor film with a first pulsed laser beam emitted from a solid-state laser, and then after the step (a), (b) irradiating the semiconductor film with a second pulsed laser beam including intensity lower than that of the first pulsed laser beam.
    Type: Grant
    Filed: February 29, 2020
    Date of Patent: April 27, 2021
    Assignee: THE JAPAN STEEL WORKS, LTD.
    Inventors: Naoyuki Kobayashi, Hiroaki Imamura
  • Patent number: 10985200
    Abstract: A method for producing an image sensor comprises: depositing a first back-end-of-line, BEOL, layer above a substrate comprising an array of light-detecting elements, said BEOL layer comprising metal wirings being arranged to form connections to components on the substrate and together with depositing the first BEOL layer, improving planarization of the first BEOL layer by depositing a planarizing metal dummy pattern in the first BEOL layer, wherein a part of the planarizing metal dummy pattern is arranged above a light-detecting element, wherein the planarizing metal dummy patterns is formed from the same material as the metal wirings and is deposited to planarize density of the metal deposited in the first BEOL layer across a surface of the layer and wherein a shape and/or position of the metal dummy pattern above the array of light-detecting elements is designed to provide a desired effect on incident light.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: April 20, 2021
    Assignee: IMEC VZW
    Inventors: Veronique Rochus, Xavier Rottenberg
  • Patent number: 10964851
    Abstract: A single light emitting diode (LED) structure includes an array of spaced discrete light emitting zones separated by isolation areas. Each emitting zone includes an epitaxial structure configured to emit an emitting light having a particular wavelength over an effective emission area. In addition, the effective emission area for each emitting zone can be geometrically defined and electrically configured to provide a desired light intensity. For example, each effective emission area can have a selected size and spacing depending on the application and light intensity requirements. Each emitting zone also includes a wavelength conversion member on its effective emission area configured to convert an emitting wavelength of the emitting light to a different color. The single (LED) structure can include multiple colors at different zones to produce a desired spectra or design.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: March 30, 2021
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, David Trung Doan
  • Patent number: 10948635
    Abstract: A light direction control film is provided. The light direction control film has, in a direction perpendicular to a thickness direction of the light direction control film, a refractive index decreasing from a central region of the light direction control film to each of both sides of the light direction control film gradually. A method for manufacturing a light direction control film and a fingerprint recognition panel including the light direction control film are further provided.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: March 16, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Jifeng Tan
  • Patent number: 10886444
    Abstract: A wafer-level process for manufacturing solid state lighting (“SSL”) devices using large-diameter preformed metal substrates is disclosed. A light emitting structure is formed on a growth substrate, and a preformed metal substrate is bonded to the light emitting structure opposite the growth substrate. The preformed metal substrate can be bonded to the light emitting structure via a metal-metal bond, such as a copper-copper bond, or with an inter-metallic compound bond.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: January 5, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Vladimir Odnoblyudov
  • Patent number: 10876997
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 29, 2020
    Inventors: Jui-Cheng Huang, Yi-Hsien Chang, Chin-Hua Wen, Chun-Ren Cheng, Shih-Fen Huang, Tung-Tsun Chen, Yu-Jie Huang, Ching-Hui Lin, Sean Cheng, Hector Chang
  • Patent number: 10843919
    Abstract: A MEMS apparatus with heater includes central part, periphery part, gap and first connecting part. Central part includes center of mass, heater and first joint. Heater is disposed inside central part. First joint is located on boundary of central part. Displacement of first joint is produced when central part is heated by heater. Periphery part surrounds central part. Gap surrounds central part, and is located between central part and periphery part. First connecting part connects central part and periphery part along first reference line and includes first inner connecting portion and first outer connecting portion. First inner connecting portion is connected to first joint. First outer connecting portion is connected to periphery part. First reference line passes through first joint, and first reference line is not parallel to line connecting center of mass and first joint.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: November 24, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Peng-Jen Chen, Bor-Shiun Lee, Chao-Ta Huang
  • Patent number: 10818611
    Abstract: Methods for compensating for bow in a semiconductor structure comprising an epitaxial layer grown on a semiconductor substrate. The methods include forming an adhesion layer on the backside of the wafer, and forming a stress compensation layer on the adhesion layer.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: October 27, 2020
    Assignee: II-VI Delaware, Inc.
    Inventors: Kevin Chi-Wen Chang, David Hensley, William Wilkinson
  • Patent number: 10794374
    Abstract: A microfabricated gas flow structure includes an array of vertical gas flow channels in a side-by-side parallel flow arrangement. Adjacent gas flow channels are separated by a thin wall having a thickness which can be an order of magnitude or more less than the channel width, offering exceptionally high area efficiency for the array. Channel walls can be formed from a dielectric material to provide the walls with sufficient integrity at nanoscale thicknesses and to provide thermal insulative properties in the lateral direction, thereby controlling power losses when the gas flow structure is employed as a Knudsen pump. The gas flow structure can be microfabricated as a monolithic structure from an SOI wafer, with the gas flow channels formed in the device layer and the heat sink formed from the handle layer.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: October 6, 2020
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Yogesh Gianchandani, Seungdo An, Yutao Qin
  • Patent number: 10777701
    Abstract: A photosensitive transistor device, on a semiconductor on insulator substrate, the photosensitive zone being formed in a substrate support layer and being arranged so that the concentration of photogenerated charges in the photosensitive zone can be increased towards a given zone facing the channel zone of the transistor.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: September 15, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lina Kadura, Laurent Grenouillet, Olivier Rozeau, Alexei Tchelnokov
  • Patent number: 10745268
    Abstract: The present disclosure relates to a MEMS apparatus with a patterned anti-stiction layer, and an associated method of formation. The MEMS apparatus has a handle substrate defining a first bonding face and a MEMS substrate having a MEMS device and defining a second bonding face. The handle substrate is bonded to the MEMS substrate through a bonding interface with the first bonding face toward the second bonding face. An anti-stiction layer is arranged between the first and the second bonding faces without residing over the bonding interface.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuei-Sung Chang, Fei-Lung Lai, Shang-Ying Tsai, Cheng Yu Hsieh
  • Patent number: 10697994
    Abstract: Techniques for compensating package stress of a proof mass are provided. In an example, a proof mass can be suspended from a substrate by a proof mass anchor. The first proof mass can have a major surface that defines a first plane. Portions of electrodes forming part of the proof mass can be symmetric with each other across a first line, wherein the first line bisects the first proof mass anchor, extends parallel to the first plane and extends between the first electrode and the second electrode.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 30, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Cenk Acar, Brenton Ross Simon, Sandipan Maity
  • Patent number: 10700660
    Abstract: A bulk acoustic wave (BAW) resonator includes: a substrate; an acoustic reflector disposed in the substrate; a first electrode disposed over the acoustic reflector; a second electrode; and a piezoelectric layer between the first and second electrodes. The second electrode is not disposed between the first electrode and the acoustic reflector. The BAW resonator further includes a block disposed over the substrate and beneath the piezoelectric layer. A contacting overlap of the acoustic reflector, the first electrode, the second electrode and the piezoelectric layer defines an active area of the BAW resonator.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: June 30, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: John Choy, Chris Feng, Phil Nikkel
  • Patent number: 10692753
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark D. Jaffe, Alvin J. Joseph, Qizhi Liu, Anthony K. Stamper
  • Patent number: 10634696
    Abstract: A multi-axis accelerometer may include a proof mass, a first electrode set, and a second electrode set. The first electrode set may detect acceleration along a second axis of the accelerometer, and may include a first electrode (C1) and a second electrode (C2). The second electrode set may detect acceleration along a first axis of the accelerometer that is orthogonal to the second axis, and may include a third electrode (C3) and a fourth electrode (C4). Application of a force along only the second axis may result in the exhibition of a non-zero change in differential capacitance between at least C1 and C2, but a zero net change in the differential capacitance between at least C3 and C4. As such, the accelerometer may exhibit little or no cross axis sensitivity in response to the applied force.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: April 28, 2020
    Assignee: Khalifa University of Science and Technology
    Inventors: Zakriya Mohammed, Waqas Amin Gill, Mahmoud Rasras
  • Patent number: 10566528
    Abstract: A radio frequency (RF) switch includes a heating element, a phase-change material (PCM) situated over the heating element, and PCM contacts situated over passive segments of the PCM. The heating element extends transverse to the PCM. The heating element can have a heater line underlying an active segment of the PCM. Alternatively, the heating element can have a split heater lines underlying an active segment of the PCM. The split heater lines increase an area of the active segment of the PCM and reduce a heater-to-PCM parasitic capacitance. A fan-out structure having fan-out metal can connect the heater line to a heater contact. The fan-out structure reduces heat generation outside the active segment of the PCM and reduces a heater contact-to-PCM parasitic capacitance. The fan-out structure can have dielectric segments interspersed between the fan-out metal to reduce dishing.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 18, 2020
    Assignee: Newport Fab, LLC
    Inventors: Nabil El-Hinnawy, Gregory P. Slovin, Michael J. DeBar, Jefferson E. Rose, David J. Howard
  • Patent number: 10566224
    Abstract: Methods, systems and devices for protecting partially processed electronic parts, are disclosed. In some embodiments, a method for protecting electronic parts includes applying a first protective sheet on one or more partially-processed semiconductor devices, removing the first protective sheet, and performing a semiconductor-processing operation on the one or more partially-processed semiconductor devices. In some embodiments, a semiconductor processing system for protecting electronic parts includes one or more partially-processed semiconductor devices, and a first protective sheet applied on the one or more partially-processed semiconductor devices, the first protective sheet being subsequently removed, and a semiconductor-processing operation being performed on the one or more partially-processed semiconductor devices.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: February 18, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventor: John D Steeves
  • Patent number: 10556792
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: February 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Patent number: 10510662
    Abstract: One illustrative method disclosed herein comprises forming a vertically oriented semiconductor (VOS) structure in a semiconductor substrate and performing a metal silicide formation process to convert at least a portion of the VOS structure into a metal silicide material, thereby forming a conductive silicide vertically oriented e-fuse.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: December 17, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Chun Yu Wong, Kwan-Yong Lim, Seong Yeol Mun, Jagar Singh, Hui Zang
  • Patent number: 10508051
    Abstract: There are provided a lens forming mold, and a manufacturing method for a cylindrical lens, with which cylindrical lenses having good mass productivity can be manufactured. A lens forming mold for forming a molding on which a plurality of cylindrical surfaces are arranged in parallel includes: a first mold including a plurality of cylindrical surface forming portions that are arranged in parallel at equal intervals; and a first flat surface forming portion that is provided between adjacent cylindrical surface forming portions; and a second mold that sandwiches the glass material and faces the first mold when the molding is molded, in which the second mold includes a second flat surface forming portion that faces the plurality of cylindrical surface forming portions and the first flat surface forming portion.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: December 17, 2019
    Assignee: FANUC CORPORATION
    Inventor: Risa Ito
  • Patent number: 10446697
    Abstract: A bifacial solar cell includes a substrate of an n-type; an emitter layer positioned on a first surface of the substrate; a plurality of first electrodes locally positioned on the emitter layer and electrically connected to the emitter layer; a first passivation layer positioned on the emitter layer; a silicon oxide layer formed at an interface between the first passivation layer and the emitter layer, the silicon oxide layer having a thickness of about 1 nm to 3 nm; a first anti-reflection layer positioned on the first passivation layer; a plurality of back surface field layers locally positioned on a second surface of the substrate; a plurality of second electrodes respectively positioned on the plurality of back surface field layers and electrically connected to the plurality of back surface field layers; and a second passivation layer positioned on the second surface of the substrate.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: October 15, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Changseo Park, Yoonsil Jin, Youngho Choe
  • Patent number: 10431624
    Abstract: A method of manufacturing an image sensor includes: preparing a sensor substrate including: a sensor layer including a photosensitive cell; and a signal line layer including lines to receive electric signals from the photosensitive cell; forming a first material layer having a first refractive index on the sensor substrate; and forming a nanopattern layer on the first material layer, the nanopattern layer including a material having a second refractive index different from the first refractive index.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: October 1, 2019
    Assignees: SAMSUNG ELECTRONICS CO., LTD., CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Seunghoon Han, Yongsung Kim, Seyedeh Mahsa Kamali, Amir Arbabi, Yu Horie, Andrei Faraon, Sungwoo Hwang
  • Patent number: 10418111
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a memory device including a plurality of memory blocks, the memory device configured to perform a read operation on a selected memory block among the plurality of memory blocks; and a memory controller for controlling the memory device to perform the read operation, wherein an Initial turn-on period of the read operation is controlled based on information on an erase number of source line sharing blocks of the selected memory block.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: September 17, 2019
    Assignee: SK hynix Inc.
    Inventor: Chi Wook An
  • Patent number: 10374114
    Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: August 6, 2019
    Assignee: ams AG
    Inventors: Jordi Teva, Frederic Roger, Ewald Stueckler, Stefan Jessenig, Rainer Minixhofer, Ewald Wachmann, Martin Schrems, Guenther Koppitsch
  • Patent number: 10338429
    Abstract: The present invention provides a method for manufacturing a quantum dot color filter, which uses a printing mold to pick up quantum dots and printing the quantum dots into a partially cured photoresist layer and then separates the quantum dots and the printing mold, followed by irradiation of UV light to completely cure the photoresist layer so that the quantum dots may uniformly distributed in the photoresist layer. This simplifies the process of transferring a quantum dot layer and reduces cost; requires no process of forming a sacrifice layer and no step of dissolving the sacrifice layer to prevent damage to the quantum dot layer; allows the quantum dots to be uniformly distributed in the photoresist layer to thereby improve the utilization of the quantum dots; and allows a quantum dot color filter so manufactured to be used with white backlighting or blue backlighting for achieving displaying of three primary colors of red, green, and blue.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: July 2, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Hongquan Wei
  • Patent number: 10310695
    Abstract: A sensor having a set of plates that are in contact from their bottom at the corners with a set of protrusions that are in contact from above with a plurality of intersections, each having a sensing element, of a grid of wires disposed on a base, and a top surface layer that is disposed atop the set of plates, so that force imparted from above onto the top surface layer is transmitted to the plates and then to the protrusions, and then to the intersections of the grid of wires which are thereby compressed between the base and protrusions; and that the protrusions above thereby focus the imparted force directly onto the intersections. A sensor includes a computer in communication with the grid which causes prompting signals to be sent to the grid and reconstructs a continuous position of force on the surface from interpolation based on data signals received from the grid. A method for sensing.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: June 4, 2019
    Assignees: Tactonic Technologies, LLC, New York University
    Inventors: Kenneth Perlin, Charles Hendee, Alex Grau, Gerald Seidman
  • Patent number: 10306372
    Abstract: The present invention provides a method for manufacturing a fully wafer-level-packaged MEMS microphone and a microphone manufactured with the same, the method comprises: separately manufacturing a first packaging wafer, an MEMS microphone wafer and a second packaging wafer; performing wafer-to-wafer bonding for the three wafers to form a plurality of fully wafer-level-packaged MEMS microphone units; singulating the fully wafer-level-packaged MEMS microphone units to form a plurality of fully wafer-level-packaged MEMS microphones, which are fully packaged at wafer level and do not need any further process after die singulation. The method can improve cost-effectiveness, performance consistency, manufacturability, quality, scaling capability of the packaged MEMS microphone.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: May 28, 2019
    Assignee: GOERTEK INC.
    Inventors: Quanbo Zou, Zhe Wang
  • Patent number: 10290670
    Abstract: A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: May 14, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yuanwei Zheng, Gang Chen, Duli Mao, Dyson H. Tai, Lequn Liu
  • Patent number: 10274450
    Abstract: A capacitive environmental sensor and a method for determining the presence of a target substance (e.g. water) using differential capacitive measurements. The sensor includes a semiconductor substrate having a surface. The sensor also includes a plurality of sensor electrodes located on the surface. The electrodes are laterally separated on the surface by intervening spaces. The sensor further includes a sensor layer covering the electrodes. The sensor layer has a permittivity that is sensitive to the presence of the target substance. The surface of the substrate, in a space separating at least one pair of electrodes, includes a recess. The surface of the substrate, in a space separating at least one pair of electrodes, does not include a recess. The sensor may be provided in a Radio Frequency Identification (RFID) tag. The sensor may be provided in a smart building.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: April 30, 2019
    Assignee: ams International AG
    Inventors: Hilco Suy, Zoran Zivkovic, Franciscus Petrus Widdershoven, Nebojsa Nenadovic
  • Patent number: 10257933
    Abstract: An electronic device including a transverse circuit board to route electrical traces is provided. In some embodiments, the electronic device includes: a housing; a first printed circuit board (PCB) that is fixed relative to the device housing; an integrated circuit that is connected to the first PCB; a second PCB that is situated in a transverse position relative to the first PCB, a plurality of electrical traces; and a securing component that secures the second PCB in the transverse position relative to the first PCB. Each respective electrical trace from the plurality of electrical traces includes: (i) a first portion that extends across the first PCB, between the integrated circuit and the second PCB, (ii) a second portion that extends across the second PCB, between the first PCB and either the first PCB or a third PCB, and (iii) a third portion that extends across either the first PCB or the third PCB, between the second PCB and a location other than the integrated circuit.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: April 9, 2019
    Assignee: Google LLC
    Inventors: Brian Jon Hassemer, Mark Daniel Janninck, David Kyungtag Lim
  • Patent number: 10211087
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: February 19, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark D. Jaffe, Alvin J. Joseph, Qizhi Liu, Anthony K. Stamper
  • Patent number: 10160633
    Abstract: A device includes a carrier having a plurality of cavities, a micro-electro-mechanical system (MEMS) substrate bonded on the carrier, wherein the MEMS substrate comprises a first side bonded on the carrier, a moving element over a bottom electrode, wherein the bottom electrode is formed of polysilicon and a second side having a plurality of bonding pads and a semiconductor substrate bonded on the MEMS substrate, wherein the semiconductor substrate comprises a top electrode and the first moving element is between the top electrode and the bottom electrode.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng, Te-Hao Lee, Chung-Hsien Lin
  • Patent number: 10157941
    Abstract: An image sensor and a fabrication method thereof are provided. In the fabrication method of the image sensor, at first, two isolation features are formed in a substrate to define a pixel region. Then, a floating node and a pinning layer are formed in one of the isolation features, in which a space region is located between the floating node and the pinning layer, and the floating node has a first conductivity type different from a second conductivity type of the pinning layer. Thereafter, a light-sensitive element is formed in the pixel region, and a transfer gate is formed on the pixel region, thereby forming a pixel. Since there is a space region located between the floating node and the pinning layer, a leakage path between the floating node and the pinning layer can be prevented.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Pin Cheng, Fu-Cheng Chang, Ching-Hung Kao, Che-Chun Lu
  • Patent number: 10093533
    Abstract: A sensor chip includes a first substrate with a first surface and a second surface including at least one CMOS circuit, a first MEMS substrate with a first surface and a second surface on opposing sides of the first MEMS substrate, a second substrate, a second MEMS substrate, and a third substrate including at least one CMOS circuit. The first surface of the first substrate is attached to a packaging substrate and the second surface of the first substrate is attached to the first surface of the first MEMS substrate. The second surface of the first MEMS substrate is attached to the second substrate. The first substrate, the first MEMS substrate, the second substrate and the packaging substrate are provided with electrical inter-connects.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: October 9, 2018
    Assignee: InvenSense, Inc.
    Inventors: Peter Smeys, Martin Lim
  • Patent number: 10017375
    Abstract: A method is provided for manufacturing a micromechanical component including a substrate and a cap connected to the substrate and together with the substrate enclosing a first cavity, a first pressure prevailing and a first gas mixture with a first chemical composition being enclosed in the first cavity. An access opening, connecting the first cavity to surroundings of the micromechanical component, is formed in the substrate or in the cap. The first pressure and/or the first chemical composition are adjusted in the first cavity. The access opening is sealed by introducing energy and heat into an absorbing part of the substrate or the cap with the aid of a laser. A recess is formed in a surface of the substrate or of the cap facing away from the first cavity in the area of the access opening for reducing local stresses occurring at a sealed access opening.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: July 10, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Frank Reichenbach, Till Schade, Jochen Reinmuth, Philip Kappe, Alexander Ilin, Mawuli Ametowobla, Julia Amthor
  • Patent number: 10019124
    Abstract: A touch window includes a substrate, a sensing electrode on the substrate, and a dummy electrode in the sensing electrode. The dummy electrode includes first to third dummy electrodes spaced apart from each other.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: July 10, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Gwan Youl Jung
  • Patent number: 10005662
    Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: June 26, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lee Alan Stringer, Mona Eissa, Byron J. R. Shulver, Sopa Chevacharoenkul, Mark R. Kimmich, Sudtida Lavangkul, Mark L. Jenson
  • Patent number: 9991301
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: June 5, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Patent number: 9972808
    Abstract: There is provided a display device including an element substrate that has a display area; and a counter substrate. When it is assumed that the length of the shortest edge of the display area is X1, the length of a longest diagonal line of the display area is X3, the thickness of the counter substrate is L1, the refraction index of the counter substrate is n1, the refractive index of the air is n2, and the minimum value of an angle, which is generated between a progress direction of light emitted from the organic EL elements and a normal vector direction is totally reflected in the surface, is ?, the relationship of X1/(2 tan ?)?L1?X3/(tan ?) is realized.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: May 15, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Koya Shiratori, Takeshi Koshihara
  • Patent number: 9954137
    Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: April 24, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: John J. Ellis-Monaghan, John C. S. Hall, Marwan H. Khater, Edward W. Kiewra, Steven M. Shank
  • Patent number: 9914637
    Abstract: According to one embodiment, an electronic device includes a base region, an element portion located on the base region, the element portion including a movable portion, and a protective film overlying the element portion and forming a cavity on an inner side of the protective film. The protective film includes a first protective layer and a second protective layer located on the first protective layer. A hole extends in a direction parallel to a main surface of the base region, and the second protective layer covers the hole.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: March 13, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Fujimoto, Naofumi Nakamura, Tamio Ikehashi
  • Patent number: 9854189
    Abstract: An imaging element includes a photoelectric conversion section and a wiring layer. The photoelectric conversion section is configured to photoelectrically convert light incident from a subject. The wiring layer is provided on an opposite side of the subject with respect to the photoelectric conversion section and includes a wire connected to an element that constitutes a pixel including the photoelectric conversion section. The wire includes a plurality of wires extending long in a predetermined direction. The plurality of wires are arranged in a direction almost perpendicular to the predetermined direction in the wiring layer. The wire is provided with a protrusion protruding in a direction different from the predetermined direction.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: December 26, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hideo Kido
  • Patent number: 9824882
    Abstract: A method for manufacturing a protective layer for protecting an intermediate structural layer against etching with hydrofluoric acid, the intermediate structural layer being made of a material that can be etched or damaged by hydrofluoric acid, the method comprising the steps of: forming a first layer of aluminum oxide, by atomic layer deposition, on the intermediate structural layer; performing a thermal crystallization process on the first layer of aluminum oxide to form a first intermediate protective layer; forming a second layer of aluminum oxide, by atomic layer deposition, above the first intermediate protective layer; and performing a thermal crystallization process on the second layer of aluminum oxide to form a second intermediate protective layer and thereby completing the formation of the protective layer. The method for forming the protective layer can be used, for example, during the manufacturing steps of an inertial sensor such as a gyroscope or an accelerometer.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: November 21, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Losa, Raffaella Pezzuto, Roberto Campedelli, Matteo Perletti, Luigi Esposito, Mikel Azpeitia Urquia