Abstract: According to one embodiment, a thermoelectric material are provided. The thermoelectric material includes a sintered body formed of p-type and n-type thermoelectric materials for the thermoelectric conversion element. The thermoelectric materials have a MgAgAs type crystal structure as a main phase. An area ratio of internal defects of the thermoelectric materials for one thermoelectric conversion element is 10% or less in terms of a total area ratio of defective portions in a scanning surface according to ultrasonic flaw detection in a thickness direction of the thermoelectric material. No defect having a length of 800 ?m or more is present at any vertex of chips of the thermoelectric materials.

Abstract: An infrared detector includes a pixel separation wall. The infrared detector includes a semiconductor crystal substrate; a first contact layer formed on the semiconductor crystal substrate, a pixel separation wall formed on the first contact layer and configured to separate pixels; a buffer layer formed on the first contact layer and on a side surface of the pixel separation wall in a region surrounded by the pixel separation wall, an infrared-absorbing layer formed on the buffer layer, a second contact layer formed on the infrared-absorbing layer, an upper electrode formed on the second contact layer, and a lower electrode formed on the first contact layer. The buffer layer and the first contact layer are formed of a compound semiconductor of a first conductivity type. The pixel separation wall and the second contact layer are formed of a compound semiconductor of a second conductivity type.

Abstract: With a method of manufacturing a thermoelectric conversion device, first via holes of a first insulator are filled with a first conductive paste. Third via holes of a second insulator are filled with a second conductive paste. Next, parts of the first conductive paste protruding from the first via holes of the first insulator are inserted into fourth via holes of the second insulator. Parts of the second conductive paste protruding from the third via holes of the second insulator are inserted into second via holes. Next, a rear surface protection member having rear surface wiring patterns, the second insulator, the first insulator, and a front surface protection member having front surface wiring patterns are arranged in this order to form a stacked body. Next, the stacked body is heated while being pressed in the stacking direction.

Abstract: A device includes a semiconductor substrate having a front surface and a back surface opposite the front surface. An insulation region extends from the front surface into the semiconductor substrate. An inter-layer dielectric (ILD) is over the insulation region. A landing pad extends from a top surface of the ILD into the insulation region. A through-substrate via (TSV) extends from the back surface of the semiconductor substrate to the landing pad.

Abstract: An electromechanical transducer of the present invention includes a first electrode, a vibrating membrane formed above the first electrode through a gap, a second electrode formed on the vibrating membrane, and an insulating protective layer formed on a surface of the second electrode side. A region where the protective layer is not formed is present on at least part of a surface of the vibrating membrane.

Abstract: Method of manufacturing sinterable electrical components for jointly sintering with active components, the components in planar shape being provided with at least one planar lower face meant for sintering, and an electrical contact area on the face opposite to the sintering face being available in the form of a metallic contact face, whose upper side is contactable by means of a commonly known method of the group: wire bonding or soldering or sintering or pressure contacting, the component being a temperature sensor, whose lower face is provided with a sinterable metallization on a ceramic body, said ceramic body having two electrical contact faces for continued electrical connection.

Abstract: The invention involves structure and fabrication method of a high performance IR detector. The structure comprises a substrate; a releasing barrier band on the substrate; a thermal isolation chamber constructed by the releasing barrier band; a black silicon-based IR absorber located right above the thermal isolation chamber and the black silicon-based IR absorber is set on the releasing barrier band; a number of thermocouples are set around the lateral sides of the black silicon-based IR absorber. The thermopiles around the black silicon-based IR absorber are electrically connected in series. The cold junctions of the thermopile are connected to the substrate through the first thermal-conductive-electrical-isolated structures as well as the heat conductor under the first thermal-conductive-electrical-isolated structures.

Abstract: Methods for packaging a functional chip, methods for annealing a functional chip, and chip assemblies. A functional chip and an annealing chip are located inside a package. The functional chip includes an integrated circuit. The annealing chip includes an annealing element source comprised of an annealing element or a light source configured to emit electromagnetic radiation. The integrated circuit of the functional chip receives the annealing element, electromagnetic radiation, or both from the annealing chip in order to perform an annealing procedure that extends the useful lifetime of the packaged integrated circuit.

Abstract: A single silicon wafer micromachined thermal conduction sensor is described. The sensor consists of a heat transfer cavity with a flat bottom and an arbitrary plane shape, which is created in a silicon substrate. A heated resistor with a temperature dependence resistance is deposed on a thin film bridge, which is the top of the cavity. A heat sink is the flat bottom of the cavity and parallel to the bridge completely. The heat transfer from the heated resistor to the heat sink is modulated by the change of the thermal conductivity of the gas or gas mixture filled in the cavity. This change can be measured to determine the composition concentration of the gas mixture or the pressure of the air in a vacuum system.

Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice.

Abstract: A method of protecting a substrate during fabrication of semiconductor, MEMS devices. The method includes application of a protective thin film which typically has a thickness ranging from 3 angstroms to about 1,000 angstroms, wherein precursor materials used to deposit the protective thin film are organic-based precursors which include at least one fluorine-comprising functional group at one end of a carbon back bone and at least one functional bonding group at the opposite end of a carbon backbone, and wherein the carbon backbone ranges in length from 4 carbons through about 12 carbons. In many applications at least a portion of the protective thin film is removed during fabrication of the devices.

Abstract: A light emitting diode assembly includes a base, a light emitting chip mounted on the base, an elastic lens covering the light emitting chip, two rotation members rotatably arranged on the base, and two stopper poles fixed on the base. The two rotation members are capable of driving the elastic lens to rotate with respect to the two stopper poles. The stopper poles compress the elastic lens to cause the elastic lens to deform resiliently when the elastic lens is rotated by the rotation members to engage with the stopper poles.

Abstract: A method of manufacturing a semiconductor device includes providing a wafer for supporting the semiconductor device. An insulation layer is disposed over a top surface of the wafer. The method includes forming a first interconnect structure over the top surface of the wafer with temperatures in excess of 200° C., forming a metal pillar over the wafer in electrical contact with the first interconnect structure, connecting a semiconductor component to the first interconnect structure, and forming encapsulant over the semiconductor component. The encapsulant is etched to expose a portion of the metal pillar. A buffer layer is optionally formed over the encapsulant. The method includes forming a second interconnect structure over the encapsulant in electrical contact with the metal pillar with temperatures below 200° C., and removing a portion of a backside of the wafer opposite the top surface of the wafer.

Abstract: Solid state thermoelectric energy conversion devices can provide electrical energy from heat flow, creating energy, or inversely, provide cooling through applying energy. Thick film methods are applied to fabricate thermoelectric device structures using microstructures formed through deposition and subsequent thermal processing conditions. An advantageous coincidence of material properties makes possible a wide variety of unique microstructures that are easily applied for the fabrication of device structures in general. As an example, a direct bond process is applied to fabricate thermoelectric semiconductor thick films on substrates by printing and subsequent thermal processing to form unique microstructures which can be densified. Bismuth and antimony are directly bonded to flexible nickel substrates.

Abstract: The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at least one surface zone of the metallic surface in which the metallic surface is to be electrically conductive bonded to a contact conductor. To fabricate the bond, a portion of a provided contact conductor above the surface zone is pressed on to the protective layer and the body so that the protective layer is destroyed above the surface zone in achieving an electrically conductive bond between the metallic surface and the contact conductor.

Abstract: A method of constructing devices using semiconductor manufacturing processes includes fabricating a device having a movable portion and a fixed portion. The movable portion is connected to the fixed portion only through at least one sacrificial layer. The sacrificial layer is removed in the presence of a force of sufficient strength so as to controllably reposition the movable portion during the release process. The force can be externally applied, generated locally as a result of, for example, the relative positions of the fixed and movable portions, or some combination of the two. Several devices constructed according to such a method are also disclosed.

Abstract: A resistive memory device and a method for manufacturing the same are provided. The resistive memory device includes a lower electrode, a variable resistive layer formed on the lower electrode and configured so that the volume thereof is contracted or expanded according to temperature, and an upper electrode formed on the variable resistive layer. At least a portion of the lower electrode is configured to be electrically connected to the upper electrode.

Abstract: This patent incorporates several new hybrid thermoelectric element and thermoelectric device designs that utilize additional electronic materials to enhance the flow of charges in the thermoelectric elements without changing thermoelectric nature of the thermoelectric material used. The thermoelectric device efficiency is thereby increased and cost and size are lowered. Thermoelectric conversion devices using the new design criteria have demonstrated comparative higher performance than current commercially available standard design thermoelectric conversion devices.

Abstract: Airflow measuring apparatus compring: sub-passage that takes in part of flow of fluid flowing through an intake pipe; sensor element that is disposed in the sub-passage to measure the flow of fluid; a circuit part that converts the flow of fluid detected by the sensor element into an electric signal; connector part connected to the circuit part to output a signal externally; and casing that supports the sensor element and the circuit part, the sensor element being disposed in the intake pipe. The sensor element includes a cavity disposed at a semiconductor substrate, a diaphragm including a thin film part that covers the cavity. The sensor element on a lead frame have surfaces that are mold-packaged with resin so that a diaphragm of the sensor element and part of the lead frame are exposed. One hole is disposed at the lead frame for communication between the cavity and exterior.

Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.

Abstract: A thermoelectric element module has P-type thermoelectric materials and N-type thermoelectric materials alternately joined between a pair of substrates. The thermoelectric materials include a thermoelectric mixture powder in which a thermoelectric material powder and a low-melting metal powder are mixed at a predetermined ratio. The thermoelectric mixture powder is thermally treated at a temperature lower than a melt point of the thermoelectric material, the thermoelectric mixture powder is formed as the low-melting metal is melted, and at the same time both ends of the thermoelectric materials are joined to the pair of substrates. A method for manufacturing such a thermoelectric material is also provided.

Abstract: A thermoelectric generator module for a wearable thermoelectric generator assembly may include a top heat coupling plate and a bottom heat coupling plate each having a head formed on an outer surface of the heat coupling plate and thermally conductive strips formed on an inner surface. At least one thermoelectric foil may be interposed between the top and bottom heat coupling plate. A perimeter band may circumscribe the perimeter edges of the top and bottom heat coupling plate and encapsulate the thermoelectric foil. The head of at least one of the top and bottom heat coupling plate may protrude beyond upper and/or lower surfaces of the perimeter band.

Abstract: A semiconductor element for a thermoelectric module has opposite ends and is made of an n-doped or p-doped semiconductor material and at least one foreign material. The foreign material is mixed with the semiconductor material and forms a fraction of 25 to 75 vol % of the semiconductor element. A method for producing a tubular thermoelectric module includes providing an inner tube having an axis, an inner circumferential surface and a first outer circumferential surface, alternately placing n-doped and p-doped semiconductor elements in direction of the axis, placing second electrical conducting elements radially outwardly of the semiconductor elements so that pairs of adjacent semiconductor elements are electrically conductively connected to each other at the outside to then form a second outer circumferential surface, and compressing the thermoelectric module. A motor vehicle having a thermoelectric module is also provided.

Abstract: A method for manufacturing an LED module includes following steps: providing a SMT (Surface Mount Technology) apparatus having a CCD (Charge-Coupled Device) image sensor and a nozzle, and providing a PCB and fixing the PCB in the SMT apparatus; providing a plurality of LEDs and mounting the LEDs on the PCB by the SMT apparatus; providing a plurality of lenses each having a plurality of patterned portions formed on an outer face of the lens, and the CCD image sensor imaging the lens and identifying the patterned portions, and then the SMT apparatus obtaining a location of the lens relative to the LED; positioning the lens on the PCB to cover the LED by the SMT apparatus; and fixing the lens on the PCB.

Abstract: A manufacturing method of an electronic component package, includes: forming electrode pads on a main surface of a first electronic component; forming first bonding wires shaped in loop so as to be electrically connected with the electrode pads and elongated upward from the electrode pads and such that both ends of the first bonding wires are on the electrode pad, respectively; forming a resin layer over the main surface of the first electronic component so as to embed the first bonding wires; removing the resin layer so as to expose ends of the first bonding wires from the resin layer and removing the end of each of the first bonding wires so that two wires are elongated from on each of the electrode pads; and forming a metallic layer on the surface of the resin layer after removing so that the first bonding wires are electrically connected with the metallic layer.

Abstract: A method for manufacturing a light emitting diode chip includes the following steps: providing an epitaxial structure having an epitaxial layer; forming a first electrode and a second electrode on the epitaxial layer; coating an inert layer on the epitaxial structure, the first electrode and the second electrode continuously; annealing the first electrode and the second electrode; and removing the inert layer coated on the first electrode and the second electrode to expose the first electrode and the second electrode.

Abstract: Disclosed are apparatus and methodology for constructing thermoelectric devices (TEDs). N-type elements are paired with P-type elements in an array of pairs between substrates. The paired elements are electrically connected in series by various techniques including brazing for hot side and/or also cold side connections, and soldering for cold side connections while being thermally connected in parallel. In selected embodiments, electrical and mechanical connections of the elements may be made solely by mechanical pressure.

Abstract: A method for the low-cost production of sheet-like thermocouples comprises the following steps: —providing an electrically and thermally conductive substrate having at least one clearance, which subdivides the substrate into substrate regions, —fitting thermolegs onto the substrate, wherein each thermoleg is connected to a region of the substrate on a hot side and on a cold side, —applying an encapsulation, so that at least each thermoleg is enclosed and the encapsulation enters into a material bond with the regions of the substrate, —separating parts of the substrate in such a way as to prevent a flow of electric current between the regions of the substrate through the at least one clearance. The invention also relates to a substrate that is suitable for carrying out the method and to a thermocouple that can be produced by the method.

Abstract: A semiconductor housing is provided that includes a metal support and a semiconductor body, a bottom side thereof being connected to the metal support. The semiconductor body has metal surfaces that are connected to pins by bond wires and a plastic compound, which completely surrounds the bond wires and partially surrounds the semiconductor body. The plastic compound has an opening on the top side of the semiconductor body, and a barrier is formed on the top side of the semiconductor body. The barrier has a top area and a base area spaced from the edges of the semiconductor body and an internal clearance of the barrier determines a size of the opening. Whereby, a portion of the plastic compound has a height greater than the barrier, and a fixing layer is formed between the base area of the barrier and the top side of the semiconductor body.

Abstract: Provided is a structure and disposing method of a radio frequency (RF) layered module using three dimensional (3D) vertical wiring. A first wafer in the RF layered module having the 3D vertical wiring may include a first RF device and at least one first via-hole. A second wafer may include a second RF device and at least one second via-hole disposed at a location corresponding to the at least one first via-hole. A vertical wiring may connect the at least one first via-hole and the at least one second via-hole. The vertical wiring may be configured to be connected to an external device through a bottom surface of the at least one first via-hole or a top surface of the at least one second via-hole.

Abstract: In a thermoelectric module consisting of p- and n-conducting thermoelectric material pieces which are alternately connected to one another via electrically conductive contacts, the thermoelectric module (19) is thermally conductively connected to a micro heat exchanger (13) which comprises a plurality of continuous channels having a diameter of at most 1 mm, through which a fluid heat exchanger medium can flow.

Abstract: An LED package with an extended top electrode and an extended bottom electrode is formed from a first metal and a second metal. An LED is on an inner end of the first metal. An outer end of the first metal has been bent upward twice 90 degrees to form a top flat as an extended top electrode of the package. An outer end of the second metal has been bent downward twice 90 degrees to form a bottom flat as an extended bottom electrode of the package. The LED and a bonding wire may be encapsulated with glue.

Abstract: The invention relates to a thermoelectric module, having an electric insulation, an electric conductor path, one surface of the electric conductor path being attached to a surface of the electrical insulation, and a thermoelectric material, one surface of the thermoelectric material being attached to another surface of the conductor path.

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming external interconnects having bases of a first thickness and tips of a second thickness extending inwardly directly toward each other; connecting a first circuit device between the tips; attaching a second circuit device to the first circuit device with a combined thickness of the first circuit device and the second circuit device less than the first thickness; and forming an encapsulation of the first thickness between the bases and over the tips.

Abstract: An apparatus is provided for bidirectional writing. A stack includes a reference layer on a tunnel barrier, the tunnel barrier on a free layer, and the free layer on a metal spacer. The apparatus includes an insulating magnet. A Peltier material is thermally coupled to the insulating magnet and the stack. When the Peltier/insulating magnet interface is cooled, the insulating magnet is configured to transfer a spin torque to rotate a magnetization of the free layer in a first direction. When the Peltier/insulating magnet interface is heated, the insulating magnet is configured to transfer the spin torque to rotate the magnetization of the free layer in a second direction.

Abstract: A semiconductor chip package structure for achieving flip-chip electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a first insulative layer, first conductive layers, a second insulative layer, and second conductive layers. The package unit has a receiving groove. The semiconductor chip is received in the receiving groove and has a plurality of conductive pads disposed on its top surface. The first insulative layer is formed between the conductive pads to insulate the conductive pads. The first conductive layers are formed on the first insulative layer and the package unit, and one side of each first conductive layer is electrically connected to the corresponding conductive pad. The second insulative layer is formed between the first conductive layers in order to insulate the first conductive layers from each other. The second conductive layers are respectively formed on the other opposite sides of the first conductive layers.

Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module includes a first semiconductor device, a frame arranged on the first semiconductor device, the frame including a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.

Abstract: A semiconductor module including a semiconductor chip having a light receiving device formed at a front thereof and a light permeable cover having a front, a back, and a side. The light permeable cover is disposed opposite to the front of the semiconductor chip such that the front of the semiconductor chip is covered by the back of the light permeable cover. The light permeable cover is provided at the outer circumferential region of the front thereof and at the side thereof with a light shielding layer. It is possible to prevent the incidence of unnecessary light from the side of the light permeable cover of a CSP and to easily adjust the distance between a lens and the front of the semiconductor chip within tolerance.

Abstract: The present disclosure provides various methods for removing an anti-stiction layer. An exemplary method includes forming an anti-stiction layer over a substrate, including over a first substrate region of a first material and a second substrate region of a second material, wherein the second material is different than the first material; and selectively removing the anti-stiction layer from the second substrate region of the second material without using a mask.

Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.

Abstract: A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.

Abstract: The invention relates to a method for production of at least one thermoelectric apparatus with the steps of: preparation of a first wafer (1) which is formed from a thermoelectric material of a first conductivity type; preparation of a second wafer which is formed from a thermoelectric material of a second conductivity type; structuring of the first wafer (1) so that a group of first thermoelectric structures (7) is produced; structuring of the second wafer so that a group of second thermoelectric structures is produced; and linking of the first to the second wafer in such a manner that the first and the second thermoelectric structures are electrically connected together and thus form the thermoelectric apparatus. According to the invention, before the structuring of the first wafer (1), a first contact material (3) is deposited on the first wafer (1) and/or before the structuring of the second wafer, a second contact material is deposited onto the second wafer.

Abstract: Disclosed is a method for testing multi-chip stacked packages. Initially, one or more substrate-less chip cubes are provided, each consisting of a plurality of chips such as chips stacked together having vertically connected with TSV's where there is a stacked gap between two adjacent chips. Next, the substrate-less chip cubes are adhered onto an adhesive tape where the adhesive tape is attached inside an opening of a tape carrier. Then, a filling encapsulant is formed on the adhesive tape to completely fill the chip stacked gaps. Next, the tape carrier is fixed on a wafer testing carrier in a manner to allow the substrate-less chip cubes to be loaded into a wafer tester without releasing from the adhesive tape. Accordingly, the probers of the wafer tester can be utilized to probe testing electrodes of the substrate-less chip cubes so that it is easy to integrate this testing method in TSV fabrication processes.

Abstract: A thermoelectric power generator (TEG) assembly and a method of fabrication are provided. The TEG assembly includes at least one thermoelectric (TE) module, a casing containing the at least one TE module, and at least one support fixture mechanically coupling the at least one TE module to the casing. The at least one support fixture is coupled to the at least one TE module. The at least one portion of the at least one TE module is configured to move relative to the casing in response to temperature-induced dimensional changes of at least a portion of the at least one TE module or at least a portion of the casing.

Abstract: A system includes a first plate and a second plate. The first plate is arranged to be thermally coupled to a first surface and the second plate is arranged to be thermally coupled to an environment. The environment has a temperature that is different than the first surface. The system also includes a thermoelectric device that includes a plurality of thermoelectric elements. The thermoelectric device includes a third plate coupled to the plurality of thermoelectric elements and thermally coupled to the first plate. The thermoelectric device also includes a fourth plate coupled to the plurality of thermoelectric elements and thermally coupled to the second plate. The system also includes a dielectric fluid arranged between the first plate and the second plate. The thermoelectric elements are submersed in the dielectric fluid.

Abstract: An example embodiment relates to a semiconductor device including a semiconductor package in which a semiconductor chip is mounted on the package substrate. The semiconductor package may include a temperature measurement device and a temperature control circuit. The temperature measurement device may measure a temperature of the semiconductor package. The temperature control circuit may change an operation speed of the semiconductor package on the basis of the temperature of the semiconductor package measured by the temperature measurement device.

Abstract: A capped integrated device includes a semiconductor chip, incorporating an integrated device and a protective cap, bonded to the semiconductor chip for protection of the integrated device by means of a bonding layer made of a bonding material. The bonding material forms anchorage elements within recesses, formed in at least one between the semiconductor chip and the protective cap.

Abstract: An apparatus and method for a wafer level vacuum package uncooled microbolometer focal plane array (FPA) on a wafer level substrate with a thin film getter-reflector (G-R). The G-R removes gas from the vacuum package and is reflective in the frequency band of the FPA. Sensor pixels are supported about a quarter-wavelength above the G-R which is within the perimeter of the imaging array. The package is evacuated through a single aperture, and vacuum is maintained for the lifetime of the FPA. Imaging sensor size is reduced while maintaining resolution by reducing non-imaging area.

Abstract: A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element.

Abstract: Method for assembling thermoelectric unicouples is provided and applied with silicon-based nanostructure thermoelectric legs. The method includes preparing and disposing both n-type and p-type thermoelectric material blocks in alternative columns on a first shunt material. The method includes a sequence of cutting processes to resize the thermoelectric material blocks to form multiple cingulated unicouples each having an n-type thermoelectric leg and a p-type thermoelectric leg bonded to a section of the first shunt material. Additionally, the method includes re-disposing these cingulated unicouples in a serial daisy chain configuration with a predetermined pitch distance and bonding a second shunt material on top. The method further includes performing additional cutting processes to form one or more parallel series of thermoelectric unicouples in daisy chain configuration. The first shunt material is coupled to a cold-side heat sink and the second shunt material is coupled to a hot-side heat sink.