Abstract: A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon. Base regions, emitter regions, and front surface field regions are formed through ion implantation and annealing processes.

Abstract: A dopant material is disclosed. The dopant material comprises a polycrystalline silicon and a dopant element in the polycrystalline silicon. A concentration of the dopant element is at least 1×1018 atoms/cm3 and no greater than 1×1020 atoms/cm3. A method for producing a dopant material is also disclosed. A fused mixture is generated by mixing and fusing a silicon material with an element that serves as the dopant source. A coagulate of the dopant material is generated by cooling and coagulating the fused mixture. A semiconductor substrate is disclosed. The semiconductor substrate comprises a semiconductor material to which the dopant material is added. A solar cell element comprising the semiconductor substrate, a first electrode, and a second electrode is disclosed. The semiconductor substrate comprises a first surface and a second surface corresponding to a rear surface of the first surface.

Abstract: A method of semiconductor junction formation in RTA process for fabrication of solar cells provides for delivery of inert gases in the vicinity of the Si wafer while dopant species are being driven form a dopant source into the surface of the wafer irradiated by a laser beam. The laser beam is emitted by CW- or pulsed operated lasers including fiber lasers operative to provide annealing and diffusion operation. Optionally, the passivation of the surface and formation of the antireflection coating are performed simultaneously with the penetration the dopant species.

Abstract: Method of producing a partly or completely semi-insulating or p-type doped ZnO substrate from an n-type doped ZnO substrate, in which the n-type doped ZnO substrate is brought into contact with an anhydrous molten salt chosen from anhydrous molten sodium nitrate, lithium nitrate, potassium nitrate and rubidium nitrate. Partly or completely semi-insulating or p-type doped ZnO substrate, said substrate being in particular in the form of a thin layer, film or in the form of nanowires; and said substrate being doped at the same time by an element chosen from Na, Li, K and Rb; by N; and by O; it being furthermore possible for ZnO or GaN to be epitaxially grown on this substrate. Electronic, optoelectronic or electro-optic device such as a light-emitting diode (LED) comprising this substrate.

Abstract: A method and apparatus for removing excess dopant from a doped substrate is provided. In one embodiment, a substrate is doped by surfaced deposition of dopant followed by formation of a capping layer and thermal diffusion drive-in. A reactive etchant mixture is provided to the process chamber, with optional plasma, to etch away the capping layer and form volatile compounds by reacting with excess dopant. In another embodiment, a substrate is doped by energetic implantation of dopant. A reactive gas mixture is provided to the process chamber, with optional plasma, to remove excess dopant adsorbed on the surface and high-concentration dopant near the surface by reacting with the dopant to form volatile compounds. The reactive gas mixture may be provided during thermal treatment, or it may be provided before or after at temperatures different from the thermal treatment temperature. The volatile compounds are removed.

Abstract: A method of semiconductor junction formation in Laser diffusion process for fabrication of solar cells provides for delivery of inert gases in the vicinity of the Si wafer while dopant species are being diffused form a dopant source into the surface of the wafer irradiated by a laser beam. The laser beam is emitted by CW- or pulsed operated lasers including fiber lasers. Optionally, the passivation of the surface and formation of the antireflection coating are performed simultaneously with the diffusion of the dopant species.

Abstract: A stack-type capacitor includes a lower electrode, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, wherein the lower electrode includes a first metal layer having a cylindrical shape and a second metal layer filled in the first metal layer. In the capacitor, an amount of oxygen included in the lower electrode is decreased to suppress oxidation of a TiN layer. Thus, a stable stack-type capacitor may be formed, which increases greatly the performance of highly integrated DRAMs.

Abstract: A method may include depositing a dielectric layer onto a substrate, removing portions of the dielectric layer to create a plurality of separated non-removed portions of the dielectric layer, depositing one or more passive electronic components into each of the plurality of separated non-removed portions, and curing the separated non-removed portions of the dielectric layer.

Abstract: A cane having optical properties includes: a core formed of a semiconductor material; and a transparent cladding formed of glass, glass-ceramic, or polymer coaxially oriented about the core, the cane may be used to produce a photovoltaic device, including: a semiconductor core including at least one p-n junction, defined by respective n-type and p-type regions; a substantially transparent cladding in coaxial relationship with the semiconductor core, forming a longitudinally oriented cane; and first and second electrodes, each being electrically coupled to a respective one of the n-type and p-type regions.

Abstract: A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron, the substrate including a first substrate surface with a first surface region and a second surface region. The method also includes depositing a first set of nanoparticles on the first surface region, the first set of nanoparticles including a first dopant. The method further includes heating the substrate in an inert ambient to a first temperature and for a first time period creating a first densified film, and further creating a first diffused region with a first diffusion depth in the substrate beneath the first surface region.

Abstract: Semiconductor wafer of monocrystalline silicon contain fluorine, the fluorine concentration being 1·1010 to 1·1016 atoms/cm3, and is free of agglomerated intrinsic point defects whose diameter is greater than or equal to a critical diameter. The semiconductor wafers are produced by providing a melt of silicon which is doped with fluorine, and crystallizing the melt to form a single crystal which contains fluorine within the range of 1·1010 to 1·1016 atoms/cm3, at a growth rate at which agglomerated intrinsic point defects having a critical diameter or larger would arise if fluorine were not present or present in too small an amount, and separating semiconductor wafers from the single crystal.

Abstract: The present invention provides a manufacturing method that allows a Group III nitride substrate with a low dislocation density to be manufactured, and a semiconductor device that is manufactured using the manufacturing method. The manufacturing method includes, in an atmosphere including nitrogen, allowing a Group III element and the nitrogen to react with each other in an alkali metal melt to cause generation and growth of Group III nitride crystals. In the manufacturing method, a plurality of portions of a Group III nitride semiconductor layer are prepared, selected as seed crystals, and used for at least one of the generation and the growth of the Group III nitride crystals, and then surfaces of the seed crystals are brought into contact with the alkali metal melt.

Abstract: A method of manufacturing a semiconductor device includes forming a layer over a substrate, and doping the layer with a dopant, after which the layer is laser thermal annealed. The layer can be a nitride, an oxide, or a polysilicon layer. The dopants can be arsenic, phosphorous, boron, or nitrogen. During the laser thermal annealing, certain portions of a surface of the semiconductor device are laser thermal annealed and other portions of a surface of the semiconductor device are not exposed. Also, the surface of the layer is smoother after the laser thermal annealing.

Abstract: The present invention provides a system and method for creating self-doping contacts to silicon devices in which the contact metal is coated with a layer of dopant and subjected to high temperature, thereby alloying the silver with the silicon and simultaneously doping the silicon substrate and forming a low-resistance ohmic contact to it. A self-doping negative contact may be formed from unalloyed silver which may be applied to the silicon substrate by either sputtering, screen printing a paste or evaporation. The silver is coated with a layer of dopant. Once applied, the silver, substrate and dopant are heated to a temperature above the Ag—Si eutectic temperature (but below the melting point of silicon). The silver liquefies more than a eutectic proportion of the silicon substrate. The temperature is then decreased towards the eutectic temperature.

Abstract: The present invention provides a system and method for creating self-doping contacts to silicon devices in which the contact metal is coated with a layer of dopant and subjected to high temperature, thereby alloying the silver with the silicon and simultaneously doping the silicon substrate and forming a low-resistance ohmic contact to it. A self-doping negative contact may be formed from unalloyed silver which may be applied to the silicon substrate by either sputtering, screen printing a paste or evaporation. The silver is coated with a layer of dopant. Once applied, the silver, substrate and dopant are heated to a temperature above the Ag—Si eutectic temperature (but below the melting point of silicon). The silver liquefies more than a eutectic proportion of the silicon substrate. The temperature is then decreased towards the eutectic temperature.

Abstract: The present invention provides a system and method for creating self-doping contacts to silicon devices in which the contact metal is coated with a layer of dopant and subjected to high temperature, thereby alloying the silver with the silicon and simultaneously doping the silicon substrate and forming a low-resistance ohmic contact to it. A self-doping negative contact may be formed from unalloyed silver which may be applied to the silicon substrate by either sputtering, screen printing a paste or evaporation. The silver is coated with a layer of dopant. Once applied, the silver, substrate and dopant are heated to a temperature above the Ag—Si eutectic temperature (but below the melting point of silicon). The silver liquefies more than a eutectic proportion of the silicon substrate. The temperature is then decreased towards the eutectic temperature.

Abstract: A method of forming a CMOS structure, the method including the acts of: forming a gate structure over a substrate layer; forming a silicide layer over the substrate layer; forming shallow source/drain areas in the substrate layer; forming an oxide diffusion barrier layer over the structure; forming a metal absorption layer over the oxide diffusion barrier layer; and melting portions of the substrate layer directly overlying the shallow source/drain areas, thereby transforming the shallow source/drain areas into shallow source/drain regions. The act of melting includes the act of exposing the metal absorption layer to pulsed laser beams.

Abstract: Extremely high dopant concentrations are uniformly introduced into a semiconductor material by laser annealing aided by an anti-reflective coating (ARC). A spin-on-glass (SOG) film containing dopant is formed on top of the semiconductor material. An ARC is then formed over the doped SOG layer. Application of radiation from an excimer laser to the ARC heats and melts the doped SOG film and the underlying semiconductor material. During this melting process, dopant from the SOG film diffuses uniformly within the semiconductor material. Upon removal of the laser radiation, the semiconductor material cools and crystallizes, evenly incorporating the diffused dopant within its lattice structure. The ARC suppresses reflection of the laser by the doped material, promoting efficient transfer of energy from the laser to heat and melt the underlying doped layer and semiconductor material.

Abstract: The invention relates to a method of iteratively, selectively tuning the impedance of integrated semiconductor devices, by modifying the dopant profile of a region of low dopant concentration by controlled diffusion of dopants from one or more adjacent regions of higher dopant concentration through the melting action of a focussed heating source, for example a laser. In particular the method is directed to increasing the dopant concentration of the region of lower dopant concentration, but may also be adapted to decrease the dopant concentration of the region.

Abstract: There are disclosed multi-crystalline silicon which is added with Ga (gallium) as a dopant and a method for producing Ga-doped multi-crystalline silicon, which comprises adding Ga to silicon melt in a crucible, which is melted by heating, and cooling the silicon melt to allow growth of multi-crystalline silicon. According to the present invention, there are provided multi-crystalline silicon and a multi-crystalline silicon wafer for producing solar cells showing stable conversion efficiency for light energy without causing photodegradation as well as methods for producing them.

Abstract: A method for forming a contact of a semiconductor device is described, in which a conductive layer pattern is electrically connected to a semiconductor substrate and an interlayer insulating film is formed on the semiconductor substrate including the conductive layer pattern. The interlayer insulating film is etched down to a top surface of the conductive layer pattern using a contact formation mask to form a contact hole. The conductive layer pattern is isotropically etched through the contact hole so as to extend the surface area of the exposed conductive layer pattern and the contact hole is filled with conductive material, forming a contact plug electrically connected to the conductive layer pattern. It is therefore possible to extend the contact area between the conductive layer pattern and a contact plug. As a result, the contact resistance is reduced.

Abstract: A dendritic web formation process and apparatus for diffusing dopant impurities into a growing dendritic crystal web to produce photovoltaic cells. A solid dopant diffusion source is arranged in a holder mounted in a vertical thermal element either within the melt furnace or outside the furnace adjacent the furnace exit port. The solid diffusion source is heated by thermal conduction from the vertical thermal element and source holder using the furnace heat as a source. Auxiliary heater coils are optionally provided around the vertical thermal element to control the temperature of the solid diffusion source. The source and holder can also be mounted outside the furnace adjacent the exit port and heated using a secondary rapid temperature external heater. The growing dendritic crystal web is exposed to the dopant impurities as part of the web growing process, eliminating the need for a separate diffusion gaseous station and processing.

Abstract: The present invention provides a surface modification method that provides beneficial changes in surface properties, can modify a surface to a greater depth than previous methods, and that is suitable for industrial application. The present method comprises applying a thin-film coating to a surface of a substrate, then subjecting the coated surface to an ion beam. The ion beam power pulse heats the coated surface, leading to alloying between the material in the coating and the material of the substrate. Rapid cooling of the alloyed layer after an ion beam pulse can lead to formation of metastable alloys and microstructures not accessible by conventional alloying methods or intense ion beam treatment of the substrate alone.

Abstract: A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.

Abstract: Pre-amorphization of a surface layer of crystalline silicon to an ultra-shallow (e.g., less than 100 nm) depth provides a solution to fabrication problems including (1) high thermal conduction in crystalline silicon and (2) shadowing and diffraction-interference effects by an already fabricated gate of a field-effect transistor on incident laser radiation. Such problems, in the past, have prevented prior-art projection gas immersion laser doping from being effectively employed in the fabrication of integrated circuits comprising MOS field-effect transistors employing 100 nm and shallower junction technology.

Abstract: A light-emitting diode having improved moisture resistance characteristics comprises a p-type gallium arsenide substrate and four epitaxial layers of Al.sub.x Ga.sub.1-x As (22, 23, 24 and 25). These epitaxial layers comprises an intervening layer (22) of p-type Al.sub.x Ga.sub.1-x As, a cladding layer (23) of p-type Al.sub.x2 Ga.sub.1-x2 As, an active layer (24) of Al.sub.x3 Ga.sub.1-x3 As, and a window layer (25) of Al.sub.x4 Ga.sub.1-x4 As so as to form a double-hetero structure, where x1, x2, x3 and x4 represent mixed crystal ratios of aluminum to arsenic of the layers, respectively, and meet the condition that:x2.gtoreq.x4>x1.gtoreq.x3 (0.ltoreq.x1, x2, x3, x4.ltoreq.1).

Abstract: A semiconductor substrate for GaP type light emitting devices which includes an n-type single crystal substrate, an n-type GaP layer, and a p-type GaP layer formed on the n-type GaP single crystal substrate. The carbon concentration in the n-type GaP single crystal substrate is more than 1.0.times.10.sup.16 atoms/cc but less than 1.0.times.10.sup.17 atoms/cc. The n-type GaP single crystal substrate is obtained from an n-type GaP single crystal grown by the Liquid Encapsulation Czochralski method wherein B.sub.2 O.sub.3 containing water corresponding to 200 ppm or more is used as an encapsulation liquid.

Abstract: A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.