Responsive To Corpuscular Radiation (e.g., Nuclear Particle Detector, Etc.) Patents (Class 438/56)
-
Publication number: 20110079728Abstract: A radiation detector is disclosed. The detector has an entrance opening etched through a low-resistivity volume of silicon, a sensitive volume of high-resistivity silicon for converting the radiation particles into detectable charges, and a passivation layer between the low and high-resistivity silicon layers. The detector also has electrodes built in the form of vertical channels for collecting the charges generated in the sensitive volume, and read-out electronics for generating signals based on the collected charges.Type: ApplicationFiled: June 4, 2010Publication date: April 7, 2011Applicants: FinPhys Oy, Consejo Superior de Investigaciones Cientificas (CSIC)Inventors: Francisco Garcia, Risto Orava, Manuel Lozano, Giulio Pellegrini
-
Patent number: 7910394Abstract: A method for forming a photodiode cathode in an integrated circuit imager includes defining and implanting a photodiode cathode region with a photodiode cathode implant dose of a dopant species and defining and implanting an edge region of the photodiode cathode region with a photodiode cathode edge implant dose of a dopant species to form a region of higher impurity concentration than the photodiode cathode impurity concentration.Type: GrantFiled: April 1, 2008Date of Patent: March 22, 2011Assignee: Foveon, Inc.Inventor: Maxim Ershov
-
Publication number: 20110049379Abstract: A neutron detector, or array of neutron detectors, and method for fabricating same, having active region comprised of inorganic materials such as semiconductors and/or small particles and/or molecules. The detector active region is comprised of a layer or multi-layer heterojunction structure such as p-n junction wherein at least one layer comprises a composite of host semiconductor material in which neutron sensitizing guest material is distributed in all directions throughout the host semiconductor. This composite layer contains neutron capturing atoms such as 10B, 6Li, 157Gd, 235U, 239Pu, 51V , and 103Rh. The semiconductor host and other semiconductor layers transports carriers excited as a result of neutron absorption in the detector active region.Type: ApplicationFiled: August 26, 2010Publication date: March 3, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventor: Daniel Moses
-
Patent number: 7875484Abstract: Monolithic IC/MEMS processes are disclosed in which high-stress silicon nitride is used as a mechanical material while amorphous silicon serves as a sacrificial layer. Electronic circuits and micro-electromechanical devices are built on separate areas of a single wafer. The sequence of IC and MEMS process steps is designed to prevent alteration of partially completed circuits and devices by subsequent high process temperatures.Type: GrantFiled: November 20, 2006Date of Patent: January 25, 2011Assignee: Alces Technology, Inc.Inventors: Richard Yeh, David M. Bloom
-
Publication number: 20110012216Abstract: A large area SDD detector having linear anodes surrounded by steering electrodes and having an oblong, circular, hexagonal, or rectangular shape. The detectors feature stop rings having a junction on the irradiation side and an ohmic contact on the anode side and/or irradiation side. The irradiation and anode stop ring biasing configuration influences the leakage current flowing to the anode and, hence, the overall efficiency of the active area of the detector. A gettering process is also described for creation of the disclosed SDD detectors. The SDD detector may utilize a segmented configuration having multiple anode segments and kick electrodes for reduction of the detector's surface electric field. In another embodiment, a number of strip-like anodes are linked together to form an interdigitated SDD detector for use with neutron detection. Further described is a wraparound structure for use with Ge detectors to minimize capacitance.Type: ApplicationFiled: July 16, 2010Publication date: January 20, 2011Inventors: Massimo Morichi, Olivier Evrard, Marijke Keters, Frazier Bronson, Mathieu Morelle, Paul Burger
-
Publication number: 20110006204Abstract: A detector array and method for making the detector array. The detector array includes a substrate including a plurality of trenches formed therein, and a plurality of collectors electrically isolated from each other, formed on the walls of the trenches, and configured to collect charged particles incident on respective ones of the collectors and to output from the collectors signals indicative of charged particle collection. In the detector array, adjacent ones of the plurality of trenches are disposed in a staggered configuration relative to one another. The method forms in a substrate a plurality of trenches across a surface of the substrate such that adjacent ones of the trenches are in a staggered sequence relative to one another, forms in the plurality of trenches a plurality of collectors, and connects a plurality of electrodes respectively to the collectors.Type: ApplicationFiled: February 24, 2009Publication date: January 13, 2011Applicant: RESEARCH TRIANGLE INSTITUTEInventors: Christopher A. Bower, Kristin Hedgepath Gilchrist, Brian R. Stoner
-
Patent number: 7858425Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p-substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.Type: GrantFiled: May 21, 2008Date of Patent: December 28, 2010Inventors: Thomas J. Sanders, Nicolaas W. Van Vonno, Clyde Combs, Glenn T. Hess
-
Patent number: 7838324Abstract: A method of fabricating a neutron detection structure includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer where at least a portion of the first substrate was removed, permanently bonding a second substrate to the conversion layer, removing the carrier, and providing at least one electrical contact to the device layer. A method of fabricating a neutron detection structure, corresponding to an alternate embodiment, includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer onto a second substrate, permanently bonding the coated substrate where at least a portion of the first substrate was removed, removing the carrier, and providing at least one electrical contact to the device layer.Type: GrantFiled: December 19, 2008Date of Patent: November 23, 2010Assignee: Honeywell International Inc.Inventor: Thomas R Keyser
-
Publication number: 20100264502Abstract: Gray tone lithography is used to form curved silicon topographies for semiconductor based solid-state imaging devices. The imagers are curved to a specific curvature and shaped directly for the specific application; such as curved focal planes. The curvature of the backside is independent from the front surface, which allows thinning of the detector using standard semiconductor processing.Type: ApplicationFiled: October 19, 2009Publication date: October 21, 2010Applicant: US Gov't Represented by the Secretary of the Navy Office of Naval Research (ONR/NRL) code OOCCIPInventors: Marc Christophersen, Bernard F. Phlips
-
Publication number: 20100219494Abstract: One embodiment of a radiation sensing capacitor is presented. The radiation sensing capacitor may include a silicon layer and an insulator layer coupled to the silicon layer. The radiation sensing capacitor may also include a silicon-insulator interface region coupling the silicon layer to the insulator layer and a plurality of hole-trapping precursors formed in the insulator layer proximate to the silicon-insulator interface region.Type: ApplicationFiled: March 2, 2010Publication date: September 2, 2010Inventor: Hugh J. Barnaby
-
Publication number: 20100213380Abstract: A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer.Type: ApplicationFiled: March 18, 2009Publication date: August 26, 2010Applicant: The Government of the United State of America as represented by the Secretary of the NavyInventors: Francis J. Kub, Bernard F. Phlips, Karl D. Hobart, Eric A. Wulf
-
Patent number: 7759150Abstract: A nanorod sensor with a single plane of horizontally-aligned electrodes and an associated fabrication method are provided. The method provides a substrate and forms an intermediate electrode overlying a center region of the substrate. The intermediate electrode is a patterned bottom noble metal/Pt/Ti multilayered stack. TiO2 nanorods are formed over the substrate and intermediate electrode, and a TiO2 film may be formed overlying the TiO2 nanorods. The TiO2 nanorods and TiO2 film are formed in-situ, in the same process, by varying the substrate temperature. In other aspects, the TiO2 film is formed between the nanorods and the intermediate electrode. In yet another aspect, the TiO2 film is formed both above and below the nanorods. A single plane of top electrodes is formed overlying the TiO2 film from a top noble metal/Pt/Ti multilayered stack overlying the TiO2 film, which has been selectively etched to form separate top electrodes.Type: GrantFiled: May 22, 2007Date of Patent: July 20, 2010Assignee: Sharp Laboratories of America, Inc.Inventors: Fengyan Zhang, Bruce D. Ulrich, Wei Pan, Lawrence J. Charneski, Sheng Teng Hsu
-
Publication number: 20100163738Abstract: An embodiment of the invention relates to a radiation detector which includes a plurality of radiation detector modules arranged adjacent to one another with in each case one scintillation element with a radiation inlet surface aligned transversely with respect to a main direction of a radiation, and light detector arrangements arranged transversely with respect to the radiation inlet surfaces of the scintillation elements. In the process of at least one embodiment, one light detector arrangement is arranged between two scintillation elements and has two light inlet surfaces which point away from one another, of which one is associated with a first scintillation element and one is associated with a second scintillation element. Furthermore, at least one embodiment of the invention relates to a light detector arrangement, a production method for a radiation detector according to at least one embodiment of the invention and/or an imaging system.Type: ApplicationFiled: December 28, 2009Publication date: July 1, 2010Inventors: Ludwig DANZER, Jan Wrege
-
Publication number: 20100164534Abstract: A semiconductor radiation sensor (100), comprising a substrate (102), a carrier material (104) mounted to the substrate (102), and a semiconductor detector (106) mounted to the carrier material (104). A radiation sensitive portion of the semiconductor detector (106) is oriented towards the carrier material (104) and generally away from the substrate (102), and the carrier material is adapted to transmit radiation to the radiation sensitive portion of the semiconductor detector (106). A dosimeter comprising the radiation sensor (100) and a method of manufacturing the radiation sensor (100) are also provided.Type: ApplicationFiled: June 2, 2008Publication date: July 1, 2010Inventor: Anatoly Rozenfeld
-
Publication number: 20100155615Abstract: A radiation detector comprises a substrate of diamond material and at least one electrode formed at a surface of the substrate. The electrode comprises electrically conductive material deposited in a cavity in the surface of the substrate so that at least a portion of the material of the electrode is below the surface of the substrate. The cavity will typically be an elongate trench or channel in which electrically conductive material such as boron-doped diamond is deposited. In some embodiments, at least two electrodes are located adjacent to one another at the surface of the substrate. In other embodiments, the device has a plurality of electrodes, at least one of which is located at a first surface and at least one of which is located at an opposed second surface of the substrate.Type: ApplicationFiled: November 12, 2007Publication date: June 24, 2010Applicant: DIAMOND DETECTORS LIMITEDInventors: Andrew John Whitehead, Christopher John Wort, Kevin John Oliver
-
Patent number: 7732238Abstract: A solid-state image sensing apparatus having a three-dimensional structure whose manufacturing process can be simplified is provided. A solid-state image sensing apparatus formed by bonding a first member and a second member is provided. The first member has a first surface on the side of the bonding interface between the first member and the second member and a second surface on the opposite side of the bonding interface. The second member has a third surface on the bonding interface side and a fourth surface on the opposite side of the bonding interface. The first member includes photoelectric conversion elements which are formed on the first surface before the first member is bonded to the second member. The second member includes circuit elements which are formed on the third surface before bonding.Type: GrantFiled: May 2, 2006Date of Patent: June 8, 2010Assignee: Canon Kabushiki KaishaInventors: Yoshinobu Sekiguchi, Takao Yonehara
-
Patent number: 7659149Abstract: Provided is a method of sensing biomolecules using a bioFET, the method including: forming a layer including Au on a gate of the bioFET; forming a probe immobilized on a substrate separated from the gate by a predetermined distance, and a biomolecule having a thiol group (—SH) which is incompletely bonded to the probe; reacting the probe with a sample including a target molecule; and measuring a current flowing in a channel region between a source and a drain of the bioFET.Type: GrantFiled: February 2, 2006Date of Patent: February 9, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Kyu-tae Yoo, Sung-ouk Jung, Jun-hong Min, Ji-na Namgoong, Soo-hyung Choi, Jeo-young Shim
-
Patent number: 7659131Abstract: Because a restricting plate 27 is disposed using a spacer 25, an upper plate 15 is allowed to expand upward when resin is injected, but unnecessary overexpansion is restricted by the restricting plate 27. Therefore the injection of a slightly larger amount of resin 37 does not cause a distortion or breakage of the upper plate 15 and a large amount resin 37 than the predetermined amount may be injected. As a result, damage to the upper plate 15 by the injection of the resin 37 and damage to the upper plate 15, the exfoliation of the radiation sensitive layer, and the like caused by the curing of the resin 37 may be prevented and damage to the flat panel radiation detector 1 may be prevented thereby.Type: GrantFiled: May 23, 2005Date of Patent: February 9, 2010Assignee: Shimadzu CorporationInventors: Junichi Suzuki, Nobuya Nagafune, Kenji Sato, Toshinori Yoshimuta, Toshiyuki Sato
-
Patent number: 7635600Abstract: A photovoltaic (PV) structure is provided, along with a method for forming a PV structure with a conductive nanowire array electrode. The method comprises: forming a bottom electrode with conductive nanowires; forming a first semiconductor layer of a first dopant type (i.e., n-type) overlying the nanowires; forming a second semiconductor layer of a second dopant type, opposite of the first dopant type (i.e., p-type), overlying the first semiconductor layer; and, forming a top electrode overlying the second semiconductor layer. The first and second semiconductor layers can be a material such as a conductive polymer, a conjugated polymer with a fullerene derivative, and inorganic materials such as CdSe, CdS, Titania, or ZnO. The conductive nanowires can be a material such as IrO2, In2O3, SnO2, or indium tin oxide (ITO).Type: GrantFiled: November 16, 2005Date of Patent: December 22, 2009Assignee: Sharp Laboratories of America, Inc.Inventors: Fengyan Zhang, Robert A. Barrowcliff, Sheng Teng Hsu
-
Publication number: 20090302227Abstract: A neutron detection structure built from a Silicon-On-Insulator memory cell includes a conversion layer for converting incident neutrons into emitted charged particles, a device layer for receiving the emitted charged particles, a buried oxide layer separating the conversion layer from the device layer and directly adjacent to the conversion layer and the device layer, an isolation layer, a passivation layer formed on the isolation layer opposite the device layer and buried oxide layer, a carrier adhered by an adhesion layer to the passivation layer opposite the isolation layer, and a plurality of conductive contacts to provide electrical contact to the device layer.Type: ApplicationFiled: June 9, 2008Publication date: December 10, 2009Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Thomas R. Keyser, Cheisan J. Yue
-
Publication number: 20090302231Abstract: Non-streaming high-efficiency perforated semiconductor neutron detectors, method of making same and measuring wands and detector modules utilizing same are disclosed. The detectors have improved mechanical structure, flattened angular detector responses, and reduced leakage current. A plurality of such detectors can be assembled into imaging arrays, and can be used for neutron radiography, remote neutron sensing, cold neutron imaging, SNM monitoring, and various other applications.Type: ApplicationFiled: March 16, 2007Publication date: December 10, 2009Applicant: KANSAS STATE UNIVERSITY RESEARCH FOUNDATIONInventors: Douglas S. McGregor, John K. Shultis, Blake B. Rice, Walter J. McNeil, Clell J. Solomon, Eric L. Patterson, Steven L. Bellinger
-
Publication number: 20090302226Abstract: A solid-state detector for detection of neutron and alpha particles detector and methods for manufacturing and use thereof are described. The detector has an active region formed of a polycrystalline semiconductor compound comprising a particulate semiconductor material sensitive to neutron and alpha particles radiation imbedded in a binder. The particulate semiconductor material contains at least one element sensitive to neutron and alpha particles radiation, selected from a group including 10Boron, 6Lithium, 113Cadmium, 157Gadolinium and 199Mercury. The semiconductor compound is sandwiched between an electrode assembly configured to detect the neutron and alpha particles interacting with the bulk of the active region. The binder can be either an organic polymer binder or inorganic binder. The organic polymer binder comprises at least one polymer that can be selected from the group comprising polystyrene, polypropylene, Humiseal™ and Nylon-6.Type: ApplicationFiled: February 8, 2006Publication date: December 10, 2009Applicant: YISSUM RESEARCH DEVELOPMENT COMPANY OF THE HEBREW UNIVERSITY OF JERUSALEMInventors: Michael M. Schieber, Assaf Zuck, Gad Marom
-
Patent number: 7629196Abstract: A method is disclosed for manufacturing an integrated circuit that has increased radiation hardness and reliability. A device active area of an integrated circuit is provided and a layer of radiation resistant material is applied to the device active area of the integrated circuit. In one advantageous embodiment the radiation resistant material is silicon carbide. In another advantageous embodiment a passivation layer is placed between the device active area and the layer of radiation resistant material. The integrated circuit of the present invention exhibits minimal sensitivity to (1) enhanced low dose rate sensitivity (ELDRS) effects of radiation, and (2) pre-irradiation elevated temperature stress (PETS) effects of radiation.Type: GrantFiled: October 15, 2007Date of Patent: December 8, 2009Assignee: National Semiconductor CorporationInventor: Michael C. Maher
-
Publication number: 20090290680Abstract: New sensors, pixel detectors and different embodiments of multi-channel integrated circuit are disclosed. The new high energy and spatial resolution sensors use solid state detectors. Each channel or pixel of the readout chip employs low noise preamplifier at its input followed by other circuitry. The different embodiments of the sensors, detectors and the integrated circuit are designed to produce high energy and/or spatial resolution two-dimensional and three-dimensional imaging for different applications. Some of these applications may require fast data acquisition, some others may need ultra high energy resolution, and a separate portion may require very high contrast. The embodiments described herein addresses these issues and also other issues that may be useful in two and three dimensional medical and industrial imaging.Type: ApplicationFiled: March 28, 2005Publication date: November 26, 2009Applicant: NOVA R & D, INC.Inventors: Tumay O. Tumer, Martin Clajus
-
Patent number: 7491948Abstract: A method of detecting and transmitting radiation detection information to a network. The method including: communicating with one or more personal radiation detection devices, each device including, a host memory, an event memory, a microprocessor, a global positioning unit and a transceiver or a transmitter; a radiation shield around the host memory and the event memory; a radiation detection memory, the radiation detection memory, responsive to alpha radiation and including two or more SRAM arrays including cross-coupled invertors coupled to wordlines through different value capacitors; a conversion device including a material able to convert neutron and/or gamma radiation into alpha radiation; and an event detection circuit configured to detect and to store data relative to detection of the alpha radiation events by the radiation detection memory; storing the data in the event memory; and retrieving, in a reading device of the network, the data stored in the event memory.Type: GrantFiled: January 30, 2006Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Michael S. Gordon, Kenneth P. Rodbell, Robert L. Wisnieff
-
Publication number: 20080318357Abstract: An alpha voltaic battery includes at least one layer of a semiconductor material comprising at least one p/n junction, at least one absorption and conversion layer on the at least one layer of semiconductor layer, and at least one alpha particle emitter. The absorption and conversion layer prevents at least a portion of alpha particles from the alpha particle emitter from damaging the p/n junction in the layer of semiconductor material. The absorption and conversion layer also converts at least a portion of energy from the alpha particles into electron-hole pairs for collection by the one p/n junction in the layer of semiconductor material.Type: ApplicationFiled: August 22, 2008Publication date: December 25, 2008Applicants: ROCHESTER INSTITUTE OF TECHNOLOGY, GLENN RESEARCH CENTER, OHIO AEROSPACE INSTITUTEInventors: Ryne P. Raffaelle, Phillip Jenkins, David Wilt, David Scheiman, Donald Chubb, Stephanie Castro
-
Patent number: 7462512Abstract: Specific ionic interactions with a sensing material that is electrically coupled with the floating gate of a floating gate-based ion sensitive field effect transistor (FGISFET) may be used to sense a target material. For example, an FGISFET can use (e.g., previously demonstrated) ionic interaction-based sensing techniques with the floating gate of floating gate field effect transistors. The floating gate can serves as a probe and an interface to convert chemical and/or biological signals to electrical signals, which can be measured by monitoring the change in the device's threshold voltage, VT.Type: GrantFiled: January 11, 2005Date of Patent: December 9, 2008Assignee: Polytechnic UniversityInventors: Kalle Levon, Arifur Rahman, Tsunehiro Sai, Ben Zhao
-
Publication number: 20080290433Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p- substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.Type: ApplicationFiled: May 21, 2008Publication date: November 27, 2008Inventors: Thomas J. Sanders, Nicolaas W. Van Vonno, Clyde Combs, Glenn T. Hess
-
Publication number: 20080258057Abstract: Some embodiments include methods for fabricating an alpha particle emitter and detector associated with an integrated circuit chip. Some embodiments include an integrated circuit chip comprising an alpha particle emitter and detector supported by a semiconductor substrate. Some embodiments include an apparatus for obtaining backscatter data from a sample utilizing an alpha particle emission and detection system supported by a semiconductor substrate. Some embodiments include methods of backscatter analysis utilizing a semiconductor substrate containing an alpha particle emitter and an alpha particle sensor.Type: ApplicationFiled: April 18, 2007Publication date: October 23, 2008Inventors: Mark Williamson, Gurtej S. Sandhu
-
Publication number: 20080251868Abstract: The invention provides a standard component for calibration that enables a calibration position to be easily specified in order to calibrate accurately a scale factor in the electron-beam system, and provides an electron-beam system using it. High-accuracy metrology calibration capable of specifying a calibration position can be realized by forming a mark pattern or labeled material for identifying the calibration position in proximity of a superlattice pattern of the standard component for system calibration. The standard component for calibration is one that calibrates a scale factor of an electron-beam system based on a signal of secondary charged particles detected by irradiation of a primary electron beam emitted from the electron-beam system on a substrate having a cross section of a superlattice of a multi-layer structure in which different materials are deposited alternately.Type: ApplicationFiled: April 1, 2008Publication date: October 16, 2008Inventors: Yoshinori Nakayama, Yasunari Sohda, Keiichiro Hitomi
-
Publication number: 20080246106Abstract: Various embodiments of the present invention are directed to integrated circuits having photonic interconnect layers and methods for fabricating the integrated circuits. In one embodiment of the present invention, an integrated circuit comprises an electronic device layer and one or more photonic interconnect layers. The electronic device layer includes one or more electronic devices, and the electronic device layer is attached to a surface of an intermediate layer. One of the photonic interconnect layers is attached to an opposing surface of the intermediate layer, and each of the photonic interconnect layers has at least one photonic device in communication with at least one of the electronic devices of the electronic device layer.Type: ApplicationFiled: April 3, 2007Publication date: October 9, 2008Inventors: Raymond G. Beausoleil, Scott Corzine, Sean Spillane, Wei Wu, R. Stanley Williams
-
Patent number: 7402736Abstract: A probe of a scanning probe microscope having a sharp tip and an increased electric characteristic by fabricating a planar type of field effect transistor and manufacturing a conductive carbon nanotube on the planar type field effect transistor. To achieve this, the present invention provides a method for fabricating a probe having a field effect transistor channel structure including fabricating a field effect transistor, making preparations for growing a carbon nanotube at a top portion of a gate electrode of the field effect transistor, and generating the carbon nanotube at the top portion of the gate electrode of the field effect transistor.Type: GrantFiled: December 23, 2005Date of Patent: July 22, 2008Assignee: POSTECH FoundationInventors: Wonkyu Moon, Geunbae Lim, Sang Hoon Lee
-
Patent number: 7368794Abstract: Boron carbide heteroisomer semiconductor devices are used as particle detectors. The boron carbide semiconductor devices produce electric current in response to incident particles, such as alpha particles, neutrons, or photons.Type: GrantFiled: August 2, 2005Date of Patent: May 6, 2008Inventors: Anthony N. Caruso, Peter A. Dowben, Jennifer I. Brand
-
Patent number: 7364942Abstract: This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.Type: GrantFiled: April 12, 2007Date of Patent: April 29, 2008Assignee: Analog Devices, Inc.Inventor: John R. Martin
-
Patent number: 7338829Abstract: The invention relates to a method for producing a detector for determining the energy of photons and charged particles; to be precise, a so-called ?E detector or transmission detector. The invention also relates to a detector that can be produced by using said method. The aim of the invention is to provide a method for producing a detector of the aforementioned type that is stable over a long period of time and in which dead zones are distinctly minimized. The invention also aims to provide a detector of this type. To these ends, the inventive method is used to produce a Si(Li) substrate having a p+ layer and an n layer. These can be layers produced according to the prior art. According to the inventive method, the n layer is partially removed, for example, by chemical etching, honing or by lapping. Lapping, in particular, has proven to be effective. This reduces the zone that is ineffective in a detector of the aforementioned type. The detector is produced from the substrate treated in this manner.Type: GrantFiled: October 18, 2002Date of Patent: March 4, 2008Assignee: Forschungszentrum Julich GmbHInventors: Davor Protic, Thomas Krings
-
Patent number: 7259381Abstract: The Grunn equation: Depth = 0.046 ? ? ( V acc ) n ? is modified to accurately predict depth of electron beam penetration into a target material. A two-layer stack is formed comprising a thickness of the target material overlying a detection material exhibiting greater sensitivity to the electron beam than the target material. The target material is exposed to electron beam radiation of different energies, with the threshold energy resulting in a changed physical property of the detection material below a predetermined value marking a penetration depth corresponding to the target material thickness. Utilizing the threshold energy (Vacc), the target material thickness (Depth), and the known target material density (?), the numerical power “n” of the Grunn equation is calculated to fit experimental results. So modified, the Grunn equation accurately predicts the depth of penetration of electron beams of varying energies into the target material.Type: GrantFiled: December 6, 2004Date of Patent: August 21, 2007Assignee: Applied Materials, Inc.Inventors: Josephine J. Liu, Alexandros T. Demos, Hichem M'Saad
-
Patent number: 7250323Abstract: A method of making an energy conversion device includes forming a plurality of pores within a substrate and forming a junction region within each of the plurality of pores. Each of the junction regions has a depletion region and each of the plurality of pores defines an opening size in the substrate and a spacing from adjacent pores so that the depletion regions of each of the pores is at least substantially in contact with the depletion region of the pores which are adjacent.Type: GrantFiled: October 25, 2005Date of Patent: July 31, 2007Assignees: Rochester Institute of Technology, University of Rochester, BetaBatt Inc.Inventors: Larry L. Gadeken, Wei Sun, Nazir P. Kherani, Philippe M. Fauchet, Karl D. Hirschman
-
Patent number: 7220614Abstract: This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.Type: GrantFiled: June 9, 2003Date of Patent: May 22, 2007Assignee: Analog Devices, Inc.Inventor: John R. Martin
-
Patent number: 7172910Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention relates to forming an assembly using different sized blocks in either a flexible or rigid substrate.Type: GrantFiled: June 28, 2005Date of Patent: February 6, 2007Assignee: Alien Technology CorporationInventors: Mark A. Hadley, Ann Chiang, Gordon S. W. Craig, Jeffrey Jay Jacobsen, John Stephen Smith, Jay Tu, Roger Green Stewart
-
Patent number: 7151006Abstract: A method of coating the joined crystals within a semiconductor conversion layer to reduce the dark current without compromising the sensitivity of the conversion layer is presented. A semiconductor conversion layer comprising a plurality of joined crystals and permeated by a polymer material and having microscopic voids is also presented.Type: GrantFiled: November 4, 2003Date of Patent: December 19, 2006Assignees: Varian Medical Systems Technologies, Inc., Radiation Monitoring Devices, Inc.Inventors: George Zentai, Larry D. Partain, Raisa Pavlyunchkova, Kanai S. Shah, Paul R. Bennett
-
Patent number: 7148078Abstract: An integrated circuit package includes an angled one-piece substrate having a light source fixed to one area and a sensor die fixed to a second area, such that the light source is directed to illuminate the field of view of the sensor die when a surface of interest is imaged. The integrated circuit package is well suited for generating navigation information regarding movement relative to a surface. In one method of forming the integrated circuit package, the single-piece substrate is originally a generally flat lead frame to which the sensor die and light source are attached. After the components have been connected, the lead frame is bent to provide the desired light source-to-sensor angle. In an alternative method, the lead frame is pre-bent. For either method, optics may be connected to the integrated circuit package, thereby providing a module that includes the optics, the light source, the sensor and the packaging body.Type: GrantFiled: February 23, 2004Date of Patent: December 12, 2006Assignee: Avago Technologies EGBU IP (Singapore) Pte. Ltd.Inventors: Vincent C. Moyer, Michael J. Brosnan
-
Patent number: 7122396Abstract: The present invention provides a semiconductor acceleration sensor wherein a semiconductor element is prevented from being damaged even when at least part of a weight is disposed in an internal space of a semiconductor sensor element and the mass of a weight is accordingly increased. An inner peripheral surface of a support portion 9 is constituted by four trapezoidal inclined surfaces 13 of a substantially identical shape which are annularly combined so as to define an outer peripheral surface of a frust-pyramidal space. A weight 3 is so constructed as to have an abutting portion including a linear portion 3d which abuts against the inclined surfaces 13 constituting the inner peripheral surface of the support portion 9 when the weight 3 makes a maximum displacement in a direction where a diaphragm portion 11 is located. The abutting portion 3d has a circular outline shape as seen from a side where a weight fixing portion 7 is located.Type: GrantFiled: October 3, 2003Date of Patent: October 17, 2006Assignee: Hokuriku Electric Industry Co., Ltd.Inventors: Yoshiyuki Nakamizo, Tsutomu Sawai, Masato Ando
-
Patent number: 7008813Abstract: A method of fabricating a germanium photodetector includes preparing a silicon wafer as a silicon substrate; depositing a layer of silicon nitride on the silicon substrate; patterning and etching the silicon nitride layer; depositing a first germanium layer on the silicon nitride layer; patterning and etching the germanium layer wherein a portion of the germanium layer is in direct physical contact with the silicon substrate; depositing a layer of silicon oxide on the germanium layer wherein the germanium layer is encapsulated by the silicon oxide layer; annealing the structure at a temperature wherein the germanium melts and the other layers remain solid; growing a second, single-crystal layer of germanium on the structure by liquid phase epitaxy; selectively removing the silicon oxide layer; and completing the germanium photodetector.Type: GrantFiled: February 28, 2005Date of Patent: March 7, 2006Assignee: Sharp Laboratories of America, Inc..Inventors: Jong-Jan Lee, Jer-Shen Maa, Douglas J. Tweet, Sheng Teng Hsu
-
Patent number: 7001849Abstract: A method for treatment of the surface of a CdZnTe (CZT) crystal that provides a native dielectric coating to reduce surface leakage currents and thereby, improve the resolution of instruments incorporating detectors using CZT crystals. A two step process is disclosed, etching the surface of a CZT crystal with a solution of the conventional bromine/methanol etch treatment, and after attachment of electrical contacts, passivating the CZT crystal surface with a solution of 10 w/o NH4F and 10 w/o H2O2 in water.Type: GrantFiled: December 19, 2002Date of Patent: February 21, 2006Assignee: Sandia National LaboratoriesInventors: Gomez W. Wright, Ralph B. James, Arnold Burger, Douglas A. Chinn
-
Patent number: 6984540Abstract: A surface acoustic wave device includes a piezoelectric substrate, a first interdigital transducer and a second interdigital transducer formed on the substrate so that the first and second interdigital transducers are opposed to each other. The substrate includes a doping region that is doped with a substance in at least one form selected from the group consisting of atoms, molecules and clusters in a surface between the first and second interdigital transducers.Type: GrantFiled: July 23, 2003Date of Patent: January 10, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mitihiko Takase, Michio Okajima, Akihisa Yoshida, Kentaro Setsune, Kouzou Murakami, Kunihiro Fujii
-
Patent number: 6911711Abstract: A micro-power generator, comprises an electrically insulating substrate; a semiconductor layer affixed to the substrate; electrodes affixed to the semiconductor layer for collecting electrical charges emitted by a radioisotope source; a radio-isotope source interposed between the electrodes; and electrical circuitry operably coupled to the electrodes for transforming the electrical charges into a controlled output.Type: GrantFiled: October 10, 2003Date of Patent: June 28, 2005Assignee: The United States of America as represented by the Secretary of the NavyInventors: Randy L. Shimabukuro, Stephen D. Russell
-
Patent number: 6861281Abstract: A reflective layer 10 is formed on a back surface 11b of a sapphire substrate 11. The reflective layer 10 includes an extension portion 10a which extends so as to cover almost all the sidewalls 21a of a light-emitting device in the vicinity of the sapphire substrate. Thus, since adhesion between the reflective layer 10 and the substrate is greatly enhanced in the vicinity of the periphery of the surface on which the reflective layer is formed (the substrate back surface 11b) by virtue of formation of the aforementioned extension portion 10a, exfoliation of the reflective layer 10 from the substrate is prevented. Therefore, even when a process in which the reflective layer 10 is attached onto an adhesive sheet to thereby secure the light-emitting device 100 on the sheet is employed, generation of a defective product having an exfoliated reflective layer can be prevented.Type: GrantFiled: December 25, 2000Date of Patent: March 1, 2005Assignee: Toyoda Gosei Co., Ltd.Inventors: Toshiya Uemura, Naohisa Nagasaka
-
Patent number: 6734516Abstract: A hybridized Lead-Salt infrared radiation detector includes a focal plane having a substrate and a sensitized, delineated Lead-Salt layer upon the substrate, the delineations forming a plurality of sections in a two-dimensional array. The detector also includes electrical contacts for each of the sections and a common grid between the sections. The detector further includes a layer of conductive barrier material on each electrical contact, a layer of passivating material on each section, and a layer of fusible conductive material on each layer of conductive barrier material.Type: GrantFiled: October 11, 2001Date of Patent: May 11, 2004Assignee: Litton Systems, Inc.Inventors: Niels F. Jacksen, Jeffrey G. Tibbitt, Michael A. Sepulveda
-
Patent number: 6696362Abstract: Methods are provided for identifying root causes of particle issues and for developing particle-robust process recipes in plasma deposition processes. The presence of in situ particles within the substrate processing system is detected over a period of time that spans multiple distinct processing steps in the recipe. The time dependence of in situ particle levels is determined from these results. Then, the processing steps are correlated with the time dependence to identify relative particle levels with the processing steps. This information provides a direct indication of which steps result in the production of particle contaminants so that those steps may be targeted for modification in the development of particle recipes.Type: GrantFiled: April 12, 2002Date of Patent: February 24, 2004Assignee: Applied Materials Inc.Inventors: Kent Rossman, Leonard Jay Olmer, Phillip Nguyen
-
Publication number: 20040009621Abstract: A method of fabricating an X-ray detector array element. A gate and a gate insulation layer are formed on a substrate. A silicon island is formed on the insulation layer in a transistor area. A common line is formed on the insulation layer, simultaneously; source and drain are formed on the island to form a TFT. A bottom electrode is formed on the insulation layer in a capacitor area and covers the common line. A passivation layer is formed on the insulation layer, the bottom electrode and the TFT. A first via hole penetrates the passivation layer to expose the source. A planarization layer is formed on the passivation layer and fills the first via hole. Second and third via holes penetrate the planarization layer. The second via hole exposes the source. The third via hole exposes part of the passivation layer. A top electrode is formed on the planarization layer and connects the source.Type: ApplicationFiled: February 19, 2003Publication date: January 15, 2004Applicant: HANNSTAR DISPLAY CORPORATIONInventor: Po-Sheng Shih