Particulate Semiconductor Component Patents (Class 438/63)
  • Patent number: 6586670
    Abstract: A method for producing a photoelectric conversion device comprising a conductive support and a photosensitive layer containing a semiconductor fine particle on which a dye is adsorbed, wherein the semiconductor fine particle is treated with a compound represented by the following general formula (I): wherein X represents an oxygen atom, a sulfur atom, a selenium atom or NY, in which Y represents a hydrogen atom, an aliphatic hydrocarbon group, a hydroxyl group or an alkoxy group; R1, R2, R3 and R4 independently represent a hydrogen atom, an aliphatic hydrocarbon group, an aryl group, a heterocyclic group, —N(R5)(R6), —C(═O)R7, —C(═S)R8, —SO2R9 or —OR10; R5 and R6 independently have the same meaning as the R1, R2, R3 and R4; R7, R8 and R9 independently represent a hydrogen atom, an aliphatic hydrocarbon group, an aryl group, a heterocyclic group, —N(R5)(R6), —OR10 or —SR11; and R10 and R11 independently represent a hydrogen atom or an
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: July 1, 2003
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Masaru Yoshikawa
  • Patent number: 6563041
    Abstract: This photoelectric conversion device comprises a lower electrode, numerous p-type crystalline semiconductor particles deposited thereon, an insulator formed among the crystalline semiconductor particles, and a n-type semiconductor layer formed on the side of the upper portions of the crystalline semiconductor particles. The insulator is formed of a translucent material, and the surface of the lower electrode has been subjected to roughening treatment. Roughening the surface of the lower electrode allows light incident on the surface of the lower electrode to be scattered and directed to the crystalline semiconductor particles so that the photoelectric conversion efficiency is improved.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: May 13, 2003
    Assignee: Kyocera Corporation
    Inventors: Shin Sugawara, Takeshi Kyoda, Nobuyuki Kitahara, Hisao Arimune
  • Publication number: 20030056821
    Abstract: A method of making a photovoltaic cell includes contacting a cross-linking agent with semiconductor particles, and incorporating the semiconductor particles into the photovoltaic cell.
    Type: Application
    Filed: June 10, 2002
    Publication date: March 27, 2003
    Inventors: Kethinni G. Chittibabu, Jin-An He, Lynne Ann Samuelson, Lian Li, Sukant Tripathy, Susan Tripathy, Jayant Kumar, Srinivasan Balasubramanian
  • Patent number: 6528717
    Abstract: Producing a photovoltaic panel, including forming holes in a first electrode plate, fitting, in the holes, photovoltaic elements, each having a P-N junction between a core and a shell, electrically connecting a first portion of the shell of each photovoltaic element to the first electrode plate, removing one second portion of the shell of each photovoltaic element located on both sides of the first portion of the shell, so that a third portion of the core of the each photovoltaic element that corresponds to the one second portion of the shell is exposed, and electrically connecting the third portion of the core of each photovoltaic element to a second electrode plate, wherein electrically connecting the first portion and electrically connecting the third portion includes soldering, a corresponding one of the first portion and the third portion to a corresponding one of the first electrode plate and the second electrode plate.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: March 4, 2003
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Koichi Asai, Yasuo Muto, Kazuya Suzuki
  • Publication number: 20030020144
    Abstract: Integrated communications apparatus and methods are used to receive, transmit, and operate on communications signals. A composite semiconductor structure may be formed for providing an integrated communications device that may include transceiver circuitry, data converter circuitry, and processor circuitry. The data converter circuitry may include an analog-to-digital and/or digital-to-analog data converter that is implemented at least partly using compound semiconductors (e.g., using compound semiconductor transistors for implementing comparators and/or switches in the data converter). The processor circuitry may include some circuitry that is formed from non-compound semiconductors, which is better suited than compound semiconductors to perform digital signal processing operations. The transceiver circuitry may include compound and/or non-compound semiconductor circuitry depending on the signal frequency and whether the signal is optical or electrical.
    Type: Application
    Filed: July 24, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Keith Warble, Steven F. Gillig, Barry W. Herold
  • Patent number: 6495423
    Abstract: An electronic power device is integrated monolithically in a semiconductor substrate. The device includes a power region, itself having at least one P/N junction provided therein which comprises a first semiconductor region with a first type of conductivity extending into the substrate from the top surface of the device and being diffused into a second semiconductor region with the opposite conductivity from the first; and an edge protection structure of substantial thickness and limited planar size incorporating at least one trench filled with dielectric material.
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: December 17, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Salvatore Leonardi
  • Patent number: 6490166
    Abstract: The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: December 3, 2002
    Assignee: Intel Corporation
    Inventors: Suresh Ramalingam, Nagesh Vodrahalli, Michael J. Costello, Mun Leong Loke, Ravi V. Mahajan
  • Patent number: 6485998
    Abstract: An improved PIN photodiode provides enhanced linearity by confining the light absorption region of the diode wholly within the depletion region. The photodiode exhibits improved linearity over prior art designs because the thickness of the absorption region is no longer a function of changes in the size of the depletion region during device operation. Keeping the absorption region wholly within the depletion region ensures that the charge carriers generated by incident illumination will increase the conductivity of the semiconductor material.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: November 26, 2002
    Assignee: Agere Systems Inc.
    Inventors: Robert Eugene Frahm, Keon M. Lee, Orval George Lorimor, Dennis Ronald Zolnowski
  • Patent number: 6486108
    Abstract: A composition for use in semiconductor processing wherein the composition comprises water, phosphoric acid, and an organic acid; wherein the organic acid is ascorbic acid or is an organic acid having two or more carboxylic acid groups (e.g., citric acid). The water can be present in about 40 wt. % to about 85 wt. % of the composition, the phosphoric acid can be present in about 0.01 wt. % to about 10 wt. % of the composition, and the organic acid can be present in about 10 wt. % to about 60 wt. % of the composition. The composition can be used for cleaning various surfaces, such as, for example, patterned metal layers and vias by exposing the surfaces to the composition.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: November 26, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Donald L. Yates, Max F. Hineman
  • Publication number: 20020162585
    Abstract: There is provided a photoelectric conversion device comprising a lower electrode, numerous crystalline semiconductor particles of one conductivity type deposited on the lower electrode, an insulator interposed among the crystalline semiconductor particles, and a semiconductor layer of the opposite conductivity type provided over the crystalline semiconductor particles, in which a pyramidal projection having a cross section in the shape of a trapezoid or triangle and a lateral face that faces one of the crystalline semiconductor particles is provided between the crystalline semiconductor particles. In this device, light incident on areas among the crystalline semiconductor particles is reflected or refracted by the pyramidal projection and directed into the crystalline semiconductor particles. Accordingly, this device can achieve high conversion efficiency.
    Type: Application
    Filed: February 22, 2002
    Publication date: November 7, 2002
    Inventors: Shin Sugawara, Takeshi Kyoda, Nobuyuki Kitahara, Hisao Arimune, Toshifumi Kiyohara, Ken Watanuki
  • Patent number: 6451622
    Abstract: An optical device and a method for manufacturing the optical device. An optical device having a molded-package structure includes: a lead frame having a ferrule-mounting portion; a ferrule mounted on the ferrule-mounting portion; and a molding resin that encapsulates the lead frame and the ferrule, molding, except that an end of the ferrule protrudes through and outside of the surface of the molding resin. The first groove parallel to a longitudinal axis of the ferrule is located on the ferrule-mounting portion and the ferrule is placed on the first groove. Thus, the ferrule is hardly ever detached from a ferrule-mounting portion, an optical fiber is hardly ever damaged, and an optical coupling is hardly ever obstructed.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: September 17, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Akiyoshi Sawai
  • Patent number: 6441298
    Abstract: A surface-plasmon enhanced photovoltaic device including: a first metallic electrode having an array of apertures, an illuminated surface and an unilluminated surface, at least one of the surfaces having an enhancement characteristic resulting in a resonant interaction of incident light with surface plasmons; a second electrode spaced from the first metallic electrode; and a plurality of spheres corresponding to the array of apertures and disposed between the first metallic and second electrodes, each sphere having a first portion of either p or n-doped material and a second portion having the other of the p or n-doped material such that a p-n junction is formed at a junction between the first and second portions.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: August 27, 2002
    Assignee: NEC Research Institute, Inc
    Inventor: Tineke Thio
  • Patent number: 6437234
    Abstract: A method of manufacturing a photoelectric conversion device according to the present invention comprises the steps of: applying numerous glass particles having a particle size before baking being 5 to 25% of that of crystalline semiconductor particles to a substrate having an electrode of one side; depositing the crystalline semiconductor particles on the layer of the glass particles; pressing the crystalline semiconductor particles against the substrate; and subjecting them to baking, whereby manufacturing a photoelectric conversion device in which the crystalline semiconductor particles and the substrate have been joined together as well as an insulator has been interposed among the crystalline semiconductor particles. Accordingly, the photoelectric conversion device has good conversion efficiency and is manufactured at a low cost.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: August 20, 2002
    Assignee: Kyocera Corporation
    Inventors: Takeshi Kyoda, Shin Sugawara, Hisao Arimune
  • Publication number: 20020096206
    Abstract: A photoelectric conversion element is disposed in each of a plurality of recesses of a support. Light reflected by the inside surface of the recess shines on the photoelectric conversion element. The photoelectric conversion element has an approximately spherical shape and has the following structure. The outer surface of a center-side n-type amorphous silicon (a-Si) layer is covered with a p-type amorphous SiC (a-SiC) layer having a wider optical band gap than a-Si does, whereby a pn junction is formed. A first conductor of the support is connected to the p-type a-SiC layer of the photoelectric conversion element at the bottom or its neighborhood of the recess. A second conductor, which is insulated from the first conductor by an insulator, of the support is connected to the n-type a-Si layer of the photoelectric conversion element.
    Type: Application
    Filed: November 21, 2001
    Publication date: July 25, 2002
    Applicant: Clean Venture 21 Corporation
    Inventors: Yoshihiro Hamakawa, Mikio Murozono, Hideyuki Takakura, Yukio Yamaguchi, Jun Yamagata, Hidenori Yasuda
  • Publication number: 20020096207
    Abstract: Producing a photovoltaic panel, including forming holes in a first electrode plate, fitting, in the holes, photovoltaic elements, each having a P-N junction between a core and a shell, electrically connecting a first portion of the shell of each photovoltaic element to the first electrode plate, removing one second portion of the shell of each photovoltaic element located on both sides of the first portion of the shell, so that a third portion of the core of the each photovoltaic element that corresponds to the one second portion of the shell is exposed, and electrically connecting the third portion of the core of each photovoltaic element to a second electrode plate, wherein electrically connecting the first portion and electrically connecting the third portion includes soldering, a corresponding one of the first portion and the third portion to a corresponding one of the first electrode plate and the second electrode plate.
    Type: Application
    Filed: March 11, 2002
    Publication date: July 25, 2002
    Applicant: Fuji Machine MFG. Co., Ltd.
    Inventors: Koichi Asai, Yasuo Muto, Kazuya Suzuki
  • Patent number: 6420644
    Abstract: A solar battery having a board with a surface with a plurality of spherical segments projecting from the board surface. A primary electrode layer is provided on the board surface and the plurality of spherical segments. A semiconductor layer is provided on the primary electrode layer and has P-N connecting members. A secondary electrode layer on the semiconductor layer is made up of a translucent material.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: July 16, 2002
    Assignee: Mitsui High-tec, Inc.
    Inventors: Atsushi Fukui, Keisuke Kimoto
  • Patent number: 6417442
    Abstract: A method of forming a solar battery assembly. The method includes the steps of: providing a plurality of spherically-shaped cells, each having a semiconductor layer and an outer electrode layer; forming a solder layer between the plurality of spherically-shaped cells so as to maintain the plurality of spherically-shaped cells in a desired relationship; removing a part of the outer electrode layer to expose a part of the semiconductor layer; and placing an inner electrode in contact with the exposed part of the semiconductor layer.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: July 9, 2002
    Assignee: Mitsui High-tec, Inc.
    Inventors: Atsushi Fukui, Keisuke Kimoto, Migaku Ishida
  • Patent number: 6399412
    Abstract: Producing a photovoltaic panel, including forming holes in a first electrode plate, fitting, in the holes, photovoltaic elements, each having a P-N junction between a core and a shell, electrically connecting a first portion of the shell of each photovoltaic element to the first electrode plate, removing one second portion of the shell of each photovoltaic element located on both sides of the first portion of the shell, so that a third portion of the core of the each photovoltaic element that corresponds to the one second portion of the shell is exposed, and electrically connecting the third portion of the core of each photovoltaic element to a second electrode plate, wherein electrically connecting the first portion and electrically connecting the third portion includes soldering, a corresponding one of the first portion and the third portion to a corresponding one of the first electrode plate and the second electrode plate.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: June 4, 2002
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Koichi Asai, Yasuo Muto, Kazuya Suzuki
  • Publication number: 20020036009
    Abstract: A method of manufacturing a photoelectric conversion device according to the present invention comprises the steps of: applying numerous glassparticles having a particle size before baking being 5 to 25% of that of crystalline semiconductor particles to a substrate having an electrode of one side; depositing the crystalline semiconductor particles on the layer of the glassparticles; pressing the crystalline semiconductor particles against the substrate; and subjecting them to 3 baking, whereby manufacturing a photoelectric conversion device in which the crystalline semiconductor particles and the substrate have been joined together as well as an insulator has been interposed among the crystalline semiconductor particles. Accordingly, the photoelectric conversion device has good conversion efficiency and is manufactured at a low cost.
    Type: Application
    Filed: July 26, 2001
    Publication date: March 28, 2002
    Applicant: KYOCERA CORPORATION
    Inventors: Takeshi Kyoda, Shin Sugawara, Hisao Arimune
  • Patent number: 6355873
    Abstract: A spherical shaped solar diode having an n-type substrate surrounded by a p-type layer of semiconductor material is disclosed. In addition, a plurality of hetero-junction super lattice structures are formed surrounding the p-type layer. The plurality of hetero-junction super lattice structures include alternating layers of Si and SeBeTe. The plurality of hetero-junction super lattice structures adapt the diode to convert higher energy light (as compared to 1.1eV light) to electrical energy. The diodes are formed into a solar panel assembly. The panel assembly includes a wire mesh to secure the diodes and electrically contact one electrode of each diode. A dimpled sheet is also used for securing the diodes and electrically contacting the other electrode of each diode. The diodes are positioned adjacent to the dimpled sheet so that when light is applied to the solar panel assembly, the diodes are exposed to the light on a majority of each diode's surface.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: March 12, 2002
    Assignee: Ball Semiconductor, Inc.
    Inventor: Akira Ishikawa
  • Publication number: 20020023675
    Abstract: A method of forming a solar battery assembly. The method includes the steps of: providing a plurality of spherically-shaped cells, each having a semiconductor layer and an outer electrode layer; forming a solder layer between the plurality of spherically-shaped cells so as to maintain the plurality of spherically-shaped cells in a desired relationship; removing a part of the outer electrode layer to expose a part of the semiconductor layer; and placing an inner electrode in contact with the exposed part of the semiconductor layer.
    Type: Application
    Filed: December 18, 2000
    Publication date: February 28, 2002
    Inventors: Atsushi Fukui, Keisuke Kimoto, Migaku Ishida
  • Patent number: 6337035
    Abstract: A phosphor is prepared by depositing a compound semiconductor of Groups III-V in the form of fine particles or a thin film on a surface of a carrier particle by hetero-epitaxial growth. Thus, the phosphor increased in quality is obtained with satisfactory reproducibility.
    Type: Grant
    Filed: February 19, 1999
    Date of Patent: January 8, 2002
    Assignee: Futaba Denshi Kogyo K.K.
    Inventors: Shigeo Itoh, Hitoshi Toki
  • Patent number: 6303967
    Abstract: A method is shown for producing a PIN photodiode using a reduced number of masks wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. A groove is etched from the second surface of the fabrication substrate through the intrinsic region to the first surface in order to isolate the photodiode.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: October 16, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 6281427
    Abstract: A semiconductor-device-producing substrate and method for producing the substrate which is inexpensive and good in quality and which has a large-area surface layer. A photoelectric conversion device and method uses the semiconductor-device-producing substrate, with high efficiency being obtained by means of the large-area light-receiving surface and three-dimensional structure of the photoelectric conversion device. Semiconductor granular crystals are arranged in at least one layer on a semiconductor substrate and connected and fixed to one another by heating or by a chemical vapor-phase deposition method to thereby form a semiconductor-device-producing substrate. An active layer of one conduction type is formed on the substrate and then another active layer of the other conduction type is formed on the surface of the first-mentioned active layer by a chemical vapor-phase deposition method or by a diffusion method to thereby form a PN junction surface having a three-dimensional structure.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: August 28, 2001
    Assignee: Digital Wave Inc.
    Inventors: Maruyama Mitsuhiro, Maruyama Yasuhiro
  • Patent number: 6274402
    Abstract: A method of fabricating a back surface point contact silicon solar cell having p-doped regions and n-doped regions on the same side by forming a passivating layer on a surface of the cell having opened windows at the p-doped regions and the n-doped regions, by depositing and patterning a first metal layer on the passivating layer in such a way that the first metal layer comes into contact with the p-doped regions and the n-doped regions, by depositing a first insulator layer of inorganic material on the first metal layer, by etching and patterning the first insulator layer in such a way that the insulator layer has opened windows at, at least one of the p-doped regions and the n-doped regions, by depositing a second insulator layer of organic material on the first insulator layer, by etching and patterning the second insulator layer in such a way that the insulator layer has opened windows at the one of the p-doped regions and the n-doped regions, by curing the second insulator layer by heating at a predeterm
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: August 14, 2001
    Assignees: Sunpower Corporation, Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Pierre J. Verlinden, Akira Terao, Haruo Nakamura, Norio Komura, Yasuo Sugimoto, Junichi Ohmura
  • Patent number: 6274391
    Abstract: A high density interconnect land grid array package device combines various electronic packaging techniques in a unique way to create a very thin, electrically and thermally high performance package for single or multiple semiconductor devices. A thin and mechanically stable substrate or packaging material (12) is selected that also has high thermal conductivity. Cavities (14) in the substrate or packaging material (12) accommodate one or more semiconductor devices that are attached directly to the substrate or packaging material. At least one of said semiconductor devices includes at least one optical receiver and/or transmitter. A thin film overlay (18) having multiple layers interconnects the one or more semiconductor devices to an array of pads (20) on a surface of the thin film overlay facing away from the substrate or packaging material.
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: August 14, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Kurt P. Wachtler, David N. Walter, Larry J. Mowatt
  • Patent number: 6274196
    Abstract: A spherical object transport apparatus of the invention brings a spiral stream into contact with a first atmosphere containing a spherical object, selectively sucks the first atmosphere outward so as to engulf in the spiral stream for diffusing the first atmosphere outward, guides the spherical object so that the spherical object passes through the center of the transport apparatus, supplies a second atmosphere to the spherical object, and sends the spherical object together with the second atmosphere to the following step.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: August 14, 2001
    Assignees: Mitsui High-Tec INC, Nippon Pneumatics/Fluidics System Co., Ltd.
    Inventors: Katsumi Amano, Tashiro Arai
  • Publication number: 20010002275
    Abstract: The present invention is for particulate compositions and methods for producing them that can absorb or scatter electromagnetic radiation. The particles are homogeneous in size and are comprised of a nonconducting inner layer that is surrounded by an electrically conducting material. The ratio of the thickness of the nonconducting layer to the thickness of the outer conducting shell is determinative of the wavelength of maximum absorbance or scattering of the particle. Unique solution phase methods for synthesizing the particles involve linking clusters of the conducting atoms, ions, or molecules to the nonconducting inner layer by linear molecules. This step can be followed by growth of the metal onto the clusters to form a coherent conducting shell that encapsulates the core.
    Type: Application
    Filed: January 5, 2001
    Publication date: May 31, 2001
    Inventors: Steven J. Oldenburg, Richard D. Averitt, Nancy J. Halas
  • Patent number: 6239355
    Abstract: A solid state photovoltaic device is formed on a substrate and includes a photoactive channel layer interposed between a pair of electrodes. The photoactive channel layer includes a first material which absorbs light and operates as a hole carrier. Within the first material are nanoparticles of a second material which operate as electron carriers. The nanoparticles are distributed within the photoactive channel layer such that, predominantly, the charge path between the two electrodes at any given location includes only a single nanocrystal. Because a majority of electrons are channeled to the electrodes via single nanocrystal conductive paths, the resulting architecture is referred to as a channel architecture.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: May 29, 2001
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: Joshua S. Salafsky
  • Patent number: 6228674
    Abstract: A CMOS sensor and a method of manufacturing a CMOS sensor. One major aspect of this invention is the use of a high-energy ion implantation to form a silicon nitride layer underneath the sensing region. Then, N-type dopants are implanted to form an N-type region above the silicon nitride layer within the substrate. Thereafter, a P-type epitaxial layer is formed above the substrate, thereby forming an intrinsic depletion region between the epitaxial layer and the N-doped region. The intrinsic depletion region is a light-sensitive area where light energy is converted into electrical signal. Height of the intrinsic depletion region can be adjusted through controlling the depth of the implant in the N-doped region.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: May 8, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Jui-Hsiang Pan
  • Patent number: 6229158
    Abstract: A compound die may be formed of two dies each having face and back sides, said dies being connected with said dies in face to face alignment. A radiation communication system may be used to assist in aligning the dies and in providing communications between the two dies. In this way, a composite structure may be produced which has advanced capabilities, a small footprint, and low impedance.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: May 8, 2001
    Assignee: Intel Corporation
    Inventors: Ronald K. Minemier, Jon M. Dhuse
  • Patent number: 6139831
    Abstract: Apparatus and method for immobilizing molecules, particularly biomolecules such as DNA, RNA, proteins, lipids, carbohydrates, or hormones onto a substrate such as glass or silica; patterns of immobilization can be made resulting in addressable, discrete arrays of molecules on a substrate, having applications in bioelectronics, DNA hybridization assays, drug assays, etc.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: October 31, 2000
    Assignee: The Rockfeller University
    Inventors: Ganaganor Visweswara Shivashankar, Albert J. Libchaber
  • Patent number: 6117703
    Abstract: The invention relates to a method of fabricating a strip CIS solar cell and an apparatus for practicing the method. It is the task of the invention to describe a method and an apparatus for providing a technical solution as well as the required layer structure, by which it is possible economically to fabricate adhering CIS solar cells on copper strips. In accordance with the invention the task is solved by a first step of continuously galvanically coating one side of a pre-cleaned copper strip with indium, a second step of very quickly heating the copper strip coated with indium by a contact method with a heated body of graphite and to bring one side into contact with a heated sulfur or selenium containing carrier gas in a narrow gap, a third step of selectively removing by an etching technique the generated cover layer of copper sulfide or selenide, and a fourth step of providing a p.sup.+ conductive transparent collector or planarizing layer of copper oxide/sulfide.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: September 12, 2000
    Assignee: IST - Institut fuer Solartechnologien GmbH
    Inventor: Juergen Penndorf
  • Patent number: 6106609
    Abstract: Nanocrystalline semiconductors are synthesized within a bicontinuous cubic atrix 10. The nanocrystalline particles 12 may then be end-capped 18 with a dispersant to prevent agglomeration. One typical nanocrystalline semiconductor compound made according to the present invention is PbS. Other IV-VI semiconductors may be produced by the method of the present invention. The method of this invention may also be used to produce doped semiconductors.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: August 22, 2000
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Jianping Yang, Banahalli R. Ratna
  • Patent number: 6090200
    Abstract: Nanocrystalline phosphors are formed within a bicontinuous cubic phase. The phosphors are doped with an optimum concentration, of manganese, for example, corresponding to about one or less dopant ions per phosphor particle.
    Type: Grant
    Filed: November 18, 1997
    Date of Patent: July 18, 2000
    Inventors: Henry F. Gray, Jianping Yang, David S. Y. Hsu, Banhalli R. Ratna, Syed B. Qadri
  • Patent number: 6052261
    Abstract: A method for manufacturing a magnetoresistance head of the present invention comprises the steps of forming an organic film on a multilayered film constituting a magnetoresistance device, forming an upper film formed of resist or inorganic film on the organic film, patterning the organic film and the upper film, cutting into edges of the organic film patterns from edges of the upper film patterns inwardly to such an extent that particles of the thin film being formed on the upper film and the multilayered film do not contact to side portions of the organic film patterns.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: April 18, 2000
    Assignee: Fujitsu Limited
    Inventors: Keiji Watanabe, Koji Nozaki, Miwa Igarashi, Yoko Kuramitsu, Ei Yano, Takahisa Namiki, Hiroshi Shirataki, Keita Ohtsuka, Michiaki Kanamine, Yuji Uehara
  • Patent number: 5986206
    Abstract: Polymer based solar cells incorporate nanoscale carbon particles as electron acceptors. The nanoscale carbon particles can be appropriate carbon blacks, especially modified laser black. Conducting polymers are used in the solar cells as electron donors upon absorption of light. Preferred solar cell structures involve corrugation of the donor/acceptor composite material such that increased amounts of electricity can be produced for a given overall area of the solar cell.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: November 16, 1999
    Assignee: NanoGram Corporation
    Inventors: Nobuyuki Kambe, Peter S. Dardi
  • Patent number: 5882779
    Abstract: A class of high efficiency (e.g., .gtoreq.20%) materials for use as display pixels to replace conventional phosphors in television, monitor, and flat panel displays. The materials are comprised of nanocrystals such as CdS.sub.x Se.sub.1-x, CuCl, GaN, CdTe.sub.x S.sub.1-x, ZnTe, ZnSe, ZnS, or porous Si or Ge alloys which may or may not contain a luminescent center. The nanocrystals may be doped with a luminescent center such as Mn.sup.2+ or a transition metal. The nanocrystals have passivated surfaces to provide high quantum efficiency. The nanocrystals have all dimensions comparable to the exciton radius (e.g., a size in the range of approximately 1 nm to approximately 10 nm). A quantum dot nanocrystal display phosphor that has a size selected for shifting an emission wavelength of a constituent semiconductor material from a characteristic wavelength observed in the bulk to a different wavelength.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: March 16, 1999
    Assignee: Spectra Science Corporation
    Inventor: Nabil M. Lawandy
  • Patent number: 5866471
    Abstract: A silicon thin film is formed by coating on a substrate a solution of polysilane represented by the general formula --(SiR.sup.1.sub.2).sub.n --, where R.sup.1 substituents are selected from the group consisting of hydrogen, an alkyl group having two or more carbon atoms and a .beta.-hydrogen, a phenyl group and a silyl group, and thermally decomposing the polysilane to deposit silicon.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: February 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuro Beppu, Shuji Hayase, Atsushi Kamata, Kenji Sano, Toshiro Hiraoka
  • Patent number: 5840614
    Abstract: A process for producing semiconductor devices using ultraviolet sensitive tape including the steps of forming a plurality of chips on a first surface of a semiconductor wafer, adhering an ultraviolet sensitive tape to the first surface of the semiconductor wafer, back lapping a second surface of the wafer, opposite to the first surface, and irradiating the ultraviolet sensitive tape with ultraviolet rays to release the ultraviolet sensitive tape from the wafer.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: November 24, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Min Sim, Do Yun Hwang